AN PN7462AU How to integrate RTOS. Application note COMPANY PUBLIC. Rev September Document information

Similar documents
TED-Kit 2, Release Notes

AN PR533 USB stick - Evaluation board. Application note COMPANY PUBLIC. Rev May Document information

AN Energy Harvesting with the NTAG I²C and NTAG I²C plus. Application note COMPANY PUBLIC. Rev February Document information

AN MIFARE Plus Card Coil Design. Application note COMPANY PUBLIC. Rev April Document information

UM10950 Start-up Guide for FRDM-KW41Z Evaluation Board Bluetooth Paring example with NTAG I²C plus Rev February

UM OM29263ADK Quick start guide antenna kit COMPANY PUBLIC. Document information

OM29110 NFC's SBC Interface Boards User Manual. Rev May

R_ Driving LPC1500 with EPSON Crystals. Rev October Document information. Keywords Abstract

AN NHS3xxx Temperature sensor calibration. Document information

PN7120 NFC Controller SBC Kit User Manual

AN NFC, PN533, demo board. Application note COMPANY PUBLIC. Rev July Document information

AN PN7150X Frequently Asked Questions. Application note COMPANY PUBLIC. Rev June Document information

AN High-performance PCB antennas for ZigBee networks. Document information. Keywords

AN NTAG21xF, Field detection and sleep mode feature. Rev July Application note COMPANY PUBLIC. Document information

AN Maximum RF Input Power BGU6101. Document information. Keywords Abstract

PN7150 Raspberry Pi SBC Kit Quick Start Guide

UM DALI getting started guide. Document information

PTN5100 PCB layout guidelines

AN11994 QN908x BLE Antenna Design Guide

PN7120 NFC Controller SBC Kit User Manual

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

TN LPC1800, LPC4300, MxMEMMAP, memory map. Document information

UM Slim proximity touch sensor demo board OM Document information

AN12232 QN908x ADC Application Note

UM DALI getting started guide. Document information

AN Ohm FM LNA for embedded Antenna in Portable applications with BGU7003W. Document information. Keywords Abstract

UM User manual for di2c demo board. Document information

AN Replacing HMC625 by NXP BGA7204. Document information

AN12165 QN908x RF Evaluation Test Guide

AN How to design an antenna with DPC. Rev November Application note COMPANY PUBLIC. Document information.

ES_LPC1114. Errata sheet LPC1114. Document information

UM Description of the TDA8029 I2C Demo Board. Document information

AN UCODE I2C PCB antenna reference designs. Application note COMPANY PUBLIC. Rev October Document information

AN TEA1892 GreenChip synchronous rectifier controller. Document information

UM TEA1721 universal mains white goods flyback SMPS demo board. Document information

UM GreenChip TEA1995DB1295 synchronous rectifier controller demo board. Document information

AN BFU725F/N1 2.4 GHz LNA evaluation board. Document information. Keywords. LNA, 2.4GHz, BFU725F/N1 Abstract

TN ADC design guidelines. Document information

BGU8007/BGU7005 Matching Options for Improved LTE Jammer Immunity

VHF variable capacitance diode

AN UBA2015/UBA2017 saturating inductor support during ignition. Document information

BAP Product profile. 2. Pinning information. 3. Ordering information. Silicon PIN diode. 1.1 General description. 1.2 Features and benefits

UM PN7120 NFC Controller SBC Kit User Manual. Rev July User manual COMPANY PUBLIC. Document information

Two elements in series configuration in a small SMD plastic package Low diode capacitance Low diode forward resistance AEC-Q101 qualified

AN Thermal considerations BGA3131. Document information. Keywords Abstract

AN GHz to 2.7 GHz Doherty power amplifier using the BLF7G27LS-150P. Document information

Planar PIN diode in a SOD523 ultra small plastic SMD package.

Four planar PIN diode array in SOT363 small SMD plastic package.

BB Product profile. 2. Pinning information. 3. Ordering information. FM variable capacitance double diode. 1.1 General description

AN PN7120 Arduino SBC Kit Quick Start Guide. Application note COMPANY PUBLIC. Rev July Document information

AN Relay replacement by NXP high-power bipolar transistors in LFPAK56. Document information

OM5597/RD General description. 2. Features and benefits. 3. Applications. POS Reference Design. 2.1 Features. 2.2 Benefits

AN12082 Capacitive Touch Sensor Design

PN7150 BeagleBone Black SBC Kit Quick Start Guide

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

AN Programming the PCA200x family of watch ICs. Document information

PN7120 NFC Controller Arduino SBC Kit User Manual. Rev January

AN Low Noise Fast Turn ON-OFF GHz WiFi LNA with BFU730F. Document information

AN BGA GHz 16 db gain CATV amplifier. Document information. Keywords. BGA3021, Evaluation board, CATV, Medium Power.

AN BGU6009/N2 GNSS LNA evaluation board. Document information. Keywords. BGU6009/N2, GNSS, LNA Abstract

Planar PIN diode in a SOD882D leadless ultra small plastic SMD package.

Hex non-inverting precision Schmitt-trigger

Quad 2-input EXCLUSIVE-NOR gate

SJA1105P/Q/R/S. 1 Features and benefits. 1.1 General features. 1.2 Ethernet switching and AVB features. 1.3 Interface features

HEF4002B. 1. General description. 2. Features and benefits. 3. Ordering information. 4. Functional diagram. Dual 4-input NOR gate

AN High Ohmic FM LNA for embedded Antenna in Portable applications with BGU6102. Document information. Keywords

AN BLF0910H9LS600

Planar PIN diode in a SOD523 ultra small SMD plastic package.

75 MHz, 30 db gain reverse amplifier

PNP 5 GHz wideband transistor. Oscilloscopes and spectrum analyzers Radar systems RF wideband amplifiers

Hex non-inverting HIGH-to-LOW level shifter

200 MHz, 35 db gain reverse amplifier. High performance amplifier in a SOT115J package, operating at a voltage supply of 24 V (DC).

KMA22x; KMA32x handling information

Hex inverting HIGH-to-LOW level shifter

Quad 2-input NAND buffer (open collector) The 74F38 provides four 2-input NAND functions with open-collector outputs.

4-bit bidirectional universal shift register

Broadband LDMOS driver transistor. A 5 W LDMOS power transistor for broadcast and industrial applications in the HF to 2500 MHz band.

Quad 2-input EXCLUSIVE-NOR gate

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

Symbol Parameter Conditions Min Typ Max Unit V F forward voltage I F =10mA

PTN General description. 2. Features and benefits. SuperSpeed USB 3.0 redriver

Quad 2-input EXCLUSIVE-NOR gate

HEF4014B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. 8-bit static shift register

BFU550XR ISM 433 MHz LNA design. BFU520, BFU530, BFU550 series, ISM-band, 433MHz 866MHz Abstract

Symbol Parameter Conditions Min Typ Max Unit V F forward voltage I F =10mA

50 ma LED driver in SOT457

HEF4014B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. 8-bit static shift register

UM User manual for the BGU7008 GPS LNA evaluation board. Document information. Keywords LNA, GPS, BGU7008. Abstract

AN Pegoda Amplifier. Application note COMPANY PUBLIC. Rev July Document information

Dual 4-bit static shift register

Single Schmitt trigger buffer

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

AN SDARS active antenna 1st stage LNA with BFU730F, 2.33 GHz. Document information

Output rectifiers in high-frequency switched-mode power supplies

Analog high linearity low noise variable gain amplifier

NFC Reader Library for FRDM-K82F Board Installation guidelines

B (bottom) Package type descriptive code. VFBGA176 Package style descriptive code

74HC03; 74HCT03. Quad 2-input NAND gate; open-drain output

Transcription:

Document information Info Content Keywords Abstract The following document describes steps required for integration of RTOS with PN7462AU Firmware.

Revision history Rev Date Description 1.1 20160913 Figures updated 1.0 20160309 First official release Contact information For more information, please visit: http://www.nxp.com All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 2 of 10

1. Introduction This document enlists steps and guidelines required for integration of FreeRTOS with PN7462AU Firmware. Unless and otherwise mentioned, the files and folders referred here are relative to the ROOT Folder of the PN7462AU Firmware Package. 2. Preconditions The following pre-conditions are assumed before integration Free RTOS with PN7462AU Firmware. 1. PN7462AU Firmware source and evaluation package is available (If not available, contact PN7462AU CAS) 2. LPCXpresso IDE version 8.0.0_526 or above is installed (If not available, download from www.nxp.com/lpcware) 3. PN7462AU Plug-in is installed into LPCXpresso IDE (If not available, contact PN7462AU support) 4. FreeRTOSV8.2.0 is available. (If not available, download from www.nxp.com/redirect/freertos.org/) 5. Awareness of FreeRTOS Porting and Integration. (This application note is a guideline document, it is not a tutorial on integration of FreeRTOS.) 6. Board bring-up of the DEMO/Evaluation board already completed. e.g. Jumper settings/power Supply/Reference EEPROM contents inside the PN7462AU IC already completed. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 3 of 10

3. Integrating FreeRTOS package 3.1 Location to copy FreeRTOS code Fig 1. Location to copy FreeRTOS source code FreeRTOS source code has to be copied to specific folders within <RootFirmwareFolder>/external/RTOS. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 4 of 10

3.2 Files used for porting/integration The following files have to be copied from FreeRTOS Package to the corresponding sub directory inside <RootFirmwareFolder>/external/RTOS. Table 1. Free RTOS Files Source FreeRTOS\Source\include\croutine.h FreeRTOS\Source\include\deprecated_definitions.h FreeRTOS\Source\include\event_groups.h FreeRTOS\Source\include\FreeRTOS.h FreeRTOS\Source\include\list.h FreeRTOS\Source\include\mpu_wrappers.h FreeRTOS\Source\include\portable.h FreeRTOS\Source\include\projdefs.h FreeRTOS\Source\include\queue.h FreeRTOS\Source\include\semphr.h FreeRTOS\Source\include\StackMacros.h FreeRTOS\Source\include\task.h FreeRTOS\Source\include\timers.h FreeRTOS\Source\event_groups.c FreeRTOS\Source\portable\MemMang\heap_3.c FreeRTOS\Source\portable\MemMang\heap_2.c FreeRTOS\Source\list.c FreeRTOS\Source\queue.c FreeRTOS\Source\tasks.c FreeRTOS\Source\timers.c FreeRTOS\Source\portable\GCC\ARM_CM0\portmacro.h FreeRTOS\Source\portable\GCC\ARM_CM0\port.c FreeRTOS\Source\portable\IAR\ARM_CM0\port.c FreeRTOS\Source\portable\IAR\ARM_CM0\portasm.s FreeRTOS\Source\portable\IAR\ARM_CM0\portmacro.h FreeRTOS\Source\portable\RVDS\ARM_CM0\port.c FreeRTOS\Source\portable\RVDS\ARM_CM0\portmacro.h FreeRTOS\Demo\CORTEX_M0_LPC1114_LPCXpresso\RTOSDemo\Source\Free RTOSConfig.h (After Modifications. See Section 3.3 FreeRTOSConfig.h below) Destination sub directory inside <RootFirmwareFolder>/external/RTOS inc\croutine.h inc\deprecated_definitions.h inc\event_groups.h inc\freertos.h inc\list.h inc\mpu_wrappers.h inc\portable.h inc\projdefs.h inc\queue.h inc\semphr.h inc\stackmacros.h inc\task.h inc\timers.h src\event_groups.c src\heap_3.c src\heap_2.c src\list.c src\queue.c src\tasks.c src\timers.c GCC\portmacro.h GCC\port.c IAR\port.c IAR\portasm.s IAR\portmacro.h RVDS\port.c RVDS\portmacro.h inc\freertosconfig.h All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 5 of 10

3.3 FreeRTOSConfig.h FreeRTOS\Demo\CORTEX_M0_LPC1114_LPCXpresso\RTOSDemo\Source\FreeRTOSConfig.h has been used as reference code for the RTOS Porting. On top of the reference FreeRTOSConfig.h the following modifications are needed. Table 2. Configuration changes to FreeRTOSConfig.h Configurable #define Value Notes SystemCoreClock 20000000 20MHz Clock. Replace extern uint32_t SystemCoreClock; with #define SystemCoreClock 20000000 configmax_priorities 8 configminimal_stack_size 32 configtotal_heap_size 5500 Required if heap_2.c being used. With heap_3.c, this is optional configtimer_task_priority 1 configtimer_queue_length 10 INCLUDE_vTaskDelete 0 INCLUDE_vTaskCleanUpResources 0 INCLUDE_vTaskDelayUntil 0 INCLUDE_xEventGroupSetBitFromISR 1 INCLUDE_xTimerPendFunctionCall 1 INCLUDE_xSemaphoreGetMutexHolder 0 INCLUDE_xEventGroupSetBitFromISR 1 INCLUDE_xTimerPendFunctionCall 1 INCLUDE_xSemaphoreGetMutexHolder 0 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 6 of 10

4. Updating phrtos wrapper The phrtos module/component has been created to facilitate porting across RTOS and NonRTOS based designs. phcommon\inc\wrapper\phrtos_rtos.h and phrtos\src\phrtos_rtos.c have to be updated to integrate phrtos with FreeRTOS. The APIs called by the supplied phrtos_rtos.h and phrtos_rtos.c correspond to APIs as provided by a dummy EXAMPLE_RTOS. The end user (who has Awareness of FreeRTOS Porting and Integration as mentioned in Section 2 - Preconditions on page 3 ) is expected to update phrtos_rtos.h and phrtos_rtos.c as listed in API Mapping between EXAMPLE_RTOS and FreeRTOS (Table 3 belowbelow). Table 3. API Mapping between EXAMPLE_RTOS and FreeRTOS EXAMPLE_RTOS API/Value >Defines / PreProcessor Macros< EXAMPLE_RTOS_MAXIMUM_DELAY EXAMPLE_RTOS_STACK_TYPE EXAMPLE_RTOS_FALSE EXAMPLE_RTOS_TRUE >Header Files< EXAMPLE_RTOS_PortingMacros.h EXAMPLE_RTOS_MAIN_API.h EXAMPLE_RTOS_TASK_API.h EXAMPLE_RTOS_QUEUE_API.h EXAMPLE_RTOS_SEMAPHORE_API.h EXAMPLE_RTOS_EVENT_API.h EXAMPLE_RTOS_TIMER_API.h >Data Types< EXAMPLE_RTOS_DefaultType_t EXAMPLE_RTOS_TaskHandleType_t >Task/Task Scheduler APIs< EXAMPLE_RTOS_TaskSchedulerStart EXAMPLE_RTOS_TaskSchedulerStop EXAMPLE_RTOS_TaskSchedulerGetState EXAMPLE_RTOS_TaskCreate EXAMPLE_RTOS_TaskDelete EXAMPLE_RTOS_TaskGetName EXAMPLE_RTOS_TaskDelay EXAMPLE_RTOS_TaskSuspend EXAMPLE_RTOS_TaskSuspendAll EXAMPLE_RTOS_TaskResumeAll EXAMPLE_RTOS_TaskResume_ISRSAFE EXAMPLE_RTOS_TaskResume EXAMPLE_RTOS_TaskYield EXAMPLE_RTOS_TaskGetState EXAMPLE_RTOS_TaskSetPriority EXAMPLE_RTOS_TaskGetPriority EXAMPLE_RTOS_TaskGetStackWaterMark EXAMPLE_RTOS_YIELD_FROM_ISR FreeRTOS API/Value portmax_delay portstack_type pdfalse pdtrue portmacro.h FreeRTOS.h task.h queue.h semphr.h event_groups.h timers.h BaseType_t TaskHandle_t vtaskstartscheduler vtaskendscheduler xtaskgetschedulerstate xtaskcreate vtaskdelete pctaskgettaskname vtaskdelay vtasksuspend vtasksuspendall xtaskresumeall xtaskresumefromisr vtaskresume taskyield etaskgetstate vtaskpriorityset uxtaskpriorityget uxtaskgetstackhighwatermark portyield_from_isr All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 7 of 10

EXAMPLE_RTOS API/Value >Queue APIs< EXAMPLE_RTOS_QueueCreate EXAMPLE_RTOS_QueueDelete EXAMPLE_RTOS_QueueReset EXAMPLE_RTOS_QueuePost_ISRSAFE EXAMPLE_RTOS_QueuePost EXAMPLE_RTOS_QueueGet_ISRSAFE EXAMPLE_RTOS_QueueGet >Semaphore/Mutex APIs< EXAMPLE_RTOS_SemaphoreRelease_ISRSAFE EXAMPLE_RTOS_SemaphoreRelease EXAMPLE_RTOS_SemaphoreGetMutexHolder EXAMPLE_RTOS_SemaphoreDelete EXAMPLE_RTOS_SemaphoreCreate_Mutex EXAMPLE_RTOS_SemaphoreCreate_Count EXAMPLE_RTOS_SemaphoreAcquire_ISRSAFE EXAMPLE_RTOS_SemaphoreAcquire >Events APIs< EXAMPLE_RTOS_EventBitsCreate EXAMPLE_RTOS_EventBitsSet_ISRSAFE EXAMPLE_RTOS_EventBitsSet EXAMPLE_RTOS_EventBitsWait EXAMPLE_RTOS_EventBitsClear_ISRSAFE EXAMPLE_RTOS_EventBitsClear EXAMPLE_RTOS_EventDelete >Timer APIs< EXAMPLE_RTOS_TimerCreate EXAMPLE_RTOS_TimerGetID EXAMPLE_RTOS_TimerStart EXAMPLE_RTOS_TimerStop EXAMPLE_RTOS_TimerReset EXAMPLE_RTOS_TimerDelete EXAMPLE_RTOS_TimerChangeDuration >MISC APIs< EXAMPLE_RTOS_GetTickCount_ISRSAFE EXAMPLE_RTOS_GetTickCount EXAMPLE_RTOS_CallBackOnEveryTick EXAMPLE_RTOS_NoFreeMemory EXAMPLE_RTOS_StackOverflowDetected FreeRTOS API/Value xqueuecreate vqueuedelete xqueuereset xqueuesendfromisr xqueuesend xqueuereceivefromisr xqueuereceive xsemaphoregivefromisr xsemaphoregive xsemaphoregetmutexholder vsemaphoredelete xsemaphorecreatemutex xsemaphorecreatecounting xsemaphoretakefromisr xsemaphoretake xeventgroupcreate xeventgroupsetbitsfromisr xeventgroupsetbits xeventgroupwaitbits xeventgroupclearbitsfromisr xeventgroupclearbits veventgroupdelete xtimercreate pvtimergettimerid xtimerstart xtimerstop xtimerreset xtimerdelete xtimerchangeperiod xtaskgettickcountfromisr xtaskgettickcount vapplicationtickhook vapplicationmallocfailedhook vapplicationstackoverflowhook All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 8 of 10

5. Legal information 5.1 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 5.2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Evaluation products This product is provided on an as is and with all faults basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. 5.3 Licenses Purchase of NXP ICs with ISO/IEC 14443 type B functionality RATP/Innovatron Technology This NXP Semiconductors IC is ISO/IEC 14443 Type B software enabled and is licensed under Innovatron s Contactless Card patents license for ISO/IEC 14443 B. The license includes the right to use the IC in systems and/or end-user equipment. Purchase of NXP ICs with NFC technology Purchase of an NXP Semiconductors IC that complies with one of the Near Field Communication (NFC) standards ISO/IEC 18092 and ISO/IEC 21481 does not convey an implied license under any patent right infringed by implementation of any of those standards. Purchase of NXP Semiconductors IC does not include a license to any NXP patent (or other IP right) covering combinations of those products with other products, whether hardware or software. 5.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are property of their respective owners. MIFARE is a trademark of NXP B.V. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. 9 of 10

6. Contents 1. Introduction... 3 2. Preconditions... 3 3. Integrating FreeRTOS package... 4 3.1 3.2 Location to copy FreeRTOS code... 4 Files used for porting/integration... 5 3.3 FreeRTOSConfig.h... 6 4. Updating phrtos wrapper... 7 5. Legal information... 9 5.1 5.2 Definitions... 9 Disclaimers... 9 5.3 Licenses... 9 5.4 Trademarks... 9 6. Contents... 10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. NXP Semiconductors N.V. 2016. All rights reserved. For more information, visit: http://www.nxp.com Date of release: 13 September 2016 Document identifier: