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Transcription:

N-channel 30V - 0.020Ω - 6A - TSSOP8 2.5V-drive STripFET II Power MOSFET General features Type V DSS R DS(on) I D 30V < 0.025 Ω (@ 4.5 V) < 0.030 Ω (@ 2.7 V) 6A Ultra low threshold gate drive (2.5V) Standard outline for easy automated surface mount assembly Double dice in common drain configuration Description This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature Size " strip-based process. The resulting transistor shows extremely high packing density for low on-resistance. Applications Switching application TSSOP8 Internal schematic diagram Order code Part number Marking Package Packaging C6NF30V TSSOP8 Tape & reel February 2007 Rev 4 1/13 www.st.com 13

Contents Contents 1 Electrical ratings............................................ 3 2 Electrical characteristics..................................... 4 2.1 Electrical characteristics (curves)............................ 6 3 Test circuit................................................ 9 4 Package mechanical data.................................... 10 5 Revision history........................................... 12 2/13

Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage (V GS = 0) 30 V V DGR Drain-gate voltage (R GS = 20KΩ) 20 V V GS Gate-source voltage ± 12 V I D Drain current (continuous) at T C = 25 C 6 A I D Drain current (continuous) at T C =100 C 3.8 A (1) I DM Drain current (pulsed) 24 A P TOT Total dissipation at T C = 25 C 1.5 W T stg Storage temperature 55 to 150 C T J Max. Operating Junction Temperature 55 to 150 C 1. Pulse width limited by safe operating area Table 2. Thermal data Symbol Parameter Value Unit R thj-pbc Thermal resistance junction-pbc Max 100 (1) C/W R thj-pbc Thermal resistance junction-pbc Max 83.5 (2) C/W 1. When Mounted on FR-4 board with 1 inch 2 pad, 2 oz. of Cu. and t = 10 sec. 2. When Mounted on minimum recommended footprint 3/13

Electrical characteristics 2 Electrical characteristics (T J = 25 C unless otherwise specified) Table 3. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS I GSS Drain-source breakdown voltage Zero gate voltage drain current (V GS = 0) Gate body leakage current (V DS = 0) I D = 250µA, V GS = 0 30 V V DS = Max rating, V DS = Max rating @125 C 1 10 µa µa V GS = ±12V ±100 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250µA 0.6 V R DS(on) Table 4. Static drain-source on resistance Dynamic V GS = 4.5V, I D = 3A V GS =2.5V, I D = 3A 0.020 0.025 0.025 0.030 Symbol Parameter Test conditions Min. Typ. Max. Unit g fs (1) C iss C oss C rss Q g Q gs Q gd Forward transconductance V DS = 10V, I D = 6A 18 S Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge 1. Pulsed: pulse duration=300µs, duty cycle 1.5% Table 5. Switching times V DS =25V, f = 1 MHz, V GS = 0 V DD =15V, I D = 6A V GS = 2.5V Figure 16 on page 9 800 180 32 6.8 2.0 3.4 Ω Ω pf pf pf 9 nc nc nc Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f Turn-on delay time Rise time Turn-off delay time Fall time V DD = 15V, I D = 3A, R G = 4.7Ω, V GS = 2.5V Figure 14 on page 9 20 25 32 13 ns ns ns ns 4/13

Electrical characteristics Table 6. Source drain diode Symbol Parameter Test conditions Min. Typ. Max Unit I SD Source-drain current 6 A I SDM (1) V SD (2) Source-drain current (pulsed) 24 A Forward on voltage I SD = 6A, V GS = 0 1.2 V t rr Q rr Reverse recovery time Reverse recovery charge Reverse recovery current I SD = 6A, di/dt = 100A/µs, V DD = 15V, T J = 150 C 25 21 1.7 ns µc A I RRM Figure 16 on page 9 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 5/13

Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/13

Electrical characteristics Figure 7. Gate charge vs. gate-source voltage Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs. vs. temperature temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized breakdown voltage temperature 7/13

Electrical characteristics Figure 13. Thermal resistance and max power 8/13

Test circuit 3 Test circuit Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load switching and diode recovery times 9/13

Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13

Package mechanical data 11/13

Revision history 5 Revision history Table 7. Revision history Date Revision Changes 21-Jun-2004 2 Complete document 03-Aug-2006 3 The document has been reformatted, SOA updated 01-Feb-2007 4 Typo mistake on first page 12/13

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