TC7652. Low Noise, Chopper Stabilized Operational Amplifier. General Description. Features. Applications. Device Selection Table.

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Transcription:

Low Noise, Chopper Stabilized Operational Amplifier Features Low Offset Over Temperature Range: 10µV Ultra Low Long Term Drift: 150nV/Month Low Temperature Drift: 100nV/ C Low DC Input Bias Current: 15pA High Gain, CMRR and PSRR: 110dB Min Low Input Noise Voltage: 0.2µVp-p (DC to 1Hz) Internally Compensated for Unity Gain Operation Clamp Circuit for Fast Overload Recovery Applications General Description The is a lower noise version of the TC7650, sacrificing some input specifications (bias current and bandwidth) to achieve a 10x reduction in noise. All the other benefits of the chopper technique are present, (i.e, freedom from offset adjust, drift and reliability problems from external trim components). Like the TC7650, the requires only two noncritical external caps for storing the chopped null potentials. There are no significant chopping spikes, internal effects or overrange lockup problems. Instrumentation Medical Instrumentation Embedded Control Temperature Sensor Amplifier Strain Gage Amplifier Device Selection Table Part Number Package Temperature Range CPA 8-Pin Plastic DIP 0 C to 70 C CPD 14-Pin Plastic DIP 0 C to 70 C Package Type 8-Pin DIP C A 1 8 C B -Input Input 2 3 CPA 7 6 V DD V SS 4 5 Clamp 14-Pin DIP C B C A NC -Input Input NC V SS 1 2 3 4 5 6 7 14 INT/EXT EXT CLK 13 In 12 INT CLK Out CPD 11 V DD 10 9 Clamp 8 C RETN NC = No Internal Connection (May Be Used As Input Guard) 2002 Microchip Technology Inc. DS21464B-page 1

Functional Block Diagram Clamp (Not On "Z" Pinout) Inputs Clamp Circuit Main Amplifier Oscillator A B 14-Pin DIP Only INT/EXT EXT CLK IN CLK OUT NULL C B Intermod Comparator B B NULL Amplifier B A C A A NULL NOTE 1: For 8-pin DIP connect to V SS, or to C RET on "Z" pinout. C RETN (1) V SS DS21464B-page 2 2002 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS* Total Supply Voltage (V DD to V SS )...18V Input Voltage... (V DD 0.3V) to (V SS 0.3V) *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods my affect device reliability. Voltage on Oscillator Control Pins...V DD to V SS Duration of Short Circuit...Indefinite Current Into Any Pin... 10mA WhileOperating(Note 1)...100µA Package Power Dissipation (T A < 70 C) 8-Pin Plastic DIP...730mW 14-Pin Plastic DIP...800mW Storage Temperature Range... -65 C to 150 C Operating Temperature Range C Device... 0 C to 70 C I Device... -25 C to 85 C ELECTRICAL SPECIFICATIONS Electrical Characteristics: V DD =5V,V SS =-5V,T A = 25 C, unless otherwise indicated. Symbol Parameter Min Typ Max Units Test Conditions V OS Input Offset Voltage ±2 ±5 µv T A =25 C TCV OS Average Temperature Co-efficient of 0.01 0.05 µv/ C 0 C < T A <70 C Input Offset Voltage V OS /DT Offset Voltage vs Time 150 nv/mo I BIAS Input Bias Current (CLK On) I BIAS Input Bias Current (CLK Off) 30 100 250 15 35 100 100 1000 30 1000 pa pa T A =25 C 0 C < T A <70 C -25 C < T A <85 C T A =25 C 0 C < T A <70 C -25 C < T A <85 C I OS Input Offset Current 25 150 pa R IN Input Resistance 10 12 Ω OL Large Signal Voltage Gain 120 150 db R L =10kΩ, V OUT =±4V V OUT Voltage Swing (Note 2) ±4.7 ±4.85 ±4.95 V R L =10kΩ R L = 100kΩ CMVR Common Mode Voltage Range -4.3 3.5 V MRR Common Mode Rejection Ratio 120 140 db CMVR = -4.3V to 3.5V PSRR Power Supply 120 140 db ±3V to ±8V e N Input Noise Voltage 0.2 0.7 1.5 5 µv P-P R S =100Ω, DCto1Hz µv P-P DC to 10Hz I N Input Noise Current 0.01 pa/ f = 10Hz Hz GBW Unity Gain Bandwidth 0.4 MHz SR Slew Rate 1 V/µsec C L = 50pF, R L =10kΩ Overshoot 15 % V DD,V SS Operating Supply Range 5 16 V Note 1: Limiting input current to 100µA is recommended to avoid latch-up problems. Typically 1mA is safe however, this is not guaranteed. 2: clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics. 3: See Clamp under detailed description. 2002 Microchip Technology Inc. DS21464B-page 3

ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: V DD =5V,V SS =-5V,T A = 25 C, unless otherwise indicated. Symbol Parameter Min Typ Max Units Test Conditions I S Supply Current 1 3 ma No Load f CH Internal Chopping Frequency 100 275 Hz Pins 12 14 Open (DIP) Clamp ON Current (Note 3) 25 100 µa R L = 100kΩ Clamp OFF Current (Note 3) 1 pa -4V V OUT <10V Note 1: Limiting input current to 100µA is recommended to avoid latch-up problems. Typically 1mA is safe however, this is not guaranteed. 2: clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics. 3: See Clamp under detailed description. DS21464B-page 4 2002 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS ThedescriptionsofthepinsarelistedinTable2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number Symbol Description 8-pin DIP 14-pin DIP 1,8 2,1 C A,C B Nulling capacitor pins 2 4 -INPUT Inverting Input 3 5 INPUT Non-inverting Input 4 7 V SS Negative Power Supply 5 9 OUTPUT Voltage Clamp CLAMP 6 10 OUTPUT 7 11 V DD Positive Power Supply 3,6 NC No internal connection 8 C RETN Capacitor current return pin 12 INT CLK OUT Internal Clock 13 EXT CLK IN External Clock Input 14 INT/EXT Select Internal or External Clock 2002 Microchip Technology Inc. DS21464B-page 5

3.0 DETAILED DESCRIPTION 3.1 Capacitor Connection FIGURE 3-1: TEST CIRCUIT R2 1MΩ Connect the null storage capacitors to the C A and C B pins with a common connection to the C RET pin (14-pin ) or to V SS (8-pin ). When connecting to V SS, avoid injecting load current IR drops into the capacitive circuitry by making this connection directly via a separate wire or PC trace. 3.2 Clamp In chopper stabilized amplifiers, the output clamp pin reduces overload recovery time. When a connection is made to the inverting input pin (summing junction), a current path is created between that point and the output pin, just before the device output saturates. This prevents uncontrolled differential input voltages and charge build-up on correction storage capacitors. swing is reduced. 3.3 Clock The has a 550Hz internal oscillator, which is divided by two before clocking the input chopper switches. The 275Hz chopping frequency is available at INT CLK OUT (Pin 12) on 14-pin devices. In normal operation, INT/EXT (Pin 14), which has an internal pullup, can be left open. An external clock can also be used. To disable the internal clock and use an external one, the INT/EXT pin must be tied to V SS. The external clock signal is then applied to the EXT CLK IN input (Pin 13). An internal divide-by-two provides a 50% switching duty cycle. The capacitors are only charged when EXT CLK IN is high, so a 50% to 80% positive duty cycle is recommended for higher clock frequencies. The external clock can swing between V DD and V SS, with the logic threshold about 2.5V below V DD. The output of the internal oscillator, before the divideby-two circuit, is available at EXT CLK IN when INT/ EXT is high or unconnected. This output can serve as the clock input for a second (operating in a master/slave mode), so that both op amps will clock at the same frequency. This prevents clock intermodulation effects when two 's are used in a differential amplifier configuration. R 1 1kΩ 0.1µF C R C If the 's output saturates, error voltages on the external capacitors will slow overload recovery. This condition can be avoided if a strobe signal is available. The strobe signal is applied to EXT CLK IN and the overload signal is applied to the amplifier while the strobe is LOW. In this case, neither capacitor will be charged. The low leakage of the capacitor pins allow long measurements to be made within eligible errors (typical capacitor drift is 10µV/sec). 4.0 TYPICAL APPLICATIONS 4.1 Component Selection C A and C B (external capacitors)should be in the 0.1µF to 1µF range. For minimum clock ripple noise, use a 1µF capacitor in broad bandwidth circuits. For limited bandwidth applications where clock ripple is filtered out, use a 0.1µF capacitor for slightly lower offset voltage. High quality, film type capacitors (polyester or polypropylene) are recommended, although a lower grade ceramic may work in some applications. For quickest settling after initial turn-on, use low dielectric absorption capacitors (e.g., polypropylene). With ceramic capacitors, settling to 1µV takes several seconds. 4.2 Static Protection - 0.1µF Although input diodes static protect all device pins, avoid strong electrostatic fields and discharges that can cause degraded diode junction characteristics and produce increased input-leakage currents. DS21464B-page 6 2002 Microchip Technology Inc.

4.3 Stage/Load Driving The output circuit is high impedance (about 18kΩ). With lesser loads, the chopper amplifier behaves somewhat like a transconductance amplifier with an open-loop gain proportional to load resistance. (For example, the open-loop gain is 17dB lower with a 1kΩ. load than with a 10kΩ load.) If the amp is used only for DC, the DC gain is typically greater than 120dB (even witha1kω load), and this lower gain is inconsequential. For wide band, the best frequency response occurs with a load resistor of at least 10kΩ. This produces a 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 2 degrees in the transition region, where the main amplifier takes over from the null amplifier. FIGURE 4-1: Input CONNECTION OF INPUT GUARDS Inverting Amplifier R 1 R 2 Follower - - Input Noninverting Amplifier R 2 - R 1 Input 4.4 Thermoelectric Effects The thermoelectric (Seebeck) effects in thermocouple junctions of dissimilar metals, alloys, silicon, etc. limit ultra high precision DC amplifiers. Unless all junctions are at the same temperature, thermoelectric voltages around 0.1µV/ C (up to tens of µv/ C for some materials) are generated. To realize the low offset voltages of the chopper, avoid temperature gradients. Enclose components to eliminate air movement, especially from power dissipating elements in the system. Where possible, use low thermoelectric co-efficient connections. Keep power supply voltages and power dissipation to a minimum. Use high impedance loads and seek maximum separation from surrounding heat disipating elements. 4.5 Guarding To benefit from low input currents, take care assembling printed circuit boards. Clean boards with alcohol or TCE and blow dry with compressed air. To prevent contamination, coat boards with epoxy or silicone rubber. Even if boards are cleaned and coated, leakage currents may occur because input pins are next to pins at supply potentials. To reduce this leakage, use guarding to lower the voltage difference between the inputs and adjacent metal runs. The guard (a conductive ring surrounding inputs) is connected to a low impedance point at about the same voltage as inputs. The guard absorbs leakage currents from high voltage pins. The 14-pin dual-in-line arrangement simplifies guarding. Like the LM108 pin configuration (but unlike the 101A and 741), pins next to inputs are not used. 2002 Microchip Technology Inc. DS21464B-page 7

4.6 Pin Compatibility Where possible, the 8-pin device pinout conforms to such industry standards as the LM101 and LM741. Null storing external capacitors connect to Pins 1 and 8, which are usually for offset null or compensation capacitors. clamp (Pin 5) is similarly used. For OP05 and OP07 devices, replacement of the offset null potentiometer (connected between Pins 1 and 8 and V DD by two capacitors from those pins to V SS ) provides compatibility. Replacing the compensation capacitor between Pins 1 and 8 by two capacitors to V SS is required. The same operation (with the removal of any connection to Pin 5) works for LM101, µa748 and similar parts. Because NC pins provide guarding between input and other pins, the 14-pin device pinout conforms closely to the LM108. Because this device does not use any extra pins and does not provide offset nulling (but requires a compensation capacitor), some layout changes are necessary to convert to the. 4.7 Some Applications Figures 4-2 and 4-3 show basic inverting and noninverting amplifier circuits using the output clamping circuit to enhance overload recovery performance. The only limitations on replacing other op amps with the are supply voltage (±8V maximum) and output drive capability (10kΩ load for full swing). Overcome these limitations with a booster circuit (Figure 4-4) to combine output capabilities of the LM741 (or other standard device) with input capabilities of the. These two form a composite device, therefore, when adding the feedback network, the monitor loop gains stability. FIGURE 4-2: Input 0.1µF NONINVERTING AMPLIFIER WITH OPTIONAL CLAMP Clamp 0.1µF R 2 FIGURE 4-3: Input FIGURE 4-4: In -7.5V 0.1 µf INVERTING AMPLIFIER WITH OPTIONAL CLAMP USING 741 TO BOOST OUTPUT DRIVE CAPABILITY Figure 4-5 shows the clamp circuit of a zero offset comparator. Because the clamp circuit requires the inverting input to follow the input signal, problems with a chopper stabilized op amp are avoided. The threshold input must tolerate the output clamp current V IN /R without disrupting other parts of the system. Figure 4-6 shows how the can offset null high slew rate and wideband amplifiers. Mixing the with circuits operating at ±15V requires a lower supply voltage divider with the TC7660 voltage converter circuit operated "backwards." Figure 4-7 shows an approximate connection. FIGURE 4-5: R 1 0.1µF -7.5V 0.1 µf R 2 Clamp 0.1µF 15V 741-15V 10kΩ LOW OFFSET COMPARATOR Out R 3 R 1 V IN 0.1µF 0.1µF Clamp V OUT 200kΩ to 2mΩ V TH DS21464B-page 8 2002 Microchip Technology Inc.

FIGURE 4-6: 1437 OFFSET NULLED BY In 22kΩ 22kΩ Fast Amplifier Out FIGURE 4-7: SPLITTING 15V WITH THE 7660 AT >95% EFFICIENCY 10µF 2 8 TC7660 3 4 5 6 10µF 15V 7.5V 0V 1MW 2002 Microchip Technology Inc. DS21464B-page 9

5.0 TYPICAL CHARACTERISTICS Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. SUPPLY CURRENT (µa) 1400 1200 1000 800 600 400 200 0 Supply Current vs ± Supply Voltage 2 3 4 5 6 7 8 ± SUPPLY VOLTAGE (V) OUTPUT VOLTAGE (V) -5.0-4.0-3.0 100 SINK Resistance vs Voltage SOURCE 1k 10k 100k 1M OUTPUT RESISTANCE (W) CLAMP CURRENT 1 ma 0.1mA 0.01mA 1µA 0.1µA 0.01µA 1nA 0.1nA 0.01nA Positive Clamp Current 1pA 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 OUTPUT VOLTAGE (V) 1mA Negative Clamp Current Noise at 0.1Hz to 100Hz Noise at 0.1Hz to 10Hz 0.1mA CLAMP CURRENT 0.01mA 1µA 0.1µA 0.01µA 1nA 1 µv/div 2 µv/div 0.1nA 0.01nA 1pA 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 OUTPUT VOLTAGE (V) 1 sec/div 1 sec/div Noise at 0.1Hz to 1Hz Slew Rate Phase Gain (Bode Plot)* 1 µv/div 0.5V/DIV GAIN (db) 60 50 40 30 20 10 0-10 GAIN PHASE 240 180 120 60 0-60 -120-180 PHASE (deg) 1 sec/div 5 µsec/div -20 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) *NOTE: ±5V, ±2.5V supplies; no load to 10k load. DS21464B-page 10 2002 Microchip Technology Inc.

INPUT OFFSET VOLTAGE (µv) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 Input Offset Voltage vs Common Mode Voltage 0.5-6 -4-2 0 2 4 COMMON MODE VOLTAGE (V) 2002 Microchip Technology Inc. DS21464B-page 11

6.0 PACKAGING INFORMATION 6.1 Package Marking Information Package marking information not available at this time. 6.2 Package Dimensions 8-Pin Plastic DIP PIN 1.260 (6.60).240 (6.10).045 (1.14).030 (0.76).400 (10.16).348 (8.84).070 (1.78).040 (1.02).310 (7.87).290 (7.37).200 (5.08).140 (3.56).150 (3.81).115 (2.92).040 (1.02).020 (0.51).015 (0.38).008 (0.20) 3 MIN..110 (2.79).090 (2.29).022 (0.56).015 (0.38).400 (10.16).310 (7.87) Dimensions: inches (mm) 14-Pin PDIP (Narrow) PIN 1.260 (6.60).240 (6.10).770 (19.56).745 (18.92).310 (7.87).290 (7.37).200 (5.08).140 (3.56).150 (3.81).115 (2.92).040 (1.02).020 (0.51).015 (0.38).008 (0.20) 3 MIN..110 (2.79).090 (2.29).070 (1.78).045 (1.14).022 (0.56).015 (0.38).400 (10.16).310 (7.87) Dimensions: inches (mm) DS21464B-page 12 2002 Microchip Technology Inc.

SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 Microchip Technology Inc. DS21464B-page 13

NOTES: DS21464B-page 14 2002 Microchip Technology Inc.

Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks TheMicrochipnameandlogo,theMicrochiplogo,FilterLab, KEELOQ, microid, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dspic, ECONOMONITOR, FanSense, FlexROM, fuzzylab, In-Circuit Serial Programming, ICSP, ICEPIC, microport, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfpic, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company s quality system processes and procedures are QS-9000 compliant for its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. DS21464B - page 15

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