ANALYSIS OF GRID SYNCHRONISATION UNDER BALANCED AND UNBALANCED FAULTS USING PLL TECHNIQUES

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Volume 114 No. 12 2017, 525-533 ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version) url: http://www.ijpam.eu ijpam.eu ANALYSIS OF GRID SYNCHRONISATION UNDER BALANCED AND UNBALANCED FAULTS USING PLL TECHNIQUES K SainadhSingh 1, Ch.N.Narasimharao 2, Mrs. K. Mercy Roslina 3, A.Satya sairam 4 1Asst Professor, Department of E.E.E, Padmasri Dr. B. V. Raju Institute of Technology, Hyderabad, India E-mail: sainadhsingh@gmail.com 2,3 Asst. Professor, Department of E.E.E, Vignan s University, Vadlamudi, India E-mail: narsi.cherukuri@gmail.com 4 PG Student, Department of E.E.E, Vignan s University, Vadlamudi, India E-mail: aacharyasatya@gmail.com Abstract: In present days grid synchronization has become a major problem. Due to sudden increase in load unbalancing of power is increasing now days. Due to the imbalance of power, power system oscillations are increasing which results in out of synchronism. Hence during in this scheme synchronization of grid is big task. This paper proposes three advanced synchronization system and compared using Mat lab and study the capability of synchronism. The three advanced phase locked loop (PLL) techniques are DDSRF (decoupled double synchronous reference frame), DSOGI (dual second order generalized integrator) and 3phE (three phase enhanced PLL) Keywords:Grid synchronization, PLL (phase locked loop), frequency change, STATCOM, DDSRR- PLL, DSOGI-PLL, 3phE-PLL. 1 INTRODUCTION Now a day s synchronization is a big task. Due to exponential increase in load there is an increase in power imbalance which increases the power system oscillation. Due to increase in power system oscillations results out of synchronism. Three phase locked loop techniques gives solution for the synchronization problem. The DDSRF-PLL, DSOGI-PLL, 3phE PLL are the techniques of phase locked loop. The grid synchronization issues under symmetric Department of Electrical and Engineering, VFSTR University, Vadlamudi, Guntur, ** Email: narsi.cherukuri@gmail.com 525

and asymmetric faults are analyzed and compared using MATLAB and also synchronism capability is studied. 2 ILLUSTRATION OF THREE SYNCHRONISATION SYSTEMS The three advanced synchronization techniques are as follows A.DDSRF PLL: The circuit diagram of DDSRF is shown in figure 1. The decoupled double synchronous reference frame PLL schematic diagram is shown below. The DDSRF loop controller works on the decoupled q-axis signal of positive sequence SRF. Because of decoupling cells results this signal is free of ac components and also bandwidth of the loop controller can increase more. 3 Fig 1: Decoupling network of DDSRF PLL B.DSOGI PLL: The DSOGI PLL circuit diagram is shown in the figure 2. The following schematic diagram shows the dual second order generalised integrator phase locked loop. To find the quadrature components in 2 phase system, both quadrature element and inphase elements are needed. To find the positive and negative sequence components of unbalanced input supply, both phase component and quadrature component of input signal is useful. By combining DSOGI and the reference frame the in phase and quadrature components has been generated. 526

Figure 2: Algorithm of DSOGI PLL C.3phE PLL: An EPLL is actually an adaptive band pass filter, which is able to adjust the cut off frequency as a function of the input signal. Its structure was later adapted for the threephase case, in order to catch the positive-sequence vector of three-phase signals, obtaining the 3phEPLL that is represented in Figure 3.This technique provides good results for grid synchronism Figure 3: circuit diagram of 3phEPLL 3 SIMULATION RESULTS The overall circuit simulation is shown in figure 4. The synchronism capability by using three advanced techniques is analyzed and compared by using matlab. 527

Figure 4: overall circuit Figure 5: magnitude and theta value of feedback voltage Fig 5 shows the theta and magnitude values of the feedback voltage. The synchronization of voltage is achieved by using feedback voltage control. A POLLUTED VOLTAGE SOURCE: we know that due to the fault the voltage source will get polluted. The following figure 6 shows the simulation results of 3phase polluted 3phase voltage signals. 528

Figure 6: polluted voltage source B FILTERED VOLTAGE: Fig 7 shows the filtered voltage. The simulation results of filtered voltage for single phase voltage signal are displaced. Figure 7: filtered voltage C.TOTAL HARMONIC DISTORTION: The total harmonic distortion (THD) with 6.27percent which has high THD during the fault condition and it can be limited by using filter circuit is shown in fig 8. 529

Figure 8: THD (total harmonic distortion) 4 CONCLUSION In this paper behavior of three advanced PLL techniques of synchronization systems is studied using matlab. The three advanced techniques are performed individually for balanced and unbalanced faults. The algorithms of PLL techniques are digitally implemented. 5 REFERENCES 1. A. Zervos and C. Kjaer, Pure Power: Wind Energy Scenarios for 2030.European Wind Energy Association EWEA, Brussels (Belgium), INIS vol. 40, INIS issue. 27, 2006. 2. E - ON Grid code High and extra high voltage, Bayreuth, Germany. Apr. 2006 3. PO-12.3 Requisitos de RespuestaFrente a Huecos de Tension de lasinstalacioneseolicas, ComisiónNacional de Energía, Madrid, Spain, Oct. 2006. 4. IEEE Standard for Interconnecting Distributed Resources With Electric Power Systems, IEEE Std. 1547-2003, 2003. 5. The Grid Code: Revision 31, National Grid Electricity Transmission, Warwick, U.K., no. 3, Oct. 2008. 530

6. Elkraft System ogeltra, Vindmullertilsluttet net med sprindinger under 100 kv, Fredericia, Denmark. 7. M. Tsili and S. Papathanassiou, A review of grid code technical requirements for wind farms, IET Renew. Power Gen., vol. 3, no. 3, pp. 308 332, Sep. 2009. 8. F. Iov, A. Hansen, P. Sorensen, and N. Cutululis, Mapping of Grid Faults and Grid Codes, Risø Nat. Lab., Roskilde, Denmark, Tech. Rep. Risoe- R-1617, 2007. 9. A. Luna, P. Rodriguez, R. Teodorescu, and F. Blaabjerg, Low voltage ride through strategies for SCIG wind turbines in distributed power generation systems, in Proc. IEEE PESC, Jun. 15 19, no. 1, pp. 2333 2339, 2008. 10. D. Xiang, L. Ran, P. J. Tavner, and S. Yang, Control of a doubly fed induction generator in a wind turbine during grid fault ride-through, IEEE Trans. Energy Convers., vol. 21, no. 3, pp. 652 662, Sep. 2006 11. J. Morren and S. W. H. de Haan, Ridethrough of wind turbines with doubly-fed induction generator during a voltage dip, IEEE Trans. Energy Convers., vol. 20, no. 2, pp. 435 441, Jun. 2005. 12. M. Molinas, J. A. Suul, and T. Undeland, Low voltage ride through of wind farms with cage generators: STATCOM versus SVC, IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1104 1117, May 2008. 13. K. Li, J. Liu, Z. Wang, and B. Wei, Strategies and operating point optimization of STATCOM control for voltage unbalance mitigation in three-phase three-wire systems, IEEE Trans. Power Del., vol. 22, no. 1, pp. 413 422, Jan. 2007. 531

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