User s Guide SLVU006A

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User s Guide March 1999 Mixed-Signal Products SLVU006A

IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated

Preface Related Documentation From Texas Instruments Amplifiers, Comparators, and Special Functions Data Book (literature number SLYD011). This data book contains data sheets and other information on the TI operational amplifiers that can be used with this evaluation module. Power Supply Circuits Data Book (literature number SLVD002). This data book contains data sheets and other information on the TI shunt regulators that can be used with this evaluation module. FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. Trademarks TI is a trademark of Texas Instruments Incorporated. Chapter Title Attribute Reference iii

iv

Running Title Attribute Reference Contents 1 Introduction..................................................................... 1-1 1.1 Design Features............................................................ 1-2 1.2 Power Requirements........................................................ 1-2 2 Board Layout................................................................... 2-1 2.1 Physical Considerations..................................................... 2-2 2.2 Area 100 SOIC........................................................... 2-3 2.3 Area 200 TSSOP or MSOP................................................ 2-4 2.4 Area 300 SOT23-5A....................................................... 2-5 2.5 Area 400 SOT23-5B....................................................... 2-6 2.6 Component Placement...................................................... 2-7 2.7 Board Layout.............................................................. 2-8 3 Example Circuits................................................................ 3-1 3.1 Schematic Conventions..................................................... 3-1 3.2 Sallen-Key Low-Pass Filter.................................................. 3-2 3.3 Sallen-Key High-Pass Filter.................................................. 3-3 3.4 Inverting Amplifier.......................................................... 3-5 3.5 Noninverting Amplifier....................................................... 3-6 3.6 Two Operational Amplifier Instrumentation Amplifier............................. 3-7 3.7 Differential Amplifier......................................................... 3-9 Chapter Title Attribute Reference v

Running Title Attribute Reference Figures 21 Area 100 Schematic SOIC.................................................... 2-3 22 Area 200 Schematic TSSOP and MSOP....................................... 2-4 23 TLV22X1 Device Pinout........................................................ 2-5 24 Area 300 Schematic SOT235A............................................... 2-5 25 TLV2771 and TLV2461 Device Pinout........................................... 2-6 26 Area 400 Schematic SOT235B............................................... 2-6 27 Universal Operational Amplifier EVM Board Component Placement................. 2-7 28 Universal Operational Amplifier EVM Board Layout Top............................ 2-8 29 Universal Operational Amplifier EVM Board Layout Bottom......................... 2-9 31 Sallen-Key Low-Pass Filter with Dual Supply Using Area 100....................... 3-2 32 Sallen-Key High-Pass Filter with Single Supply Using Area 200..................... 3-4 33 Inverting Amplifier with Dual Supply Using Area 300............................... 3-5 34 Noninverting Amplifier with Single Supply Using Area 400.......................... 3-6 35 Two Operational Amplifier Instrumentation Amplifier with Single Supply.............. 3-8 36 Single Operational Amplifier Differential Amplifier with Single Supply................. 3-9 vi

Chapter 1 Introduction This User s Guide describes a universal operational amplifier (op amp) evaluation module (EVM) that simplifies evaluation of surface-mount op amp. Topic Page 1.1 Design Features.............................................. 12 1.2 Power Requirements.......................................... 12 Introduction 1-1

Design Features 1.1 Design Features The evaluation module board design allows many different circuits to be constructed easily and quickly. The board has four separate circuit development areas that can be snapped apart and separated. Areas 100 and 200 are for dual op amps in the SOIC and TSSOP/MSOP packages. Areas 300 and 400 are for SOT235 single operational amplifier packages. A few possible circuits are listed below: Voltage Follower Noninverting Amplifier Inverting Amplifier Simple or Algebraic Summing Amplifier Difference Amplifier Current-to-Voltage Converter Voltageto-Current Converter Integrator/Low-Pass Filter Differentiator/High-Pass Filter Instrumentation Amplifier Sallen-Key Filter The EVM PCB is of two-layer construction, with a ground plane on the solder side. Circuit performance should be comparable to final production designs. 1.2 Power Requirements The devices and designs that are used dictate the input power requirements. Three input terminals are provided for each area of the board: Vx+ Positive input power for area x00 i.e., V1+ area 100 GNDx Ground reference for area x00 i.e., GND2 area 200 Vx Negative input power for area x00 i.e., V4 area 400 Each area has four bypass capacitors, two for the positive supply, and two for the negative supply. Each supply should have a 1-µF to 10-µF capacitor for low frequency bypassing and a 0.01-µF to 0.1-µF capacitor for high frequency bypassing. When using single supply circuits, the negative supply is shorted to ground by bridging Cx02 or Cx06, and power input is between Vx+ and GNDx. The voltage reference circuitry is provided for single supply applications that require a reference voltage to be generated. 1-2 Introduction

Chapter 2 Evaluation Module Layout This chapter describes and shows the universal op amp EVM board layout and the relationships between the four areas. Topic Page 2.1 Physical Consideration........................................ 22 2.2 Area 100 SOIC.............................................. 23 2.3 Area 200 TSSOP or MSOP.................................... 24 2.4 Area 300 SOT23-5A.......................................... 25 2.5 Area 400 SOT23-5B.......................................... 26 2.6 Component Placement........................................ 27 2.7 Board Layout................................................. 28 Evaluation Module Layout 2-1

Physical Considerations 2.1 Physical Considerations The EVM board has four circuit development areas. If a specific area is desired, it can be separated from the others by breaking along the score lines. The circuit layout in each area supports an op amp package, voltage reference, and ancillary devices. The op amp package is unique to each area as described in the following paragraphs. The voltage reference and supporting devices are the same for all areas. Surface-mount or through-hole devices can be used for all capacitors and resistors on the board. The voltage reference can be either surface mount or through hole. If surfacemount is desired, the TLV431ACDBV5 or TLV431AIDBV5 adjustable shunt regulators can be used. If through hole is desired, then the TLV431ACLP, TLV431AILP, TL431CLP, TL431ACLP, TL431ILP or TL431AILP adjustable shunt regulators can be used. Refer to Texas Instruments Power Supply Circuits Data Book (literature number SLVD002) for details on usage of these shunt regulators. Each passive component, resistor and capacitor, has a surface-mount 1206 foot print with through holes at 0.2 spacing on the outside of the 1206 pads. Therefore, either surface-mount or through-hole parts can be used. 2-2 Evaluation Module Layout

Area 100 SOIC 2.2 Area 100 SOIC Figure 21. Area 100 Schematic SOIC Area 100 uses 1xx reference designators, and is compatible with dual op amps in 8-pin SOIC packages. Most dual op amps are available in this package. This surface-mount package is designated by a D suffix in TI part numbers as in TLV2422CD, TLV2342ID, TLV2252ID, etc. Refer to Figure 21 for a schematic. R118 C105 V1+ V1+ A101 R106 C112 R105 V1+ GND1 V1 C104 C109 C103 C110 A102 A103+ A104+ R107 R108 R109 R119 2 3 8 1 + U101a 4 V1 A1OUT 1/2 Dual OP Amp Power Supply Bypass V1 C111 R117 C106 V1+ R112 C102 R114 VREF1 B101 R103 C107 R104 R115 C R116 R A U102 B102 B103+ B104+ R102 R101 R110 R111 6 5 + 7 U101b B1OUT 1/2 Dual OP Amp Voltage Reference C108 R113 C101 Evaluation Module Layout 2-3

Area 200 TSSOP or MSOP 2.3 Area 200 TSSOP or MSOP Area 200 uses 2xx reference designators, and is compatible with dual op amps in an 8-pin TSSOP or MSOP package. The TSSOP package is designated by a PW suffix in TI part numbers as in TLV2422CPWLE, TLV2342IPWLE, TLV2252AIPWLE, etc. The MSOP package is designated by a DGK suffix in TI part numbers as in TLV2462CDGK. Refer to Figure 22 for a schematic. Figure 22. Area 200 Schematic TSSOP and MSOP R218 C205 V2+ V2+ A201 R206 C212 R205 V2+ GND2 V1 C204 C209 C203 C210 A202 A203+ A204+ R207 R208 R209 R219 2 3 8 1 + U201a 4 V2 A2OUT 1/2 Dual OP Amp Power Supply Bypass V2 C211 R217 C206 V2+ R212 C202 R214 VREF2 B201 R203 C207 R204 R215 C R216 R A U202 B202 B203+ B204+ R202 R201 R210 R211 6 5 + 7 U201b B2OUT 1/2 Dual OP Amp Voltage Reference C208 R213 C201 2-4 Evaluation Module Layout

Area 300 SOT23-5A 2.4 Area 300 SOT23-5A Figure 23. TLV22X1 Device Pinout Area 300 uses 3xx reference designators, and is compatible with single op amps in the 5-pin SOT-23 package with the pinout used for the TLV22X1 as shown in Figure 23. This surface-mount package is designated by a DBV suffix in TI part numbers as in TLV2211CDBV, TLV2221CDBV, TLV2361CDBV, TLV2231IDBV, etc. Note: other parts like TLV2771CDBV, TLV2711CDBV, TLV2461CDBV, etc., follow different pin-out schemes, which are not compatible with this layout. See Figure 24 for a schematic. IN+ 1 5 VDD+ VDD/GND 2 IN 3 4 OUT Figure 24. Area 300 Schematic SOT23-5A R318 C305 V3+ V3+ 301 R306 C312 R305 V3+ GND3 V3 C304 C309 C303 C310 302 303+ 304+ R307 R308 R309 R319 3 1 5 4 + U301 2 V3 3OUT Power Supply Bypass V3 C311 R317 V3+ C306 R314 VREF3 R315 C R A U302 R316 Voltage Reference Evaluation Module Layout 2-5

Area 400 SOT23-5B 2.5 Area 400 SOT23-5B Area 400 uses 4xx reference designators, and is compatible with single op amps in the 5-pin SOT-23 package with the pinout used for the TLV2271CDBV and TLV2461CDBV as shown in Figure 25. This surface-mount package is designated by a DBV suffix in TI part numbers as in TLV2771CDBV and TLV2461CDBV. Note: earlier parts like TLV2221CDBV, TLV2231IDBV, TLV2361CDB, and TLV2711CDBV, etc., follow a different pin-out scheme, which is not compatible with this layout. Refer to Figure 26 for a schematic. Figure 25. TLV2771 and TLV2461 Device Pinout OUT 1 5 VDD+ VDD/GND 2 IN+ 3 4 IN Figure 26. Area 400 Schematic SOT23-5B R418 C405 V4+ V4+ 401 R406 C412 R405 V4+ GND4 V4 C404 C409 C403 C410 402 403+ 404+ R407 R408 R409 R419 4 3 5 1 + U401 2 V4 4OUT Power Supply Bypass V4 C411 R417 V4+ C406 R414 VREF4 R415 C R A U402 R416 Voltage Reference 2-6 Evaluation Module Layout

Component Placement 2.6 Component Placement Figure 27 shows component placement for the EVM board. Figure 27. Universal Operational Amplifier EVM Board Component Placement Area 100 SOIC Area 200 TSSOP/MSOP UNIVERSAL OP AMP EVM SOIC SLOP120-1 1998 UNIVERSAL OP AMP EVM TSSOP/MSOP SLOP120-2 1998 B104+ B103+ B102 B101 B1OUT V1+ VREF1 GND1 V1 A1OUT A101 A102 A103+ A104+ R101 C101 R102 R103 R104 C102 C103 C104 U101 C105 R105 R106 R107 C106 R108 R109 R110 R111 C107 R112 R113 C108 R114 U102 R115 R116 C109 C110 C111 R117 R118 C112 R119 R219 C212 R218 R217 C211 C210 C209 R216 R215 U202 R214 C208 R213 R212 C207 R211 R210 R209 R208 C206 R207 R206 R205 C205 U201 C204 C203 C202 R204 R203 R202 C201 R201 A204+ A203+ A202 A201 A2OUT V2 VREF2 GND2 V2+ B2OUT B201 B202 B203+ B204+ Score Line R318 R306 C312 R307 R305 C305 C310 C309 U301 C304 C306 C303 R319 R308 R309 C311 R317 R406 C412 R418 R407 R405 C405 C403 C404 U401 C409 C410 C406 R419 R408 R409 C411 R417 R416 R415 U402 R414 VREF4 404+ 403+ V4 4OUT V4+ GND4 402 401 R316 R315 U302 R314 VREF3 304+ 303+ V3+ GND3 V3 3OUT 302 301 UNIVERSAL OP AMP EVM SOT23-5A SLOP120-3 1998 Area 300 SOT23-5A UNIVERSAL OP AMP EVM SOT23-5B SLOP120-4 1998 Area 400 SOT23-5B Score Line Evaluation Module Layout 2-7

Board Layout 2.7 Board Layout Figures 28 and 29 show the EVM top and bottom board layouts, respectively. Figure 28. Universal Operational Amplifier EVM Board Layout Top 2-8 Evaluation Module Layout

Board Layout Figure 29. Universal Operational Amplifier EVM Board Layout Bottom Evaluation Module Layout 2-9

2-10 Evaluation Module Layout

Chapter 3 Example Circuits This chapter shows and discusses several example circuits that can be constructed using the universal operational amplifier EVM. The circuits are all classic designs that can be found in most operational amplifier design books. Topic Page 3.1 Schematic Conventions....................................... 31 3.2 Sallen-Key Low-Pass Filter.................................... 32 3.3 Sallen-Key High-Pass Filter.................................... 33 3.4 Inverting Amplifier............................................ 35 3.5 Noninverting Amplifier........................................ 36 3.6 Two Operational Amplifier Instrumentation Amplifiers........... 37 3.7 Differential Amplifier.......................................... 39 3.1 Schematic Conventions Figures 31 through 36 show schematics for a sampling of circuits that can be constructed on the Universal Operational Amplifier EVM. The components that are placed on the board are shown in bold and unused components are blanked out. s and other changes are noted. These examples are only a few of the many circuits that can be built on the EVM. Example Circuits 3-1

Sallen-Key Low-Pass Filter 3.2 Sallen-Key Low-Pass Filter Figure 31 shows area 100 equipped with a dual operational amplifier configured as a second-order Sallen-Key low-pass filter using dual-power supplies. Basic set up is done by proper choice of resistors R and mr, and capacitors C and nc. The transfer function is: V OUT 1 V IN 1. f fo. 2.j Q.. f fo. Where: f o 2 1 2mnRC And Q 2 mn m1 Figure 31. Sallen-Key Low-Pass Filter with Dual Supply Using Area 100 R118 C105 V1+ GND1 V1 C104 C103 0.1 µ F 1µF C109 C110 0.1 µ F 1µF Power Supply Bypass V1+ V1 A101 A102 A103+ A104+ + V in R106 R107 R108 mr R109 C112 R119 R C111 R105 V1+ 2 8 1 3 + U101a 4 V1 R117 Vout Vin = 1 1 (f/fo)2 + (j/q)(f/fo) A1OUT 1/2 Dual OP Amp 1 fo = 2π mn RC Q = mn m+1 C106 V1+ R101 VREF1 R114 C U102 R A R115 B101 B102 B103+ B104+ R103 R102 R101 R110 R112 C107 R111 nc C102 R104 6 7 5 + U101b B1OUT 1/2 Dual OP Amp Voltage Reference Not Used C108 R113 Not Used C101 3-2 Example Circuits

Sallen-Key High-Pass Filter 3.3 Sallen-Key High-Pass Filter Figure 32 shows area 200 equipped with a dual operational amplifier configured as a second-order Sallen-Key high-pass filter using single-supply power input. Basic setup is done by proper choice of resistors R and mr, and capacitors C and nc. Note that capacitors should be used for components R210 and R211, and a resistor for C201. The transfer function for the circuit as shown is:. f fo. 2 V OUT V IN 7 6 7 6 61.j Q.. f fo.. f fo. 2 6 VREF2 Where: f o 2 1 2mnRC And Q 2 mn n1 The TL431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V2+ in a 5 V system. Another option is to adjust resistors R215 and R216 for the desired VREF2 voltage. The formula for calculating VREF2 is: VREF2 2.50 V. R215 R216 R216. Example Circuits 3-3

Sallen-Key High-Pass Filter Figure 32. Sallen-Key High-Pass Filter with Single Supply Using Area 200 R218 C205 V2+ GND2 V1 C204 C203 0.1 µf 1 µf C209 C210 V2+ A201 A202 A203+ A204+ R206 R207 R208 R209 C212 R219 R205 V2+ 2 8 1 3 + U201a 4 V2 A2OUT 1/2 Dual OP Amp Not Used Power Supply Bypass V2 C211 R217 C206 R212 C202 VREF2 = 2.5 V V2+ B201 R214 B202 2.2 kω B204+ R215 C B203+ U202 R A TL431ACLP R216 R203 R202 R201 mr R210 C + V in C207 R211 nc C208 R204 6 7 5 + U201b R213 VOUT = VIN B2OUT 1/2 Dual OP Amp (f/fo)2 1+(j/Q)(f/fo) (f/fo)2 1 fo = 2π mn RC Q = mn m+1 + VREF2 Voltage Reference B204 + to VREF2 C201 R 3-4 Example Circuits

Inverting Amplifier 3.4 Inverting Amplifier Figure 33 shows area 300 equipped with a single operational amplifier configured as an inverting amplifier using dual power supplies. Note the pinout for the operational amplifier in area 300 follows the TLV2211 type pinout. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT V IN R305 R307 To cancel the effects of input bias current, set R317 = R305 R307, or use a 0 Ω jumper for R317 if the operational amplifier is a low input bias operational amplifier. Figure 33. Inverting Amplifier with Dual Supply Using Area 300 R318 C305 V3+ GND3 V3 V3+ C304 C303 0.1 µf 1 µf C309 C310 0.1 µf 1 µf Power Supply Bypass V3 + 301 302 303+ 304+ V in R306 R307 R308 R309 C312 R319 C311 3 1 R305 V3+ 5 4 + U301 2 V3 R317 V OUT = V IN R305 R307 3OUT R317 = R305 II R307, or Short if Using Low Input Bias Op Amp V3+ C306 R314 VREF3 R315 C R A U302 R316 Voltage Reference Not Used Example Circuits 3-5

Noninverting Amplifier 3.5 Noninverting Amplifier Figure 34 shows area 400 equipped with a single operational amplifier configured as a noninverting amplifier with single supply power input. Note the pinout for the operational amplifier in area 400 follows the TLV2771 type pinout. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT V IN.1 R405 R407. VREF4 Note that the input signal must be referenced to VREF4. To cancel the effects of input bias current, set R409 = R405 R407, or use a 0 Ω jumper for R409 if the operational amplifier is a low input bias operational amplifier. The TL431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V4+ in a 3 V system. Another option is to adjust resistors R415 and R416 for the desired VREF4 voltage. The formula for calculating VREF4 is: VREF4 1.24 V. R415 R416. R416 Figure 34. Non-Inverting Amplifier with Single Supply Using Area 400 V4+ R418 C405 V4+ GND4 V4 C404 C403 0.1 µf 1 µf C409 C410 Power Supply Bypass 401 402 to VREF4 402 403+ V4 404+ R406 R407 R408 R409 C412 R419 5 3 R405 V4+ 4 4 + U401 2 V4 4OUT ( ) R405 VOUT = VIN +1 + VREF4 R407 R415 C R A R416 V4+ R414 2.2 kω VREF4 = 1.24 V U402 = TLV431ACDBV5 + Input Signal With Reference to VREF4 Vin C411 R417 C406 R409 = R405 II R407, or Short if Using Low Input Bias Op Amp Voltage Reference 3-6 Example Circuits

Two Operational Amplifier Instrumentation Amplifier 3.6 Two Operational Amplifier Instrumentation Amplifier Figure 35 shows area 200 equipped with a dual operational amplifier configured as a two-operational-amplifier instrumentation amplifier using a voltage reference and single power supply. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: Where V OUT V IN.1 2R205 R207 R205 R206. VREF2 R205 = R202 and R206 = R204 To cancel the effects of input bias current, set R209 = R205 R207 and set R210 = R202 R204, or use a 0 Ω jumper for R209 and R210 if the operational amplifier is a low input bias operational amplifier. The TLV431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V2+ in a 3 V system. Another option is to adjust resistors R215 and R216 for the desired VREF2 voltage. The formula for calculating VREF2 is: VREF2 1.24 V. R215 R216 R216. Example Circuits 3-7

Two Operational Amplifier Instrumentation Amplifier Figure 35. Two Operational Amplifier Instrumentation Amplifier with Single Supply Using Area 200 R218 C205 A201 to B2OUT V2+ GND2 V1 C204 C203 0.1 µf 1 µf C209 C210 Power Supply Bypass R215 C R216 R209 = R205 II R207 or Short if Using Low Input Bias Op Amp R A V2+ V2+ V2 VREF2 to B202 R214 2.2 kω VREF2 = 1.24 V U202 TL431ACDBV5 A201 A202 A203+ A204+ A202 to B201 + Vin B201 B202 B203+ B204+ R206 R207 R208 R209 R203 R202 R201 R210 C212 R219 C211 R212 C207 R211 R205 V2+ 2 8 1 3 + U201a 4 6 5 + V2 R217 C206 C202 R204 7 U201b 2R205 R205 VOUT = Vin(1+ R207 + R206 )+ VREF2 A2OUT 1/2 Dual OP Amp R205 = R202 R206 = R204 B2OUT 1/2 Dual OP Amp Voltage Reference R210 = R202 II R204 or Short if Using Low Input Bias Op Amp C208 R213 C201 3-8 Example Circuits

Differential Amplifier 3.7 Differential Amplifier Figure 36 shows area 300 equipped with a single operational amplifier configured as a differential amplifier using a voltage reference and single power supply. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: Where V OUT V IN. R305 R307. VREF3 R305 R307 R309 R308 The TLV431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V3+ in a 3 V system. Another option is to adjust resistors R315 and R316 for the desired VREF3 voltage. The formula for calculating VREF3 is: VREF3 1.24 V. R315 R316. R316 Figure 36. Single Operational Amplifier Differential Amplifier with Single Supply Using Area 300 R318 C305 V3+ GND3 V3 V3+ C304 C303 0.1 µf 1 µf C310 Power Supply Bypass V3 V3+ + 301 302 V in 303+ 304+ R306 R307 R308 R309 C312 R319 C311 3 1 R305 V3+ 5 4 + U301 2 V3 R317 V out = V in 3OUT R305 R307 ( ) + VREF3 R305 R307 = R309 R308 R314 2.2 kω VREF3 = 1.24 V C306 R315 C R A R316 U302 TL431ACDBV5 304+ to VREF3 Voltage Reference Example Circuits 3-9

3-10 Example Circuits