STP5N05K5 N-channel 050 V, 2.9 Ω typ., 3 A MDmesh K5 Power MOSFET in a TO-220 package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STP5N05K5 050 V 3.5 Ω 3 A 85 W Worldwide best FOM (figure of merit) Ultra low gate charge 00% avalanche tested Zener-protected Figure : Internal schematic diagram D(2, TAB) G() S(3) AM0476v Applications Switching applications Description This N-channel Zener-protected Power MOSFET is designed using ST s revolutionary avalancherugged very high voltage MDmesh K5 technology, based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance, and ultra-low gate charge for applications which require superior power density and high efficiency. Table : Device summary Order code Marking Package Packaging STP5N05K5 5N05K5 TO-220 Tube October 204 DocID026703 Rev 3 /4 This is information on a product in full production. www.st.com
Contents STP5N05K5 Contents Electrical ratings... 3 2 Electrical characteristics... 4 2. Electrical characteristics (curves)... 6 3 Test circuits... 9 4 Package mechanical data... 0 4. TO-220 package mechanical data... 5 Revision history... 3 2/4 DocID026703 Rev 3
STP5N05K5 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25 C 3 A ID Drain current (continuous) at TC = 00 C 2 A IDM () Drain current (pulsed) 2 A PTOT Total dissipation at TC = 25 C 85 W IAR Max current during repetitive or single pulse avalanche A EAS Single pulse avalanche energy (starting TJ = 25 C, ID=IAS, VDD= 50 V) 85 mj dv/dt (2) Peak diode recovery voltage slope 4.5 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns Tj Tstg Notes: Operating junction temperature Storage temperature () Pulse width limited by safe operating area (2) ISD 3 A, di/dt 00 A/µs, VDS(peak) V(BR)DSS (3) VDS 840 V - 55 to 50 C Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max.47 C/W Rthj-amb Thermal resistance junction-amb max 62.5 C/W DocID026703 Rev 3 3/4
Electrical characteristics STP5N05K5 2 Electrical characteristics (TCASE = 25 C unless otherwise specified). Table 4: On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS IDSS Drain-source breakdown voltage Zero gate voltage drain current VGS= 0, ID = ma 050 V VGS = 0, VDS = 050 V µa VGS = 0, VDS = 050 V, Tc=25 C 50 µa IGSS Gate body leakage current VDS = 0, VGS = ± 20 V ±0 µa VGS(th) Gate threshold voltage VDS = VGS, ID = 00 µa 3 4 5 V RDS(on) Static drain-source onresistance VGS = 0 V, ID=.5 A 2.9 3.5 Ω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 20 - pf Coss Output capacitance VDS =00 V, f= MHz, VGS=0-6 - pf Crss Reverse transfer capacitance - 0.5 - pf Co(tr) () Co(er) (2) Equivalent capacitance time related Equivalent capacitance energy related VGS = 0, VDS = 0 to 840 V - 26 - pf - 0 - pf RG Intrinsic gate resistance f = MHz open drain - 9 - Ω Qg Total gate charge VDD = 840 V, ID = 3 A - 2.5 - nc Qgs Gate-source charge VGS =0 V - 2 - nc Qgd Gate-drain charge Figure 6: "Gate charge test circuit" - 9.5 - nc Notes: () Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS (2) Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit Turn-on delay - 5.5 - ns time VDD = 525V, ID =.5 A, RG=4.7 Ω, tr Rise time VGS=0 V - 8.5 - ns td(on) td(off) Turn-off delay time Figure 8: " Unclamped inductive load test circuit" - 3 - ns tf Fall time - 24 - ns 4/4 DocID026703 Rev 3
STP5N05K5 Table 7: Source drain diode Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit ISD ISDM VSD () trr Qrr IRRM trr Qrr IRRM Notes: Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current () Pulsed: pulse duration = 300µs, duty cycle.5% - 3 A 2 A ISD= 3 A, VGS=0 -.5 V ISD= 3 A, VDD= 60 V di/dt = 00 A/µs, Figure 7: " Test circuit for inductive load switching and diode recovery times" ISD= 3 A,VDD= 60 V di/dt=00 A/µs, Tj=50 C Figure 7: " Test circuit for inductive load switching and diode recovery times" - 400 ns - 2.3 µc - 2 A - 560 ns - 3. µc - A Table 8: Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS = ± ma, ID=0 30 - - V The built-in back-to-back Zener diodes have specifically been designed to enhance the device's ESD capability. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. DocID026703 Rev 3 5/4
Electrical characteristics 2. Electrical characteristics (curves) Figure 2: Safe operating area GIPD030920436FSR ID (A) STP5N05K5 Figure 3: Thermal impedance 0 0. Operation in this area is Limited by max RDS(on) Tj=50 C Tc=25 C Single pulse 0.0 0. 0 00 000 VDS(V) 00µs ms 0ms Figure 4: Output characteristics GIPG2908204204FSR ID(A) 6 VGS=0, V 5 9V 4 3 8V 2 Figure 5: Transfer characteristics GIPG2908204334FSR ID (A) VDS=20V 5 4 3 2 7V 6V 0 0 5 0 5 20 VDS(V) 0 5 6 7 8 9 0 VGS(V) Figure 6: Gate charge vs gate-source voltage VGS (V) 0 VDS VDS=840V ID=3A GIPG2908204348FSR VDS (V) 200 Figure 7: Static drain-source on-resistance GIPG2908204400FSR RDS(on) (Ω) VGS=0V 4 8 800 3.5 6 600 3 4 2 400 200 2.5 2.5 0 0 2 4 6 8 0 2 0 Qg(nC) 0 2 3 4 ID(A) 6/4 DocID026703 Rev 3
STP5N05K5 Figure 8: Capacitance variations GIPG2908204409FSR C (pf) Electrical characteristics Figure 9: Source-drain diode forward characteristics GIPG2908204432FSR VSD (V) 000 00 Ciss 0.9 TJ=-50 C 0 Coss 0.8 TJ=25 C Crss 0. 0. 0 00 VDS(V) 0.7 TJ=50 C 0.6 0.5 0 0.5.5 2 2.5 3 ISD(A) Figure 0: Normalized gate threshold voltage vs temperature VGS(th) (norm).2 ID=00 µ A AM8082v Figure : Normalized on-resistance vs temperature. 0.9 0.8 0.7 0.6 0.5 0.4-00 -50 0 50 00 50 TJ( C) Figure 2: Normalized V(BR)DSS vs temperature V(BR)DSS AM8083v (norm) ID=m A..05 0.95 0.9 0.85-00 -50 0 50 00 TJ( C) Figure 3: Maximum avalanche energy GIPG2908204445FSR EAS (mj) 80 70 60 50 40 30 20 0 0 0 20 40 60 80 00 20 40 TJ( C) DocID026703 Rev 3 7/4
Electrical characteristics Figure 4: Output capacitance stored energy vs temperature GIPG290820449FSR Eoss (µj) STP5N05K5 4 2 0 0 200 400 600 800 VDS(V) 8/4 DocID026703 Rev 3
STP5N05K5 Test circuits 3 Test circuits Figure 5: Switching times test circuit for resistive load Figure 6: Gate charge test circuit Figure 7: Test circuit for inductive load switching and diode recovery times Figure 8: Unclamped inductive load test circuit Figure 9: Unclamped inductive waveform Figure 20: Switching time waveform DocID026703 Rev 3 9/4
Package mechanical data STP5N05K5 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 0/4 DocID026703 Rev 3
STP5N05K5 Package mechanical data 4. TO-220 package mechanical data Figure 2: TO-220 type A package outline DocID026703 Rev 3 /4
Package mechanical data STP5N05K5 Table 9: TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.6 0.88 b.4.70 c 0.48 0.70 D 5.25 5.75 D.27 E 0 0.40 e 2.40 2.70 e 4.95 5.5 F.23.32 H 6.20 6.60 J 2.40 2.72 L 3 4 L 3.50 3.93 L20 6.40 L30 28.90 ÆP 3.75 3.85 Q 2.65 2.95 2/4 DocID026703 Rev 3
STP5N05K5 Revision history 5 Revision history Table 0: Document revision history Date Revision Changes 7-Jul-204 First release. 03-Sep-204 2 5-Oct-204 3 Document status promoted from preliminary to production data. Added Section 3.: "Electrical characteristics (curves)" Minor text changes. Updated Figure 6: "Gate charge vs gate-source voltage"and Figure 8: "Capacitance variations" DocID026703 Rev 3 3/4
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