M.B. Patil, IIT Bombay 1 BJT Differential Amplifier Common-mode and difference-mode voltages A typical sensor circuit produces an output voltage between nodes A and B (see Fig. 1) such that V o1 = V c + V d, V o = V c V d, (1) where V c is called the common-mode voltage and V d the difference-mode or differential voltage. The common-mode voltage is a result of the biasing arrangement used within the sensor Sensor circuit V o1 = V c + V d V o = V c V d Figure 1: Example of common-mode and difference-mode voltages. circuit, and it can be large (a few volts). The difference-mode voltage is the quantity of actual interest, and it is a measure of the quantity being sensed (such as temperature, pressure, or concentration of a species in a gas). The difference-mode voltage is typically much smaller (say, a few mv) as compared to the common-mode voltage. Of these, the common-mode voltage is obviously a necessary devil, something we cannot simply wish away 1. What we can do is to amplify only the differential quantity (V d ) while rejecting the common-mode quantity (V c ) by making use of a differential amplifier, as shown in Fig.. If and V i are expressed as = V ic + V id / and V i = V ic V id /, the output of Sensor circuit Sensor circuit V o V V o i V i V o Differential Differential Amplifier Amplifier Figure : Sensor of Fig. 1 connected to a differential amplifier: single-ended output, differential output. 1 Another situation in which we want to reject the common-mode signal is a telephone line where we want to amplify the true signal the difference between the voltages on the two wires but reject the spurious common-mode electromagnetic interference riding on each wire. V o1
M.B. Patil, IIT Bombay the differential amplifier is given by, V o = A d V id + A c V ic, () where A d is the differential gain, and A c is the common-mode gain. A good differential amplifier should reject V ic entirely, i.e., it should have A c = 0. In reality, A c for a differential amplifier is small but finite, and a figure of merit called the Common-Mode ejection atio (CM) is used to indicate the effectiveness of the amplifier in rejecting common-mode inputs. The CM is defined as CM = A d A c. (3) In this experiment, our objective is to wire up a simple differential amplifier circuit and to see how its CM can be improved. The BJT differential pair The circuit shown in Fig. 3, known as the BJT differential pair, can be used to amplify only the differential input signal V id = ( V i ) while rejecting the common-mode signal V ic = 1 (V i1+ V i ). The two resistors are assumed to be matched and so are the BJTs Q 1 and Q. V CC V c1 V o V c Q 1 Q V i I 0 Figure 3: BJT differential pair. Let us first look at the large-signal behaviour of the circuit. The two emitter currents are given by I e1 = I ( ) s α exp Vi1 V e, I e = I ( ) s V T α exp Vi V e V T Note that Q 1 and Q should not only be identical in construction (fabrication), they must also operate at the same temperature. (4)
M.B. Patil, IIT Bombay 3 (with α = β β + 1 1), and they must satisfy the constraint I e1 + I e = I 0. From Eq. 4, we can write I 0 I 0 I e1 =, I 1 + e V e =. (5) id/v T 1 + e +V id/v T The collector currents are I c1 = αi e1 I e1 and I c = αi e I e. Fig. 4 shows I c1 and I c as a function of V id = V i. Note the steering effect of the input voltage on the collector currents. When V id > 0 V, I c1 is larger than I c ; when V id > 0 V, I c is larger. When V id is about 4 V T, almost the entire current I 0 is conducted by Q 1 ; when it is about 4 V T, it is conducted by Q. linear region 1 I c /I 0 I c1 /I 0 0 6 4 0 4 6 Figure 4: Normalised collector currents I c1 and I c versus V id. V id /V T Our interest is in using the circuit as an amplifier, and we are therefore looking for the region of V id where I c1 and I c vary linearly with V id (see Fig. 4). In this linear region, the higher-order terms in ( ) ( ) Vid Vid exp = + 1 ( ) Vid + 1 ( ) 3 Vid + (6) V T V T V T 6 V T must be sufficiently small, i.e., V id must be much smaller than V T, something like V id < 0. V T, making the width of the linear region in Fig. 4 about 0. V T or 10 mv at room temperature. The output voltage V o (see Fig. 3) is given by V o = V c1 V c = (V CC I c1 ) (V CC I c ) = (I c I c1 ). (7)
M.B. Patil, IIT Bombay 4 In the linear region, The output voltage is For V id V T, we have I c1 = I c = 1 + e V id/v T 1 + e +V id/v T V o = (I c I c1 ) 1 + 1 V id /V T = 1 + 1 + V id /V T = = [( V id /V T ) ( + V id /V T )] ( + V id /V T )( V id /V T ) V id /V T, (8) + V id /V T. (9). (10) V o = 4 V id V T. (11) Since / = I c1 = I c when V id 0, and with g m = I C /V T = (I 0 /)/V T, we get A d V o V id = g m. (1) Note that V o does not involve the common-mode voltage V ic at all, exactly as we would like. In a real circuit, this is not quite true, as we shall see later. Small-signal analysis The expression in Eq. 1 can also be obtained using small-signal analysis of the BJT differential pair. The ideal current source in Fig. 3 is replaced with an open circuit in small-signal analysis. Using the T equivalent circuit for the BJTs, we then obtain the small-signal equivalent circuit shown in Fig. 5. By symmetry, we have i e1 = i e = v id. The output voltage is v o = v c1 v c = αi e1 αi e = α v id = g m v id A d = g m, (13) using g m = α/. The same relationship can be obtained using the equivalent circuit shown in Fig. 5 where the hybrid-π equivalent circuit is used for the BJTs. Implementation using discrete transistors The BJT differential pair is an integral part of op amp integrated circuits. In this experiment, we will make up the circuit using discrete transistors. Since the transistors are supposed to be identical in all respects and also operating at the same temperature, it is best to use emittercoupled transistors in a chip providing an array of BJTs, such as CA3096 or LM3086. Fig. 6 shows a simple implementation of the circuit of Fig. 3 with a crude current source, viz., a simple resistor. With = V i = 0 V, the emitter voltage is about 0.7 V, and the
M.B. Patil, IIT Bombay 5 v c1 v o v c α i e1 α i e v id + v id + v id v c1 v o v c ie1 i e ib1 r π r π βi b1 βi b i b v id Figure 5: Small-signal equivalent circuit of the BJT differential pair: using T equivalent circuit for the BJTs, using the hybrid-π equivalent circuit for the BJTs (the output resistance of the BJTs r o is assumed to be large). V CC V CC V c1 V c V c1 V c Q 1 Q V i Q 1 Q Figure 6: Practical implementation of the BJT differential pair: with general inputs and V i, with = V i = 0 V. bias current I 0 is therefore each transistor carrying I 0 /. amplifier. I 0 = 0.7 () = V EE 0.7, (14) Let us find the differential- and common-mode gains for this Consider = v id / and V i = v id /. The small-signal equivalent circuit for this situation is shown in Fig. 7. Writing KCL at the common emitter, we get
M.B. Patil, IIT Bombay 6 v c1 v c v c1 v c α i e1 α i e α i e α i e + v id ie1 i e v id v ic i e i e v ic v e v e i e Figure 7: Small-signal equivalent circuit for the differential amplifier of Fig. 6: computation of A d, computation of A c. 1 [ ] vid v e + 1 [ ] vid v e v e = 0, (15) giving v e = 0, i.e., the common emitter as AC ground. The circuit now reduces to that shown in Fig. 5, and we have i e1 = i e = v id, v c1 = α i e1 = α v id = 1 g m v id. (16) Similarly, v c = + 1 g m v id. If the output is taken in a single-ended fashion (say, v o v c1, we have A d = 1 g m. If it is taken in a differential fashion (v o v c1 v c ), we have A d = g m. To find the common-mode gain, we apply a small signal v i1 = v i = v ic, as shown in Fig. 7. Because of symmetry, i e1 = i e i e, v ic = i e ( + ), and we get v c1 = v c = α i e = α v ic +. (17) If the output is taken in a single-ended manner (v o = v c1 or v c ), the common-mode gain is 3 A c = v c1 v ic = α +. (18) If the output is taken in a differential manner, v o = v c1 vc = 0 since v c1 and v c are the 3 Note that A c is independent of bias, and we can expect the expression to hold even for large values of the common-mode voltage.
M.B. Patil, IIT Bombay 7 same 4, giving V c = 0. For this reason, the output of the first stage of an op amp is taken in a differential manner and fed to the second stage, thus resulting in a large value of CM. Improved current source The CM of the circuit in Fig. 6 is CM = A d A c = 1 g m 1 / = g m, (19) when the output is taken in a single-ended manner. By increasing, the CM can be improved; however, this will reduce the bias current I 0 (see Eq. 14) and therefore the differential gain A d = 1 g m. Is there a way to provide the desired bias current and simultaneously achieve a high CM? The key is to use a current source instead of the resistor. Fig. 8 shows a simple current mirror which can provide a current I 0 which is nearly independent of the voltage V C4. The I ref I 0 V c3 V c4 Q 3 Q 4 Figure 8: A simple current mirror. operation of the current mirror is straightforward: The voltage V C3 is equal to V B3 which is about + 0.7 V, and the current I ref is therefore I ref = 0 ( + 0.7) = V EE 0.7. (0) If transistors Q 3 and Q 4 are identical and are operating at the same temperature, the two collector currents given by I C3 = I s e V BE3/V T and I C4 = I s e V BE4/V T (1) are identical. Furthermore, if β is sufficiently large, we can ignore the base currents and get I 0 = I C4 = I C3 I ref V EE 0.7. () 4 In practice, it is still possible for the output voltage to have a common-mode component (much smaller than the single-ended output case) due to mismatch in the resistance values and BJT parameters [1].
M.B. Patil, IIT Bombay 8 This is indeed what we are looking for a constant current I 0 which is independent of V C4. This is the basic idea behind a current source. In practice, I C4 would show a small variation with V C4 due to the Early effect (see Fig. 9), with the slope I C4 V C4 equal to I 0 /V A, where V A is the Early voltage (typically greater than 50 V) of the BJT 5. Consequently, the small-signal equivalent circuit of this current source would simply be a resistance r o = V A /I 0, the output resistance of Q 4. 1.5 I C4 IC3 I ref 10 k V C4 I C3 Q 3 Q 4 I C4 IC3, IC4 (ma) 1.0 0.5 15 V 0 15 10 5 0 V C4 (volts) Figure 9: I C3 and I C4 versus V C4 for the simple current mirror of Fig. 8 (representative plot). Fig. 10 shows an improved differential amplifier circuit using the simple current mirror as the current source. The corresponding small-signal equivalent circuit is shown in Fig. 10. Since the small-signal circuit is the similar to that of Fig. 7, we can use ouarliexpressions for A d and A c by replacing with r o. If single-ended output is considered, we get A d = 1 g m, A c = r o, (3) where r o is the output resistance of Q 4. Since r o is typically much larger than, a significant reduction in A c is obtained. eferences 1. A.S. Sedra and K.C. Smith and A.N. Chandorkar, Microelectronic Circuits Theory and Applications. New Delhi: Oxford University Press, 009.. P.. Gray and.g Meyer, Analysis and Design of Analog Integrated Circuits. Singapore: John Wiley and Sons, 1995. 5 Note that near V CE4 = 0 V (i.e., V C4 = ), the currents drop since Q 4 is not in the active region any more. This region should of course be avoided.
M.B. Patil, IIT Bombay 9 V CC V c1 V c v c1 v c α i e1 α i e Q 1 Q V i v i1 i e1 v i I 0 v e i e V c4 Q 3 Q 4 r o Figure 10: Improved differential amplifier using a simple current mirror, small-signal equivalent circuit.