Performnce of 3-Phse 4-Wire Solid Stte Trnsformer under Imblnced ods To Yng, onn Meere, Orl Feely, Terence O'Donnell School of Electricl, Electronic nd ommuniction Engineering University ollege Dublin, Belfield, Dublin 4, Irelnd Emil: to.yng@ucdconnect.ie Abstrct The modern distribution grid hs seen substntil chnge in lod profile over recent decdes, with growing prolifertion of imblnced lods. This presents mjor chllenge for power qulity on the distribution grid leding to possible re-evlution of grid topologies. The Solid Ste Trnsformer (SST) is potentil enbling technology to control nd regulte system opertion under these imblnced conditions. This pper investigtes the opertion of 3-stge SST design (ectifier- Dul Active Bridge Inverter) under imblnced lod conditions. The performnce of the SST in 3- phse, 3 wire system nd in 3 phse, 4 wire system is studied using Mtlb bsed simultions. It is shown tht the proposed SST cn ensure distribution level feeder voltge blnce in the fce of significnt voltge imblnce. Keywords-- Dul Active Bridge, Imblnced ods, SST, Symmetricl omponent epresenttion. I. INTODUTION The use of power electronics in power system pplictions hs incresed rpidly in recent yers, fcilitting the integrtion of renewble energy onto the grid nd the cretion of low crbon future [1]. It is hoped tht Solid Stte Trnsformer (SST) technology cn enble the integrtion nd prolifertion of distributed energy resources such s wind nd solr nd provide key enbling technology for smrt grid reliztion. The SST pproch hs the potentil to offer significnt dvntges over the trditionl low-frequency line trnsformers, with dvnced power flow controllbility, isoltion nd decoupling cpbilities for renewble sources nd substntil volume reductions. Increses in power level nd higher switching frequency in power electronics switch technology in recent decdes hve fcilitted the development of SST pplictions for the distribution system [2], [3]. Imblnced lods re quite common in the modern distribution grid with the growth of dynmiclly vrying domestic lods. Moreover the imblnce is likely to increse in the future with the introduction of new lods such s electric vehicle chrging points [4]. The problems ssocited with imblnced lods in the distribution system hve been discussed previously in the literture [5]. The unblnce typiclly results from unblnced of single phse lods nd it my propgte though the power system. For exmple hindris et l. [6] discussed imblnced voltge propgtion in the power system with prticulr emphsis on the effects of different types of distribution trnsformer s nd hen et l. [7] presented n optiml phse rrngement pproch for voltge imblnce improvement. Both these uthors considered the trditionl low frequency line trnsformer in their studies, which lcks the cpbility to provide ctive control mesures to remove systems 3-phse imblnce. In contrst to the trditionl low frequency trnsformer, the SST cn in principle provide ctive voltge regultion to ensure output voltge blnce nd cn decouple the output from the input so tht imblnce does not propgte through the system. However very few works hve to dte investigted this spect of the SST functionlity. With the rpid development of power electronics technology in recent decdes, the SST hs received considerble interest s replcement for the conventionl distribution trnsformer, especilly in pplictions such s in trction systems, renewble energy distribution systems nd Smrt Grids. The uthors McMurry [8] nd Hrd et l. [9] seprtely proposed in the 197s nd 199s n SST-bsed A/A converter with high frequency trnsformer for low voltge pplictions. onn et l. [1] in 2 looked to increse the voltge, utilizing cscde for multiple modules for single phse SST. It chieved high voltge level of pproximtely tens of kv using modulrized cscde. Wrede et l [11] in 22 proposed 3-stge A/D/A SST bsed on single-phse nd 3-phse voltge source converter. This study designed the topology nd control strtegy in theory without presenting simultion results for verifiction. Heinemnn [12] et l. of ABB in 21 introduced the concept of power electronics bsed trnsformer for the distribution grid. The uthors highlight the importnt role of power electronics in the grid nd especilly the role of high frequency modulrized SST designs to fcilitte distributed energy resources. In recent yers number of reserch groups hve mde gret strides in developing prcticl systems. Some of these groups include the Electric Power eserch Institute (EPI), FEEDM To Yng is supported under the UD-hinese Scholrship ouncil Scheme. onn Meere is supported by the Progrmme for eserch in Third evel Institutions (PTI), ycle 5. 978-1-4799-3656-4/14/$31. 214 IEEE
System entre, Virgini Tech, N Stte University, ETH Zurich nd lso commercil interest from ABB. In 21, Flcones et l. [13] outlined summry pper of SST topologies tht looked to clssify nd select the pproprite configurtions of SST for different pplictions. It concluded three stge configurtion comprising distinct A/D- D/D-D/A stges to be overll the most suitble pproch for SST pplictions in distribution systems. To the best of the uthors knowledge previous works hve not yet ddressed the issue of how well n SST cn del with voltge imblnce in the system. Although i et l. [3] of Virgini Tech hve proposed 3-phse SST with 3 single-phse modules tht looked t system performnce under power qulity disturbnces, including lod trnsients nd input voltge sg, the pper lcked detil on performnce under 3- phse imblnced lods with different degrees of imblnce. This pper will investigte the topology nd control for 3 phse SST which cn del dequtely with imblnce in the output phses. Specificlly, it investigtes the performnce of the SST in 3-phse, 3-wire system nd 3-phse 4-wire system under vrying degrees of lod imblnce. The investigtion is performed using Mtlb/SimPowersystems bsed simultions of the SST. The pper does not ddress prcticl issues of the design such s losses nd efficiency of ctul devices, which will be the subject of future work. The object of the study is to show tht with proper control techniques the SST cn mintin output voltge regultion with significnt levels of imblnce in the lod, nd to compre the results from 3-phse 3-wire implementtion to 3-phse 4-wire implementtion. The pper is structured s follows: Section II introduces the 3-phse 4-wire SST system rchitecture. Section III introduces ech stge with controllers used in the system. Section IV presents the system simultions nd performnce. Finlly, Section V discusses the conclusions nd scope for future work. II. SST DESIGN AND OPEATION A number of reserch tems hve focused on SST rchitectures from the perspective of overll topology, control, nd pplictions. Notbly, Wrede et l. [11] presented the design of 3-phse SST system with cscde structure including voltge source converters. Fig.1 displys two possible implementtions for 3-stge 3-phse SST. Fig.1 () uses direct 3-phse rectifier s the input stge to the converter, which converts high voltge low frequency 3- phse A input voltge to high D voltge. The next step consists of Dul Active Bridge (DAB) nd trnsforms the high D voltge using high frequency trnsformer, to low voltge D output. Finlly, 3-phse inverter t the output stge converts the low D voltge to low frequency 3-phse A voltge connected to the lod. Fig.1 (b) is quite similr in design to Fig.1 (), the min difference being the 3-phses re delt with by 3 seprte, single phse pths, i.e. ech phse is rectified independently nd then combined together with three single-phse modules t the output. In order to del with the fct tht input voltges re beyond the cpbility of current semiconductor switches, ech single phse cn use number of lower voltge series connected modules to ensure low voltge stress cross the switches. A B 7.2KV Three Phse ectifier Dul Active Bridge (DAB) () NNumber prllel N Number prllel N Number prllel Three Phse Inverter Inverter A Inverter B Inverter 381V 381V 22V b c (b) Fig 1. () Direct 3-phse module; (b) Three single-phse modules. In the cse of the topology in figure 1 (), this voltge stress issue must be delt with by using some sort of multilevel topology for the three phse rectifier. In this work we only consider the pproch of figure 1 (b) with ech phse implemented ccording to figure 2. This pproch is chosen becuse it provides greter level of phse decupling nd independent phse control compred to figure 1(). A 7.2/3KV ectifier A1 7.2KV 7.2/3KV ectifier A2 7.2/3KV ectifier A3 DAB A1 DAB A2 DAB A3 4V Inverter A b c 22V Fig 2. Three single-phse rectifier nd 3 DAB connected in prllel in phse A. For 3-phse, 3-leg SST in distribution system there will be coupling between the 3 phses, resulting in the phses not being entirely independent of ech other. Therefore, when 3-phse 3-wire SST comes under imblnced lods, blnced output voltge my be difficult to chieve. It is to be expected the SST with 3-phse 4-wire configurtion, where the neutrl wire hndles imblnce currents will be ble to better del with lod imblnce. Generlly, there re three methods to provide 3-phse 4- wire inverter configurtion for n SST design: 1) Adding Δ/Y trnsformer between the three-phse three-leg inverter nd lods; 2) Three single-phse inverters connected to the output side with Y-N. 3) Using 4-leg converter topology nd tying the neutrl point to the mid-point of the fourth neutrl leg [14]; For the Δ/Y trnsformer pproch, the inclusion of low frequency trnsformer would negte the volume sving benefits of the SST. The 3 single-phse 4-wire inverter pproches, not only hs the dvntge of provide neutrl wire to hndle the neutrl current cused by n imblnced lod, but is lso esy to ttin 3 phses fully decoupled nd independently controlled. The 4-leg converter topology cn reduce the number of the switching devices nd provide the fourth neutrl leg, lthough not investigted here, the pproch nd its control merits further study in future work. This work will dopt the topology of Fig.1 (b) with three single-phse modules to produce 3-phse 4-wire SST, interfced to 7.2 kv phse-voltge 3-phse distribution
system with 22 V phse-voltge 3-phse output. Ech individul stge of the system will now be presented in Section III. III. EAH STAGE OF SST AND ONTO SHEME A. ectifier The input t the rectifier stge is 3-phse 12.47 kv voltge, with phse voltge of 7.2 kv nd 1.18 kv pek. As seen in Fig.2, to reduce the low voltge stress for ech power device, ech phse A/D converter is composed of 3 single-phse rectifiers connected in series. Ech single-phse rectifier, see Fig.3, converts the 7.2/3 kv A to 3.8 kv D. The lyout of the topology nd control is shown in Fig.3. (). For the rectifier stge to relize constnt D voltge control nd keep the unity input power fctor, the rectifier controller hs dopted n inner A current loop nd outer D voltge loop. The control digrm is shown in Fig.3 (). V_in i_ i_ x i_* PI V_c Single-Phse Full Bridges PWM () i_* V_D x V_D- x Sine (b) Fig 3. Single-phse rectifier control digrm nd simultion results: () Two closed loop PWM control block digrm; (b)simultion results D output voltge under step lod condition. Fig3.(b) shows the single-phse A input voltge, current nd D output voltge wveforms under strt-up nd step lod conditions(lod chnge from 1 Ω to 5 Ω t.25 s) - the D output voltge is well regulted with fst response time. B. Dul Active Bridge(DAB) The DAB converter consists of two H-Bridges nd high frequency trnsformer between them, see Fig (4). The trnsformer s role is to provide glvnic isoltion nd to step down the voltge between the HV side nd V side of the converter. V_HVD ltge, urrent, V/A 4 2 in -2-4 4 3 2 1 S1 in S4 Strt-Up S3 S2 Bidirectionl, Iin V_HVD Step od N:1 High Frequency Trnsformer S5 S8 S7 S6 o PI Iin VHVD.5.1.15.2.25 t/s.3.35.4.45.5 in _ref _ref Fig 4. DAB converter schemtic. Power is trnsferred from the leding bridge to the lgging bridge, nd the DAB converter cn be controlled by one of V_VD the following: (1) the switching frequency, (2) the duty cycle of switching devices, nd (3) the phse shift,,between the two H-bridges. Krishnmurthy et l. [15], dopt Phse Shift Modultion (PSM) using eqution (1) to chieve bidirectionl power flow for the converter. The DAB stge in this work uses fixed switching frequency, f H, of 1 khz nd fixed 5% duty cycle nd dopts phse shift modultion for power flow control. The bidirectionl power flow is given s: (1) There hve been number of studies on the control of DAB converters, predomintely describing clssicl PI control for the converter. Qin et l. [16] nlyzed the loop gin of DAB converter controlled by PI controller, nd highlights some the limittions prticulrly relted to the high frequency switching. In order to improve the performnce of the closed loop control, we dopt the K-fctor pproch [17] to determine the best PI prmeters to del with the high frequency switching. Fig.5 shows the simulted trnsformer primry nd secondry voltges with phse shifts for this method. The phse shift control rects quickly to regulte the low output D voltge to the reference 4 V under the step lod from 1 Ω to 5 Ω. 6 4 2-2 -4-6.75.75.75.75.75.76.76.76.76.76 Phi/rd.3.2.1 4.5 4 399.5 Fig 5. Simulted trnsformer, phse shift, low dc bus voltge.. D-A Inverter The D/A inverter is the lst stge of the SST system. In order to improve the performnce of SST under the imblnced lods, the 3 single-phse inverters re connected with Y-N to fulfill the 3-phse 4-wire SST. Ech D/A inverter converts 4 V D to 5 Hz 31 V A. The topology of the stge is given in Fig.6. The control for ech inverter is independent, the only difference being the phse ngle of the reference voltge signl - setting º in the first inverter, 12º in the second inverter nd -12º in the third inverter. VVD 4-4 Trnsformer primry nd secondry voltge S1 S2 Kpwm S3 S4 Fig 6. Topology of single phse D-A inverter. I Vprimry Vsecondry Phse shift between two bridges Phse shift between two bridges in rd Strt-up Step od ow D output voltge of DAB Step od 399 Strt-up 398.5.2.4 t/s.6.8 Io Phi VVD t/s
In the D/A inverter design, the low D link voltge is regulted by the DAB converter while two closed loop re used to control the output side A voltge nd current. Fig.7 displys the control lyout for the inverter; the two loops include n inner current loop with output voltge feedforwrd decoupling nd n outer output voltge loop. Both loops utilise PI regultors. - ref Iref X PI Kpwm X PI x X X 1/s X 1/s sin(wt) - 1/Kpwm - I - Io Fig 7. ontrol digrm for single phse D-A inverter. Fig.8 shows the simulted output A voltge nd current. It is observed tht the output voltge trcks the reference 311V in both the trnsient nd stble conditions. The lod trnsients occur t.15 s nd.3 s where lod step chnge from 4.84 Ω to 1 Ω occurs nd vice-vers. Note the output voltge remins constnt with the step chnge current verifying the control loop opertion. ltge, urrent, V/A IV. 4 2-2 -4 Step od 1 Step od 2.5.1.15.2 t/s.25.3.35.4.45 Fig 8. Output A ltge, current with step chnge lod. SYSTEM PEFOMANE SIMUATIONS System simultions re undertken to study the control nd opertion of the proposed 3-phse SST with both 3-wire nd 4-wire configurtions. The complete SST with 3 levels of input series connected modules for rectifier nd DAB is simulted under different degrees of imblnced lod. The min SST prmeters for the study re given in Tble.1. TABE I. Input ltge Grid Frequency High ltge D reference DAB Frequency ow ltge D reference Output ltge reference Output voltge nd current. SIMUATION PAAMETES 3.39*3 KV (mplitude) A Phse voltge 5 Hz 3.8*3 kv 1 khz 4 V 311 V (mplitude) A Phse voltge Imblnce conditions cn pper on the distribution in number of wys one scenrio would be blnced lod running t some common fult condition, such s single nd two phse open fult. Other scenrios my involve different impednces or different power fctors (PF) in ech phse. For the simultions presented here, four kinds of imblnced lods re tested. The imblnce fctors re clculted using the IE [18] definition of degrees of imblnce in 3-phse system using symmetricl component which clcultes the imblnce fctor s the rtio between the.m.s. vlue of the Io negtive sequence component nd the positive sequence coordinte. Tble.2 shows the 3 different cses for imblnced lods with imblnce fctors from 5% to n extreme cse of 15%. TABE II. IMBAANE OADS AND FATOS od onditions Imblnce fctors se1: IA =IB=1.5*I=Im. A:1 Ω; B:1 Ω; :1.5 Ω. 5% se2: IA=IB=I=Im. PF_A=1; PF_B=.8; PF_=-.8 1% A: 1 Ω; B:.8 Ω1.91mH; :.8 Ω1.91m F se3: IA=IB=Im; I= PF_A=-.8; PF_B=.8 15% A:.8 Ω1.91m F; B:.8Ω1.91m H; : open. For the simultion study, the proposed 3-phse 4-wire system presented here is directly compred to the 3 phse 3 wire SST configurtion. Figures 9-1 show the simultion results for the three degrees of imblnced lod for both SST systems. As shown in Fig.9, for the cse with the sme mgnitude but different PF for the phse impednces, the three phses lods current mgnitudes re the sme 311 A, nd the 3-phse 4-wire SST cn keep its output voltge blnced. In the cse of the 3- phse 3-wire SST, it cnnot hndle the imblnced PF between the three phses; leding to the mgnitude of phse A, B s output voltge incresing to 4 V nd significnt phse ngle imblnce in the output voltges. For the cse in Fig.1, the current is zero due to n open fult in phse, nd different PF exists for phse A nd phse B lods. The phse shift between A nd B is 18º nd not 12º. A blnced three-phse sinusoidl output voltge is obtined with the 3- phse 4-wire SST, see Fig.1, Phse voltge for the 3- phse 3-wire SST undergoes substntil rise to 4 V due to the open fult, lthough the other phse voltges mintin stble voltge of pproximtely 311 V. urrent/a urrent/a 4 2-2 -4 4 2-2 3-phse 3-wire SST output voltge -4 t/s.2.4 t/s.6.8.1.1 Fig 9. Performnce comprison with cse 2 lods condition. -4.2.4.6.8.1.1 6 4 2-2 -4-6 4 2-2 Fig 1. Output urrent 3-phse 3-wire SST output ltge Output urrent -4.2.4 t/s.6.8.1.1 I Ib Ic I Ib Ic Performnce comprison with cse 3 lods condition Bsed on the IE s definition, the imblnce degree of output voltge (IDOV) re clculted nd summrized for the 4 2-2 4 2-2 3-phse 4-wire SST output voltge 3-phse 4-wire SST output voltge -4.2.4 t/s.6.8.1.1
2 SST systems under the three kinds of imblnce lods in Fig.11, the results in figure 11 quntify the degree of imblnce in the SST output voltge for vrying degrees of lod imblnce for both the three wire nd four wire systems. Three types of lod imblnce re considered: Zone [I]: the lods hve unequl mplitude with equl PF between the 3 phses with n imblnce fctor from -9%; Zone [II]: both mplitude nd PF of the lods re unequl between the 3 phses with n imblnce fctor from 1-14%; Zone [III]: A single-phse open fult mixed with two erlier conditions with n imblnce fctor from 15-2%. With the proposed 3-phse 4-wire SST, due to the fourth neutrl wire to hndle the imblnced currents nd the phse ngle, the output voltge mplitude cn be controlled independently by ech phse, nd the IDOV cn be controlled to.31% for the 3 zones. For the 3-phse 3wire SST n zone I, with the low imblnce fctor lods, it mintins the IDOV t low vlue, similr to the 3-phse 4-wire SST. However, for zone II nd III, there is controller coupling between the 3- phses, the controller for the 3-phse 3-wire inverter cnnot control the phse nd mplitude independently cusing the system to lose its blnce. The IDOV reches 63.3% for the 3-phse 3 wire system in zone III. Output ltge Imblnce Degree of SST/% 6 5 4 3 2 1 Output ltge Imblnce Degree of 2 SST under the Different Imblnce ods I 3-phse 4-wire SST 3-phse 3-wire SST -1 5 1 15 2 Imblnce Fctors of ods/ % Fig 11. IDOV of two SST under three kinds imblnce lods in Zone I III From the nlysis presented, the proposed 3-phse 4-wire SST mintins blnced output voltge with low IDOV tht cn independently regulte the reference voltge. In ddition, due to the isoltion function of SST, it cn prevent the propgtion of imblnce upwrds through the power system, nd mintin the voltge blnce t the input side. The 3-phse 3-wire SST loses blnce in both mplitude nd phse under lods with extreme fctors of imblnce. V. ONUSION A 3-phse 4-wire SST with pproprite control s demonstrted in this pper cn be n excellent system for ensuring distribution level feeder voltge blnce in the fce of significnt voltge imblnce. Both the SST source nd lods side will not be upset by lod imblnce. According to the simultions, in 3-wire system the SST cn mintin dequte levels of output voltge blnce for norml levels of lod imblnce up to 5 %, while in 4-wire system the SST cn in principle mintin output voltge blnce in the most extreme lod imblnce situtions, thus potentilly relxing requirements on other system components in the power II III system, such s some protection nd Power Fctor orrection devices etc. Although mny studies of SST design nd opertion exist, more work needs to be done on investigting their dvntges when integrted to power system. Any system benefits will need to be weighed ginst potentil disdvntges relting to efficiency, relibility, cost nd electromgnetic interference. Future work will focus on developing more relistic models of the SST to evlute performnce nd llow more prcticl evlution in power system. EFEENES [1] E. onn, S. Sudhoff, S. Glover, nd D. Gllowy, BA power electronic bsed distribution trnsformer, IEEE Trns. Power Delivery, vol. 17, no. 2, pp. 537 543, Apr. 22. [2]. Hssn, G. dmn, "Survey on Smrt Grid," IEEE Southest on 21, Proceedings of the, vol., no., pp.21 213, 18 21 Mrch 21. [3] Jib-Sheng i, A Mitr, A Mnsoor nd F. Goodmn, "Multilevel Intelligent Universl Trnsformer for Medium ltge Applictions", onference ecord of Industry Applictions onference, Fourtieth las Annul Meeting, Oct, 25, vol. 3, pp: 1893 1899. [4] P. ichrdson, D. Flynn, A. Kene, Impct ssessment of vrying penetrtions of electric vehicles on low voltge distribution systems, Proc. IEEE Power nd Energy Soc. Generl Meeting, 21, pp. 1 6 [5] A. von Jounne, B. Bnerjee, Assessment of ltge Unblnce, IEEE Trnsctions on Power Delivery, vol. 16, no. 4, Oct. 21. [6] M. hindris, A. ziker, A. Miron, H. Bln, A. Icob, nd A. Sudri Propgtion of unblnce in electric power systems, in Proc. 9th Int.onf. Electricl Power Qulity nd Utilistion, 27, pp. 1 5. [7] T. H. hen nd J. T. herng, Optiml phse rrngement of distribution trnsformers connected to primry feeder for system unblnce improvement nd loss reduction using genetic lgorithm, IEEE Trns. Power Syst., vol. 15, pp. 994 1, 2. [8] W. McMurry, Power converter circuits hving high-frequency link, U.S. ptent 3 517 3, June 23, 197. [9] K. Hrd, F. Ann, K. Ymski, M. Jinno, Y. Kwt, T. Nkshim, K. Murt, nd H. Skmoto, Intelligent trnsformer, in onf. ec. IEEE PES, 1996, pp 1337-1341. [1] E.. onn, S. D. Sudhoff, S. F. Glover, nd et l, "Appliction of Power Electronics to the Distribution Trnsformer," In: IEEE Applied Power Electronics onference nd Exposition. New Orlens (USA): 2. 861-867. [11] H Wrede, V Studt, nd A Steimel. "Design of n Electronic Power Trnsformer," In: IEON 2 (Industril Electronics Society, IEEE 22 28th Annul onference) 22, 138-1385, 5-8 Nov. 22. [12].Heinemnn nd G.Muthe, The universl power electronics bsed distribution trnsformer, n unified pproch, in Proc.IEEE PES 21, pp 54-59. [13] S.Flcones, X..Mo, nd.ayynr, Topology comprison for solid stte trnsformer implementtion, in Proc.IEEE PES generl meeting 21, pp 1-8. [14]. Zhng, V. H. Prsd, D. Boroyevich, nd F.. ee, Threedimensionl spce vector modultion for four-leg voltge-source converters, IEEE Trns. Power Electron., vol. 17, no. 3, pp. 314 326, My 22. [15] H. K. Krishnmurthy,. Ayynr, Building Block onverter Module for Universl (A-D, D-A, D-D) Fully Modulr Power onversion Architecture, IEEE Power Electronics Specilists onference, 17-21 June 27, pp.483-489. [16] Hengsi Qin, Kimbll, J.W., losed-loop ontrol of D-D Dul Active Bridge onverters Driving Single-Phse Inverters, Energy onversion ongress nd Exposition, Sept. 212, pp. 173 179. [17] H. D. Venble, "The k-fctor: A New mthemticl Tool for Stbility, Anlysis, nd Synthesis," Proceeding of Powercon 1, Sn Diego, A, Mrch 22-24, 1983. [18] Interntionl Electrotechnicl cbulry, Group 5, Fundmentl Definitions, Interntionl Electrotechnicl ommission (IE) Publiction 5 (5), 1954.