R L 2 Field-Effect Transistors 2.1 BAIC PRINCIPLE OF JFET The eld-effect transistor (FET) is an electric- eld (voltage) operated transistor, developed as a semiconductor equivalent of the vacuum-tube device, called the pentodes. FET s are classi ed mainly into two types: The junction eld-effect transistor (JFET) The metal-oxide semiconductor eld-effect transistor (MOFET or MOT). 2.1.1 tructure of the JFET Figure 2.1 shows the structure of an N-channel JFET. As shown in the gure, an N-channel JFET consists of an N region of silicon into which two P ++ regions are diffused. The N region is called a channel because it permits current ow as in a conducting channel. The ends of the channel are metallized and external leads are taken out to form the source () and drain () terminals of the FET. The two P ++ regions are usually shorted together to form the gate () terminal. We notice that immediately after the P ++ regions are diffused into the N channel, depletion layers are formed about the P ++ regions, as shown in Fig. 2.1. ate ource PP ++ N channel epletion layer rain Fig. 2.1 tructure of JFET.
Field-Effect Transistors we have forwarded bias between the source and the gate (+V ) and reverse bias between the gate and the drain ( V ). ue to the forward bias between the source and the gate, the depletion layer in this region is thin. However, due to the reverse bias, there exists a larger depletion layer between the gate and the drain, as shown in Fig. 2.3. Now, let the supply voltage V be increased in steps of, say, 1 volt each. We nd that as the drain-source voltage gets increased, the drain attracts more and more electrons, and I increases correspondingly. The increase in I results in the increase in the reverse bias between the gate and the drain. We nd that the depletion layer between gate and drain gets wider and wider as the reverse bias is increased. rain Characteristics Figure 2.4 shows the drain characteristics, a plot between drain-source voltage V and drain current I, with the gate-source voltage V kept constant. Initially, we x V at V, and vary V in steps of 1 volt each, as stated above, and note the corresponding values of I. The resulting values are tabulated, and using the tabulated values, the characteristic for V = is plotted, as shown in Fig. 2.4. Consider the region OA in the characteristic. We nd that I increases linearly with V. This is due to the fact that as V increase more and more electrons get attracted by the drain resulting in an increase in I. We also notice that the increase in I results in an increase in the depletion width between drain and gate. The increase in I continues until the point A is reached, at which point, all the electrons emitted from the source are attracted by the drain and I reaches its maximum value. At point A, the maximum value of I produces maximum drop in the channel, which in turn produces maximum reverse bias between the drain and gate terminals. This results in the channel getting almost pinched-off. I ma 3 2 1 A V = V V = 2V V = 4V V= 6V C B 1V V Early voltage, VA Fig. 2.4 rain characteristics of JFET. At pinch-off, the channel cannot completely close; for, if the channel closes, the ow of I would stop completely. But, if the ow of I stops completely, then the entire depletion layer will disappear. This will open up the channel and I will ow again. This con rms the theory that the channel cannot get completely pinched-off.
N P ++ Wider depletion layer Channel pinch-off Fig. 2.5 Channel at pinch-off. I is a maximum at pinch-off, as shown in Fig. 2.5. This is similar to the situation in a river where a constriction in the path blocks the ow of water. We notice that to maximize the current ow through a constriction, the velocity of the ow has to be increased proportionately. This is true in the case of the FET too. Thus, we nd that at pinch off the velocity of the electrons is increased to maximize the drain-current ow. This drain current is called the saturation drain current and is designated as I. In the region AB of the characteristics shown in Fig. 2.4, the current remains more or less constant. This is because at point A itself, all the electrons emitted from the source would have reached the drain, and current becomes a maximum. Therefore, even if V is increased I cannot increase. Now, we refer to the point B in the curve. At this point, the reverse voltage is so high that avalanche breakdown will occur. At this point, the current suddenly rises to a very high value, which unless limited by a suitable resistor, will destroy the device. The breakdown region is marked as region BC in Fig. 2.4. Let us now x V at 2 V. The experiment is repeated by varying V and noting the corresponding values of I, as before. By applying an external reverse bias between gate and source, a depletion region is created between drain and gate. This depletion region is dependent only on the gate-supply voltage and is totally independent of the drain-current ow. Now, if we apply V, as before I would start owing again, and the whole story described above repeats. We now nd that the V -I curve for V = 2 V is similar to, and almost parallel to that for V = V. However, the current in this case is less than that in the previous case. This is because of the depletion region already formed as a result of the reverse bias between the gate and the source, which reduces the channel width. The experiment is repeated for various values of V. The results are tabulated and the characteristics are drawn as shown in Fig. 2.4. We nd that, as V is increased in the negative direction, i.e., 2 V, 4 V, etc., the drain current gets reduced proportionately. Ultimately, at a large negative value of V, the channel will be completely cut-off or closed so that no drain current can ow. This is called the cut-off condition. Complete channel cut-off is possible because, in this case, it is the external gate-source voltage that brings in the channel cut-off, and not by the drain current as in the case where V is zero.
Field-Effect Transistors Mutual or Transfer Characteristic The transfer curve is plotted by keeping V constant at a particular value, say 5 V, and by varying V and noting the corresponding value of I. As shown in Fig. 2.6, we nd that the curve is almost linear. We also nd that at V = V P, the channel is completely cut-off or pinched-off. For a typical JFET, like BFW 1, V P = 8 V. 4 ma I V P = 8 V V ma Fig. 2.6 Transfer or mutual characteristic of JFET. The slope of the transfer curve is called the mutual conductance and is de ned as g m I = Δ (2.1) ΔV V =constant Amplifi cation Characteristic We can also plot the ampli cation characteristic of the JFET, which is the plot between V and V, with I kept constant. This is shown in Fig. 2.7. The slope of the characteristic is known as the ampli cation factor μ of JFET. Mathematically, ampli cation factor is de ned as: μ= ΔV ΔV (2.2) I =constant The negative sign in the equation indicates that the variation in V is opposite to the variation in V. Ampli cation factor represents the maximum amount of ampli cation that the device is capable of producing. I = constant V V V V Fig. 2.7 Ampli cation characteristic.
2.1.3 Relation among μ, g m, and r d From the de nitions, we nd that there exists a de nite relation among the JFET parameters μ, g m, and r d. From experiments, we nd that i = f (v, v ) (2.3) where we have used instantaneous total values of drain current, drain-source voltage, and gate-source voltage. By instantaneous total value, we mean the variable C value. As an example, we express v = V + v ds (2.4) where v is the variable C, V is pure C, and v ds is pure AC. Using Taylor s expansion, Eq. (2.3) may be written as i i Δi = Δv Δv v + v (2.5) where v is a small change in v, v is a small change in v, and i is the corresponding change in i. Equation (2.3) suggests that the total variation in the value of the drain current i is equal to the sum of the variations in i due to the variations in v and v. We now de ne the following terms: i v = r ( ) Δv = d drain resistance (2.6) i v = g ( ) Δv = m transfer conductance (2.7) Using the above in Eq. (2.5), we get 1 Δi = Δv + g Δv r d m (2.8) Now, by differentiating Eq. (2.4), we get In Eq. (2.9), V = since V = constant. Hence v = V + v ds (2.9) v = v ds (2.1) This means that the change in the variable C value v is equal to the variation in the AC value v ds. ince v ds is a variable value, we conclude that v = v ds (2.11)
2.2 BAIC PRINCIPLE OF MEFET The MEFET (metal-semiconductor eld-effect transistor) is an FET structure constructed by depositing aluminium over an FET structure to form a metal-semiconductor chottkybarrier junction. The device is usually made of aas because of its high electron mobility, and is used as a microwave transistor. Figure 2.9(a) shows the structure of a aas MEFET. It consists of a substrate made of semi-insulating (undoped) aas over which a N + -type (medium-doped) epitaxial layer of aas is formed. Over this layer, in the centre of the device aluminium is deposited to form the metal-semiconductor chottky gate. The drain and source contacts are similarly formed using gold-germanium or gold-tellurium alloy contacts. Al I ma V = V V =.5 V N epitaxial layer epletion layer V = 1 V aas ubstrate V = 2 V V V Fig. 2.9(a) tructure of MEFET. Fig. 2.9(b) rain characteristics. 2.2.1 Working Principles of MEFET MEFET is a modi cation of the conventional JFET (junction eld-effect transistor) discussed above with a metal-semiconductor junction replacing the semiconductor-semiconductor junction of the JFET. As in the case of the JFET, here also we apply a reverse bias between the gate and the source (i.e., the gate is made negative with respect to the source), and a forward bias between the drain and source (source made negative with respect to drain). When the drain is positive with respect to the source, drain current starts owing from drain to source, and this develops a depletion region between the source and the drain, as shown in Fig. 2.9(a). This is similar to the depletion region formed under the drain and the source in the conventional JFET. The larger the drain voltage, the larger the drain current, and hence the larger the depletion region under the drain, as shown. This will tend to pinch-off the channel when the drain current reaches a maximum, as in the case of the regular JFET. The drain-current ow is also dependent on the gate-source reverse bias which forms its own depletion region between the gate and the source. The larger the reverse bias, the larger its effect in bringing a pinch-off in the channel, which later becomes cut-off to stop the drain-current ow.
Field-Effect Transistors Figure 2.9(b) shows the drain characteristics of the MEFET. It can be seen that this is similar to the drain characteristics of the JFET. The device gives maximum current with V = and gives zero current when the gate is biased to a large negative value, as shown. The device with its micro-miniature structure and short channel length is highly suitable for operation in the microwave region. 2.3 METAL-OXIE EMICONUCTOR FIEL-EFFECT TRANITOR Figure 2.1 shows the structure of a metal-oxide semiconductor eld-effect transistor (MO- FET). The device derives its name from the silicon dioxide (io 2 ) layer used for passivating the surface of the device. Metal-oxide semiconductor eld-effect transistors (or MOFET s) are of two main types. They are the enhancement type and the depletion type. Figure 2.9 shows the structure of the enhancement type. io 2 layer N ++ N ++ P substrate Al metallization Fig. 2.1(a) tructure of enhancement MOFET. 2.3.1 Enhancement-type MO Transistor (EMOFET) Figure 2.1(a) shows that EMOFET consists of a P type substrate over which a thin surface-passivating layer of io 2 is grown. In this io 2 layer, two windows are cut and N ++ diffusions are made, as shown. Aluminium metallizations are done in these windows to take out the source and the drain terminals. Finally, aluminium metallization is also done over the io 2 layer in between the source and drain terminals, from which the gate terminal is taken out. Working Principles of EMOFET For normal ampli er operation, the gate of an MOFET is made positive with respect to its source, as shown in Fig. 2.1(b). It can be seen that immediately on the application of the bias a channel of electrons is induced in between the source and drain N ++ diffusions. The positive voltage on the gate drives the holes away from the region in the substrate under the gate metallization, leaving the electrons in that region uncovered to form the channel. A second theory assumes that the device behaves as a capacitor with the gate metallization acting as the positive electrode, the source N ++ diffusion the negative electrode, and
the io 2 layer the dielectric. The capacitance of the device depends on the thickness of the dielectric. When the upper plate (gate metallization) is made positive with respect to the lower plate (source diffusion), a positive-charge accumulation is formed on the upper plate and a negative-charge accumulation on the lower plate. ince the positive-charge accumulation extends throughout the length of the gate metallization, the negative-charge accumulation must also extend to the same distance in the substrate layer below the gate metallization. This results in the creation (enhancement) of the electron channel in the substrate. We say that a channel has been induced or enhanced in the substrate, and hence the name enhancement-type MO transistor, or EMOFET. This enhanced channel is also called an inversion layer. Once the inversion channel is formed, we apply a voltage between the drain and the source, as shown in Fig. 2.1(c). This drives an anode current between drain and source. Figure 2.11 shows the drain characteristics, which is the plot between V and I, with V as the xed parameter. + V N ++ N ++ io 2 layer Induced-electron (inversion) channel P substrate Fig. 2.1(b) ate biased positively with respect to source. + V + V I N ++ N ++ Electron motion P substrate Fig. 2.1(c) rain-current ow. Referring to Fig. 2.11, we nd that as V, and hence V, is increased, I gets increased linearly during the initial regions of the curves, just as in the JFET. This is because the higher the V, the more the number of electrons attracted by the drain from the source. However,
P and the N MOFET s is called the CMOFET. The theory of the CMOFET will be discussed later. Figure 2.13(a) shows three symbols used to represent NMOFET s, and Fig. 2.13(b) shows three symbols used to represent PMOFETs. Of these, those shown in Fig. 2.13(a)(ii) and 2.13(b)(ii) are the currently used symbols. i ii iii i ii iii Fig. 2.13(a) ifferent NMO symbols. Fig. 2.13(b) ifferent PMO symbols. 2.3.2 epletion-type MO Transistor (MOT) The depletion-type of MO transistor is a MOFET that combines the structure of the EMOFET and the JFET. The structure of the MOFET is shown in Fig. 2.14. The structure shown is a modi ed form of the EMOFET, with an N channel diffused in between the source-and-drain N ++ diffusions. o, we nd that the device is a combination of the JFET with its already diffused N channel, and an EMOFET with the aluminium gate deposition over the io 2 layer. The rest of the structure is similar to the EMOFET. + V + V I N ++ N ++ P substrate N channel Fig. 2.14 rain-current ow in MO FET. Working principles of the MOT The principle of working of the MOFET can be explained with the help of Fig. 2.14. ince the device is a combination of EMOFET and JFET, this device has two distinct modes of operation. These are, respectively, the EMOFET mode and the JFET modes as already stated.
Figure 2.16 shows the transfer characteristics of MOFET. The transfer characteristics show the JFET and the EMOFET regions. The curve has a negative-gate bias region representing the JFET mode of operation. The positive gate-bias region of the characteristics represents the EMOFET region. It may, however, be noted that there is no threshold voltage for the MOT. Figure 2.17(a) shows the symbol of the N-type MOFET and Fig. 2.17(b) shows the symbol of the P-type MOFET. It can be seen that the diffused channel is shown clearly in the symbols. Fig. 2.17(a) ymbol of N-type MOFET. Fig. 2.17(b) ymbol of P-type MOFET. 2.3.3 Complementary MO Transistor (CMOFET) The complementary-type of MO transistor, generally known as the CMO transistor, is a combination of the complementary pair of an NMO transistor and a PMO transistor. Initially, this structure was conceived and developed for high-density, low-power logic gates. However, the structure has become so popular that it is used in almost all modern logic circuits, which includes the latest computer chips. Recently, these circuits have also found use in ampli er circuits. Thus we nd that CMO transistors have become a very widely used structure. Figure 2.18(a) shows the circuit of a CMO inverter, and Fig. 2.18(b) shows its practical construction, known as the twin-tub well construction. This structure, as stated before, consists of an NMO inverter on top of a PMO inverter. In a P substrate, we rst diffuse three N ++ regions, as shown. In this structure, two of the N ++ regions are small, and the third large. The rst two smaller N ++ regions form the NMOT, and the third N ++ region forms an N well, into which two P ++ regions are diffused to form the PMOT. The top surface is then passivated using io 2 layer, and aluminium metallization is done as shown in Fig. 2.18(b). It can be seen that the device has the least amount of power dissipation in switching applications. This is because, when the PMO is ON the NMO is OFF, and vice versa. Therefore, we nd that, except at switching instants, there is no continuous current path from the positive terminal of the battery to its negative through the circuit. In Fig. 2.18(a), we have shown the CMO inverter with its supply voltage applied. For a typical CMO circuit, usually V is selected between 5 V to 15 V. Let the input
Problems P2.1 Compute the values of small-signal parameters of a junction eld-effect transistor using the data given in the following table. V V I 2 2 4 6 8 1.5 1 2 3 4 3 2 4 6 8 1.5 1 2 3 P2.2 Compute the value of ampli cation factor of a junction eld-effect transistor if at I = 2 ma, when V = 15 V, V = 1 V and when V = 5 V, V = V. P2.3 Compute the value of transconductance of a junction eldeffect transistor, if at V = 1 V, when V = 2 V, I = 4 ma and when V = 3 V, I = 2 ma. P2.4 Compute the value of drain resistance of a junction eld-effect transistor, if at V = 3 V, when V = 15 V, I = 4 ma and when V = 1 V, I = 2 ma. One-Word Questions 2.1 The word eld-effect transistor is derived from the action of eld on the drain-current ow. (electric). 2.2 In a channel at pinch-off, the drain current is. (maximum/minimum) 2.3 The drain current at pinchoff is called drain current. (saturation) 2.4 The drain current-becoming-zero condition is called the. (cut-off) 2.5 The slope of the transfer characteristic is called. (transconductance) 2.6 The slope of the drain characteristic is called. (drain resistance) 2.7 The product g m r d is called. (μ, or ampli cation factor) 2.8 and are the two types of MOFET. (enhancement, depletion) 2.9 The electron layer induced in a channel is called a layer. (inversion) 2.1 In an enhancement-type MOET, drain current starts owing only after the gate voltage has reached a voltage called voltage. (threshold) 2.11 In a depletion MOFET, there already exists a diffused. (channel) 2.12 The gate must be (positive/negative) with respect to the source in a MOFET for its normal operation. (positive) 2.13 The gate must be (positive/negative) with respect to the source in a JFET for its normal operation. (negative)
2.47 Explain how an inversion layer is formed in an EMOFET. 2.48 How does channel pinch-off occur? 2.49 How does channel cut-off occur? 2.5 What is the difference between channel cut-off and pinch-off? 2.51 What is threshold voltage in the case of MOFET? 2.52 iscuss the structure operation of a MEFET. 2.53 iscuss the basic principles of operation of a MEFET. 2.54 Explain the drain characteristics of a MEFET. Review Questions 2.55 Explain with relevant circuit diagrams the working principles of a JFET. 2.56 Explain with relevant circuit diagrams the working principles of an EMOFET. 2.57 Explain with relevant circuit diagrams the working principles of a MOFET. 2.58 Explain how ampli cation takes place in JFE ampli ers. 2.59 Explain how ampli cation takes place in MOFET ampli ers. 2.6 In CMO circuits, the PMO acts as the load of the NMO and vice versa: Prove. 2.61 Explain the twin-tub well process of CMO IC manufacturing technique. 2.62 iscuss the construction, working principles, and drain characteristics of a MEFET.