MOSFET OptiMOS TM 5LinearFET,1V D²PAK Features Idealforhotswapandefuseapplications VerylowonresistanceRDS(on) WidesafeoperatingareaSOA Nchannel,normallevel 1%avalanchetested Pbfreeplating;RoHScompliant QualifiedaccordingtoJEDEC 1) fortargetapplications HalogenfreeaccordingtoIEC61249221 Table1KeyPerformanceParameters Parameter Value Unit VDS 1 V RDS(on),max 2. mω ID(siliconlimited) 289 A ID(packagelimited) 12 A Ipulse(VDS=56V,tp=1 ms) 1.2 A Gate Pin 1 Drain Pin 2, Tab Source Pin 3 Type/OrderingCode Package Marking RelatedLinks PGTO 2633 2N1LF 1) JSTD2 and JESD22 1
TableofContents Description............................................................................. 1 Maximum ratings........................................................................ 3 Thermal characteristics.................................................................... 3 Electrical characteristics................................................................... 4 Electrical characteristics diagrams........................................................... 6 Package Outlines....................................................................... 1 Revision History........................................................................ 11 Trademarks........................................................................... 11 Disclaimer............................................................................ 11 2
1Maximumratings atta=25 C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Unit Note/TestCondition Continuous drain current ID Pulsed drain current 2) ID,pulse 48 A TC=25 C 12 12 29 A VGS=1V,TC=25 C VGS=1V,TC=1 C VGS=1V,TC=25 C,RthJA=4K/W 1) Avalanche energy, single pulse 3) EAS 979 mj ID=1A,RGS=25Ω Gate source voltage VGS 2 2 V Power dissipation Ptot 313 W TC=25 C Operating and storage temperature Tj,Tstg 55 15 C IEC climatic category; DIN IEC 681: 55/15/56 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Unit Note/TestCondition Thermal resistance, junction case RthJC.25.4 K/W Device on PCB, minimal footprint RthJA 62 K/W Device on PCB, 6 cm² cooling area 1) RthJA 4 K/W 1) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information 3
3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Unit Note/TestCondition Drainsource breakdown voltage V(BR)DSS 1 V VGS=V,ID=1mA Gate threshold voltage VGS(th) 2.5 3.3 4.1 V VDS=VGS,ID=27µA Zero gate voltage drain current Gatesource leakage current IDSS IGSS 1 1 2 2 1 1 5 5 µa µa VDS=1V,VGS=V,Tj=25 C VDS=1V,VGS=V,Tj=125 C VGS=2V,VDS=V VGS=1V,VDS=V Drainsource onstate resistance RDS(on) 1.8 2 mω VGS=1V,ID=1A Gate resistance 1) RG 44 66 Ω Transconductance gfs 31 62 S VDS >2 ID RDS(on)max,ID=1A Table5Dynamiccharacteristics 1) Parameter Symbol Unit Note/TestCondition Input capacitance Ciss 65 84 pf VGS=V,VDS=5V,f=1MHz Output capacitance Coss 19 25 pf VGS=V,VDS=5V,f=1MHz Reverse transfer capacitance Crss 25 pf VGS=V,VDS=5V,f=1MHz Turnon delay time td(on) 7 ns Rise time tr 28 ns Turnoff delay time td(off) 128 ns Fall time tf 82 ns VDD=5V,VGS=1V,ID=5A, RG,ext=1.7Ω VDD=5V,VGS=1V,ID=5A, RG,ext=1.7Ω VDD=5V,VGS=1V,ID=5A, RG,ext=1.7Ω VDD=5V,VGS=1V,ID=5A, RG,ext=1.7Ω Table6Gatechargecharacteristics 2) Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs 4.4 nc VDD=5V,ID=18A,VGS=to1V Gate to drain charge 1) Qgd 141 nc VDD=5V,ID=18A,VGS=to1V Gate charge total 1) Qg 195 nc VDD=5V,ID=18A,VGS=to1V Gate plateau voltage Vplateau 7.1 V VDD=5V,ID=18A,VGS=to1V Output charge 1) Qoss 29 nc VDD=5V,VGS=V 1) Defined by design. Not subject to production test. 2) See Gate charge waveforms for parameter definition 4
Table7Reversediode Parameter Symbol Unit Note/TestCondition Diode continuous forward current IS 12 A TC=25 C Diode pulse current IS,pulse 48 A TC=25 C Diode forward voltage VSD.89 1.2 V VGS=V,IF=1A,Tj=25 C Reverse recovery time 1) trr 62 ns VR=5V,IF=5A,diF/dt=1A/µs Reverse recovery charge 1) Qrr 113 nc VR=5V,IF=5A,diF/dt=1A/µs 1) Defined by design. Not subject to production test. 5
4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation 35 3 Diagram2:Draincurrent 35 3 limited by package limited by silicon 25 25 Ptot[W] 2 15 2 15 1 1 5 5 25 5 75 1 125 15 175 TC[ C] Ptot=f(TC) 2 4 6 8 1 12 14 16 TC[ C] ID=f(TC);VGS 1V Diagram3:Safeoperatingarea 1 3 Diagram4:Max.transientthermalimpedance 1 1 µs 1 ms 1 µs 1 µs.5 1 2 1 ms 1 1.2 DC ZthJC[K/W].1.5.2 1 1 1 2.1 single pulse 1 1 1 1 1 1 1 2 1 3 VDS[V] ID=f(VDS);TC=25 C;D=;parameter:tp 1 3 1 6 1 5 1 4 1 3 1 2 1 1 1 tp[s] ZthJC=f(tp);parameter:D=tp/T 6
Diagram5:Typ.outputcharacteristics 12 Diagram6:Typ.drainsourceonresistance 2. 1 1 V 8 V 1 V 1.5 8 6 8 V 6 V RDS(on)[mΩ] 1. 4 5.5 V.5 2 5 V 4.5 V 1 2 3 4 5 VDS[V] ID=f(VDS);Tj=25 C,tp=3µs;parameter:VGS. 2 4 6 8 1 12 RDS(on)=f(ID);Tj=25 C;parameter:VGS Diagram7:Typ.transfercharacteristics 12 Diagram8:Typ.forwardtransconductance 8 1 7 6 8 5 6 gfs[s] 4 4 3 2 2 15 C 25 C 1 1 2 3 4 5 6 7 VGS[V] ID=f(VGS);VDS=1V;parameter:Tj 2 4 6 8 1 12 gfs=f(id);tj=25 C 7
Diagram9:Normalizeddrainsourceonstateresistance 2. Diagram1:Typ.gatethresholdvoltage 4 27 µa RDS(on),normalizedto25 C 1.6 1.2.8.4 VGS(th)[V] 3 2 1 27 µa. 8 4 4 8 12 16 Tj[ C] RDS(on)=f(Tj),ID=1A,VGS=1V 6 2 2 6 1 14 18 Tj[ C] VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 1 4 Coss 1 3 25 C 25 C, max 15 C 15 C, max 1 3 1 2 C[pF] Ciss IF[A] 1 2 1 1 Crss 1 1 2 4 6 8 1 VDS[V] C=f(VDS);VGS=V;f=1MHz 1..5 1. 1.5 2. 2.5 VSD[V] IF=f(VSD);parameter:Tj 8
Diagram13:Avalanchecharacteristics 1 3 Diagram14:Typ.gatecharge 12 1 1 2 25 C 8 2 V 5 V 8 V IAV[A] 125 C 1 C VGS[V] 6 1 1 4 2 1 1 1 1 1 2 1 3 tav[µs] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) 5 1 15 2 25 Qgate[nC] VGS=f(Qgate);ID=1Apulsed,resistiveload;parameter:VDD Diagram15:Drainsourcebreakdownvoltage 11 Gate charge waveforms 15 VBR(DSS)[V] 1 95 6 2 2 6 1 14 18 Tj[ C] VBR(DSS)=f(Tj);ID=1mA 9
5PackageOutlines Figure1OutlinePGTO2633,dimensionsinmm/inches 1
RevisionHistory Revision:217216,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2. 2161215 Release of final version 2.1 217216 Update technology heading TrademarksofInfineonTechnologiesAG AURIX,C166,CanPAK,CIPOS,CoolGaN,CoolMOS,CoolSET,CoolSiC,CORECONTROL,CROSSAVE,DAVE,DIPOL,DrBlade, EasyPIM,EconoBRIDGE,EconoDUAL,EconoPACK,EconoPIM,EiceDRIVER,eupec,FCOS,HITFET,HybridPACK,Infineon, ISOFACE,IsoPACK,iWafer,MIPAQ,ModSTACK,myd,NovalithIC,OmniTune,OPTIGA,OptiMOS,ORIGA,POWERCODE, PRIMARION,PrimePACK,PrimeSTACK,PROFET,PROSIL,RASIC,REAL3,ReverSave,SatRIC,SIEGET,SIPMOS,SmartLEWIS, SOLIDFLASH,SPOC,TEMPFET,thinQ,TRENCHSTOP,TriCore. TrademarksupdatedAugust215 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany 217InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics ( Beschaffenheitsgarantie ). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnoninfringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer sproductsandanyuseofthe productofinfineontechnologiesincustomer sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlifesupportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlifesupport,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. 11