NSSC3ET4G, 3. A, Low CE(sat) NPN Transistor ON Semiconductor s e 2 PowerEdge family of low CE(sat) transistors are surface mount devices featuring ultra low saturation voltage ( CE(sat) ) and high current gain capability. These are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important. Typical applications are DCDC converters and power management in portable and battery powered products such as cellular and cordless phones, PDAs, computers, printers, digital cameras and MP3 players. Other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. In the automotive industry they can be used in air bag deployment and in the instrument cluster. The high current gain allows e 2 PowerEdge devices to be driven directly from PMU s control outputs, and the Linear Gain (Beta) makes them ideal components in analog amplifiers. Features Complement to NSSC3ET4G NS Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ Qualified and PPAP Capable These Devices are PbFree and are RoHS Compliant MAXIMUM RATINGS (T A = ) Rating Symbol Max Unit CollectorBase oltage CBO 4 dc CollectorEmitter oltage CEO dc EmitterBase oltage EB 6. dc Collector Current Continuous I C 3. Adc Collector Current Peak I CM 6. Adc Base Current I B.5 Adc Total Power Dissipation @ T C = Derate above Total Power Dissipation (Note ) @ T A = Derate above Operating and Storage Junction Temperature Range P D 33.26 P D 2..7 W W/ C W W/ C T J, T stg 65 to +5 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. These ratings are applicable when surface mounted on the minimum pad sizes recommended. OLTS, 3. AMPS 2.5 WATTS NPN LOW CE(sat) TRANSISTOR BASE 2 3 4 DPAK CASE 369C STYLE MARKING DIAGRAM Y WW C3E G COLLECTOR 2, 4 3 EMITTER YWW C3EG = Year = Work Week = Device Code = PbFree Device Package Shipping NSSC3ET4G ORDERING INFORMATION DPAK (PbFree) 25/ Tape & Reel NSC3ET4G DPAK (PbFree) 25/ Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. Semiconductor Components Industries, LLC, 26 March, 26 Rev. 5 Publication Order Number: NSSC3E/D
NSSC3ET4G THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 3.8 C/W Thermal Resistance, JunctiontoAmbient (Note 2) R JA 59.5 C/W 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS CollectorEmitter Breakdown oltage (I C = ma, I B = ) CollectorBase Breakdown oltage (I C = ma, I E = ) EmitterBase Breakdown oltage (I E = ma, I C = ) Collector Cutoff Current ( CB = 4, I E = ) Emitter Cutoff Current ( EB = 6. ) ON CHARACTERISTICS DC Current Gain (Note 3) (I C = A, CE = 2. ) (I C =.5 A, CE = 2. ) (I C =. A, CE = 2. ) (I C = 3. A, CE = 2. ) CollectorEmitter Saturation oltage (Note 3) (I C = A, I B = ma) (I C =. A, I B = A) (I C = 2. A, I B =.2 A) (I C = 3. A, I B =.3 A) BaseEmitter Saturation oltage (Note 3) (I C =. A, I B = A) BaseEmitter Turnon oltage (Note 3) (I C =. A, CE = 2. ) Cutoff Frequency (I C = 5 ma, CE =, f = MHz) (BR)CEO (BR)CBO 4 (BR)EBO 6. I CBO I EBO h FE 2 2 2 8 CE(sat).5.45.8 5 36.5.9 5.25 BE(sat). BE(on).9 f T 2 A A MHz Input Capacitance ( EB = 5., f =. MHz) Cibo 36 pf Output Capacitance ( CB =, f =. MHz) Cobo 3 pf 3. Pulsed Condition: Pulse Width = 3 sec, Duty Cycle 2%. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2
NSSC3ET4G TYPICAL CHARACTERISTICS 5 45 5 C CE = 2 5 45 5 C CE = 5 h FE, DC CURRENT GAIN 4 35 3 25 2 5 55 C h FE, DC CURRENT GAIN 4 35 3 25 2 5 55 C 5. 5. Figure. DC Current Gain Figure 2. DC Current Gain.4.4 CE(sat), COLLECTOREMITTER SATURATION OLTAGE ().3.2 IC/IB = 5 C 55 C CE(sat), COLLECTOREMITTER SATURATION OLTAGE ().3.2 IC/IB = 5 5 C 55 C.. Figure 3. CollectorEmitter Saturation oltage Figure 4. CollectorEmitter Saturation oltage BE(sat), BASEEMITTER SATURATION OLTAGE ().2..8.6.4.2 IC/IB = 55 C 5 C BE(on), BASEEMITTER ON OLTAGE ().2..8.6.4.2 CE = 2 55 C 5 C.. Figure 5. BaseEmitter Saturation oltage Figure 6. BaseEmitter On oltage 3
NSSC3ET4G TYPICAL CHARACTERISTICS CE, COLLECTOREMITTER OLTAGE ().6.4.2..8.6.4.2 I C = 3 A I C = 2 A I C = A T A = I C =.5 A I C = A C, CAPACITANCE (pf), Cib Cob,, I B, BASE CURRENT (ma) R, REERSE OLTAGE () Figure 7. Collector Saturation Region Figure 8. Capacitance f T, CURRENTGAINBANDWIDTH PRODUCT (MHz),. I C, COLLECTOR CURRENT (ma) Figure 9. CurrentGainBandwidth Product CE = 5. S Single Pulse Test at T A = ms ms CE, COLLECTOR EMITTER OLTAGE () Figure. Safe Operating Area ms S R(t), TRANSIENT THERMAL RESPONSE ( C/W) D =.5.2.5 R JC(t) = r(t) R JC.2 R JC = 3.8 C/W D CURES APPLY FOR POWER. PULSE TRAIN SHOWN Single Pulse READ TIME AT t t t 2 T J(pk) - T C = P (pk) JC(t) DUTY CYCLE, D = t /t 2...... t, PULSE TIME (s) Figure. Typical Transient Thermal Response, JunctiontoCase P (pk) 4
NSSC3ET4G PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE D L3 L4 b2 e E b3 4 2 3 b A D B DETAIL A c.5 (3) M C A C c2 H L2 GAUGE PLANE L L DETAIL A ROTATED 9 CW A H C Z SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, 994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED.6 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX A.86.94 2.8 2.38 A..5. 3 b.25.35.63.89 b2.3.45.76.4 b3 8.25 4.57 5.46 c.8.24.46.6 c2.8.24.46.6 D.235.245 5.97 6.22 E.25.265 6.35 6.73 e.9 BSC 2.29 BSC H.37.4 9.4.4 L.55.7.4.78 L 8 REF 2.74 REF L2.2 BSC.5 BSC L3.35.5.89.27 L4.4. Z 55 3.93 SOLDERING FOOTPRINT* 6.2.244 2.58 2 3. 8 STYLE : PIN. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR 5.8.228.6.63 6.7.243 SCALE 3: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: 33675275 or 8344386 Toll Free USA/Canada Fax: 33675276 or 83443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 79 29 Japan Customer Focus Center Phone: 835875 5 ON Semiconductor Website: Order Literature: http:///orderlit For additional information, please contact your local Sales Representative NSSC3E/D
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