EXPERIMENT 4 LIMITER AND CLAMPER CIRCUITS 1. OBJECTIVES 1.1 To demonstrate the operation of a diode limiter. 1.2 To demonstrate the operation of a diode clamper. 2. INTRODUCTION PART A: Limiter Circuit Diode limiters are wave-shaping circuits: can be used to prevent signal voltages from going above or below certain levels. The limiting level may be either equal to the diode s barrier potential or made variable with a dc source voltage. These circuits are sometimes called clippers because of its clipping capability. PART B: Clamper Circuit The clamper also falls into the wave shaping circuit group. Since it adds a dc level to the input waveform, it is often referred to as a dc restorer. However, unlike that of the clipper, the shape of the input signal of a clamper is not changed. Clamper time constant 10 R C (4.1) L T input Peak output voltage (2) V out (peak) = V in (peak to peak) - V d (4.2) 3. COMPONENT AND EQUIPMENT PART A: Limiter Circuit 3.1 15 kω resistor 3.2 1 kω potentiometer 3.3 1N4001 silicon rectifier diode 3.4 DC power supply (0 15V) 3.5 Signal generator 3.6 Dual trace oscilloscope 3.7 Breadboard PART B: Clamper Circuit 3.1 10 kω resistor 3.2 10 uf electrolytic capacitor, 25V 3.3 1N4001 silicon rectifier diode 3.4 Signal generator 3.5 Dual trace oscilloscope 3.6 Breadboard 27
4. PROCEDURE PART A: Limiter Circuit 4.1 Positive Limiter Circuit: 4.1.1 Wire the limiter circuit shown in the schematic diagram in Figure 4.1. Figure 4.1: of Positive Limiter Circuit 4.1.2 Set oscilloscope to the following settings: Channels 1 & 2 : 1 V/division, dc coupling Time base : 1 ms/division (NOTE: Without any input signal connected to the breadboard, position the two lines on the oscilloscope s display so that they are at the same level (that is, zero volts) centered vertically on the display.) 4.1.3 Connect the signal generator to the breadboard. 4.1.4 Adjust the signals generator s output level at 6V peak-to-peak at a frequency of 200 Hz. (You should see two waveforms similar to those shown in Figure 4.2.) Figure 4.2: Time base: 1 ms/division 4.1.5 Sketch the clipped waveform, showing the positive and negative peak values on the data page at the end of this experiment. 28
4.2 Negative Limiter Circuit: 4.2.1 Disconnect the signal source from the circuit. 4.2.2 Reverse the polarity of the diode in the circuit, as shown in Figure 4.3. Reconnect the signal to the circuit. Figure 4.3: of Negative Limiter Circuit 4.2.3 Sketch the clipped waveform, showing the positive and negative peak values on the data page at the end of this experiment. (NOTE: The behavior is opposite that if the positive limiter. The waveform has all negative peaks of the input signal removed, as shown in Figure 4.4) Figure 4.4: Time base: 1ms/division 29
4.3 Positive Biased Clipper Circuit: 4.3.1 Connect the circuit of Figure 4.5. Figure 4.5: of Positive Biased Clipper Circuit 4.3.2 Apply power to the breadboard and adjust the potentiometer so that the dc voltage (V DC ) is + 1.5V. 4.3.3 Connect the signal generator, set at 6 V peak-to-peak, to the breadboard. Sketch the clipped waveform, showing the dc positive and negative peak values on the data page at the end of this experiment. 4.3.4 Vary the resistance of the 1 kω potentiometer from one extreme to the other. Observe what happened to the clipping level. 4.4 Negative Biased Limiter Circuit: 4.4.1 Reverse the polarities of both the diode and the dc power supply in the circuit, as shown in Figure 4.6. Figure 4.6: of Negative Biased Limiter Circuit 4.4.2 Adjust the potentiometer so that the dc voltage (V DC ) is -1.5 V. 4.4.3 Connect the signal generator, set at 6V peak-to-peak, to the breadboard. 4.4.4 Sketch the clipped waveform, showing the dc positive and negative peak values on the data page at the end of this experiment. 4.4.5 Vary the resistance of the 1 kω potentiometer from one extreme to the other. Observe what happened to the clipping level. 30
PART B: Clamper Circuit 4.1 Positive Clamper: 4.1.1 Wire the clamper circuit shown in the schematic diagram in Figure 4.7. Figure 4.7: Schematic diagram of Positive Clamper circuit 4.1.2 Set oscilloscope to the following approximate settings: Channels 1 & 2 : 2.0 V/division, dc coupling Time base : 0.25 ms /division (NOTE: Without any input signal connected to the breadboard, position the two lines on the oscilloscope s display so that they are at the same level.) 4.1.3 Connect the signal generator to the breadboard. 4.1.4 Adjust the signal generator s output level at 5V peak to peak at a frequency of 1 khz. 4.1.5 Sketch both the input and the output waveforms, showing the positive and negative peak values for both on the data page at the end of this experiment. 4.1.6 Increase the peak to peak input voltage. Observe the waveforms. 4.2 Negative Clamper: 4.2.1 Reverse the polarity of the diode in the Figure 4.7, and repeat Step 4.1. Observe what happens. 4.2.2 Sketch both the input and the output waveforms, showing the positive and negative peak values for both on the data page at the end of this experiment. 4.2.3 Increase the peak to peak input voltage. Observe what happens. (NOTE: You should see that the peak to peak output voltage increases, its positive peak remains clamped at the same positive voltage level measured before. You should find that the negative peak output voltage is again approximately equal to the peak to peak input voltage.) 31
DMT 121/3 ELECTRONIC DEVICES ASSESSMENT FORM NAME: MATRIX NO: COURSE: EXPERIMENT NO: RESULTS: PART A: Limiter Circuit Positive limiter (Step 4.1) Negative limiter (Step 4.2) Positive-biased limiter (Step 4.3) Negative-biased limiter (Step 4.4) 32
PART B: Clamper Circuit Positive Clamper Negative Clamper 33
DISCUSSION Part A: Figure 4.8 Assume the Function Generator is set for a 6 Vpp sine wave at 1.0 khz. Sketch waveform you would expect to see on the oscilloscope screen. Part B: Figure 4.9 An oscilloscope is connected to the circuit from Figure 4.9 as shown. Is the circuit working correctly? If not, what is the likely problem? 34
CONCLUSION Explain the difference between a limiting and a clamping circuit. 35