+ a FEATURES ns max Propagation Delay Single V or Dual V Supply Operation CMOS or TTL Compatible Output 0 V max Input Offset Voltage 00 V max Input Hysteresis Voltage V max Differential Input Voltage Onboard Latch 0 mw Power Dissipation Available in -Pin Plastic and Hermetic Cerdip Packages Available in Tape and Reel in Accordance with EIA-A Standard APPLICATIONS Zero-Crossing Detectors Overvoltage Detectors Pulse-Width Modulators Precision Rectifiers Discrete A/D Converters Delta-Sigma Modulator A/Ds V S V LOGIC Fast, Precision Comparator AD90 CONNECTION DIAGRAMS -Pin Plastic Mini-DIP (N) and Cerdip (Q) Packages + AD90 -Pin SOIC (R) Package AD90 V LOGIC GROUND LATCH GROUND LATCH V S PRODUCT DESCRIPTION The AD90 is a fast ( ns), precise voltage comparator, with a number of features that make it exceptionally versatile and easy to use. The AD90 may operate from either a single V supply or a dual ± V supply. In the single-supply mode, the AD90 s inputs may be referred to ground, a feature not found in other comparators. In the dual-supply mode it has the unique ability of handling a maximum differential voltage of V across its input terminals, easing their interfacing to large amplitude and dynamic signals. This device is fabricated using Analog Devices Complementary Bipolar (CB) process which gives the AD90 s combination of fast response time and outstanding input voltage resolution ( mv max). To preserve its speed and accuracy, the AD90 incorporates a low glitch output stage that does not exhibit the large current spikes normally found in TTL or CMOS output stages. Its controlled switching reduces power supply disturbances that can feed back to the input and cause undesired oscillations. The AD90 also has a latching function which makes it suitable for applications requiring synchronous operation. The AD90 is available in five performance grades. The AD90J and the AD90K are rated over the commercial temperature range of 0 C to 0 C. The AD90A and AD90B are rated over the industrial temperature range of 0 C to + C. The AD90S is rated over the military temperature range of C to + C. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. PRODUCT HIGHLIGHTS. The AD90 s combination of speed, precision, versatility and low cost makes it suitable as a general purpose comparator in analog signal processing and data acquisition systems.. Built-in hysteresis and a low-glitch output stage minimize the chance of unwanted oscillations, making the AD90 easier to use than standard open-loop comparators.. The hysteresis combined with a wide input voltage range enables the AD90 to respond to both slow, low level (e.g., 0 mv) signals and fast, large amplitude (e.g., 0 V) signals.. A wide variety of supply voltages is acceptable for operation of the AD90, ranging from single V to dual + V/ V, ± V, or + V/± V supplies.. The AD90 s power dissipation is the lowest of any comparator in its speed range.. The AD90 s output swing is symmetric between V LOGIC and ground, thus providing a predictable output under a wide range of input and output conditions. One Technology Way, P.O. Box 90, Norwood, MA 00-90, U.S.A. Tel: /9-00 www.analog.com Fax: /- Analog Devices, Inc., 0
AD90* PRODUCT PAGE QUICK LINKS Last Content Update: 0//0 COMPARABLE PARTS View a parametric search of comparable parts. DOCUMENTATION Application Notes AN-: Applying the OP0 Op Amp As a High Precision Comparator AN-: High Speed Comparators Provide Many Useful Circuit Functions When Used Correctly Data Sheet AD90: Fast, Precision Comparator Data Sheet REFERENCE DESIGNS CN0 REFERENCE MATERIALS Product Selection Guide Comparators Product Brochure 00 DESIGN RESOURCES AD90 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints DISCUSSIONS View all AD90 EngineerZone Discussions. SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
AD90 SPECIFICATIONS DUAL SUPPLY AD90J/A AD90K/B AD90S Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit RESPONSE CHARACTERISTIC 00 mv Step Propagation Delay, t PD mv Overdrive 0 0 0 ns T MIN to T MAX /0 /0 0 ns CHARACTERISTICS Output HIGH Voltage, V OH. ma Source.... ma Source...... V T MIN to T MAX./... V Output LOW Voltage, V OL. ma Sink 0. 0. 0. V. ma Sink 0. 0. 0. 0. 0. 0. V T MIN to T MAX 0./0. 0. 0. V INPUT CHARACTERISTICS Offset Voltage 0..0 0.0 0. 0..0 mv T MIN to T MAX. 0.. mv Hysteresis T MIN to T MAX 0. 0. 0. 0. 0. 0. 0. 0. 0. mv Bias Current Either Input.... µa T MIN to T MAX.. µa Offset Current 0.0 0. 0.0 0. 0.0 0. µa T MIN to T MAX 0. 0. 0. µa Power Supply Rejection Ratio DC V S ±0% 0 90 00 0 90 db T MIN to T MAX 9 db Input Voltage Range Differential Voltage V S ± V V S V S V S V Common Mode V S V V S V V S V V Common Mode Rejection Ratio 0 V<V CM 0 9 0 0 9 db <+0 V T MIN to T MAX 90 00 db Input Impedance 0 0 0 MΩ pf LATCH CHARACTERISTICS Latch Hold Time, t H ns Latch Setup Time, t S 0 0 0 ns LOW Input Level, V IL T MIN to T MAX 0. 0. 0. V HIGH Input Level, V IH T MIN to T MA X... V Latch Input Current.... µa T MIN to T MAX µa SUPPLY CHARACTERISTICS Diff Supply Voltage (Operation @ C and = V, V S = V, V LOGIC = V unless otherwise noted.) V LOGIC = V T MIN to T MAX... V Logic Supply T MIN to T MAX.0.0. V Quiescent Current = V 0 0 0 ma V S V S = V ma V LOGIC V LOGIC = V... ma Power Dissipation mw TEMPERATURE RANGE Rated Performance T MIN to T MAX 0 to 0/ 0 to + 0 to 0/ 0 to + to + C NOTES Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure. Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure. must be no lower than (V LOGIC 0. V) in any supply operating conditions, except during power up. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test. Specifications subject to change without notice.
SINGLE SUPPLY (Operation @ C and = V LOGIC = V, V S = 0 V unless otherwise noted.) AD90J/A AD90K/B AD90S Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit RESPONSE CHARACTERISTIC 00 mv Step Propagation Delay, t PD mv Overdrive 0 0 0 ns T MIN to T MAX 0/0 0/0 ns CHARACTERISTICS Output HIGH Voltage, V OH. ma Source.... ma Source...... V T MIN to T MAX... V Output LOW Voltage, V OL. ma Sink 0. 0. 0. V. ma Sink 0. 0. 0. 0. 0. 0. V T MIN to T MAX 0. 0. 0. V INPUT CHARACTERISTICS Offset Voltage 0.. 0. 0. 0.. mv T MIN to T MAX.0 0..0 mv Hysteresis T MIN to T MAX 0. 0. 0. 0. 0. 0. 0. 0..0 mv Bias Current Either Input..0.. µa T MIN to T MAX µa Offset Current 0.0 0. 0.0 0. 0.0 0. µa T MIN to T MAX 0. 0. 0. µa Power Supply Rejection Ratio DC. V V S. V 0 90 00 0 90 db T MIN to T MAX / 9 db Input Voltage Range Differential Voltage V S V S V S V Common Mode 0 V 0 V 0 V V Input Impedance 0 0 0 MΩ pf LATCH CHARACTERISTICS Latch Hold Time, t H ns Latch Setup Time, t S 0 0 0 ns LOW Input Level, V IL T MIN to T MAX 0. 0. 0. V HIGH Input Level, V IH T MIN to T MAX... V Latch Input Current.... µa T MIN to T MAX µa SUPPLY CHARACTERISTICS Supply Voltage T MIN to T MAX... V Quiescent Current 0 0 0 ma Power Dissipation 0 0 0 mw TEMPERATURE RANGE Rated Performance T MIN to T MAX 0 to 0/ 0 to + 0 to 0/ 0 to + to + C NOTES Pin tied to Pin, and Pin tied to Pin. Defined as the average of the input voltages at the low to high and high to low transition points. Refer to Figure. Defined as half the magnitude between the input voltages at the low to high and high to low transition points. Refer to Figure. V S must not be connected above ground. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final test. Specifications subject to change without notice. AD90
AD90 ABSOLUTE MAXIMUM RATINGS, Supply Voltage................................ ± V Internal Power Dissipation................... 00 mw Differential Input Voltage..................... ±. V Output Short-Circuit Duration................ Indefinite Storage Temperature Range (N, R)........................... C to + C (Q).............................. C to +0 C Lead Temperature Range (Soldering 0 sec)........ 00 C Logic Supply Voltage............................. V NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal characteristics: plastic N- package: θ JA = 90 C/watt; ceramic Q- package: θ JA = 0 C/watt, θ JC = 0 C/watt. SOIC (R-) package: θ JA = 0 C watt; θ JC = C/watt. + V + V AD90 LATCH (OPTIONAL) 0 Ω + V AD90 LATCH (OPTIONAL) 0Ω V Figure. Basic Dual Supply Configuration (N, Q Package Pinout) Figure. Basic Single Supply Configuration (N, Q Package Pinout) +V +V 0Ω 00mV Ω AD90 k TEK 90 SCOPE PULSE GENERATOR.V.V HP 0Ω 00Ω HP MPS 0Ω mv 0kΩ V V VOLTAGE SOURCE V 0Ω Figure. Response Time Test Circuit (N, Q Package Pinout)
LOW VOLTAGE Volts LOW VOLTAGE Volts Typical Performace Characteristics AD90 TPC. Propagation Delay vs. Overdrive TPC. Propagation Delay vs. Load Capacitance TPC. Propagation Delay vs. Fanout (LSTTL and CMOS) 0. 0. 0. TEMP = + C 0. 0. 0. 0. 0. 0.0 0 0 I SINK ma TPC. Propagation Delay vs. Source Resistance TPC. Propagation Delay vs. Temperature TPC. Output Low Voltage vs. Sink Current t H.0 INPUT 0.9. TEMP = + C.. V IH t S.. LATCH V IL. t PD. 0 0 I SOURCE ma V OH V OL TPC. Output High Voltage vs. Source Current TPC. Total Supply Current vs. Temperature t S = SETUP TIME t H = HOLD TIME t PD = COMPARATOR RESPONSE TIME Figure. Latch Timing
AD90 CIRCUIT DESCRIPTION The AD90 possesses the overall characteristics of a standard monolithic comparator: differential inputs, high gain and a logic output. However, its function is implemented with an architecture which offers several advantages over previous comparator designs. Specifically, the output stage alleviates some of the limitations of classic TTL comparators and provides a symmetric output. A simplified representation of the AD90 circuitry is shown in Figure. V OUT V OH V OL 0 V OS V H V H V LOGIC V H = HYSTERESIS VOLTAGE V OS = INPUT OFFSET VOLTAGE + A Q V OUT + Av GAIN STAGE A + STAGE Q GND Figure. AD90 Block Diagram The output stage takes the amplified differential input signal and converts it to a single-ended logic output. The output swing is defined by the pull-up PNP and the pull-down NPN. These produce inherent rail-to-rail output levels, compatible with CMOS logic, as well as TTL, without the need for clamping to internal bias levels. Furthermore, the pull-up and pull-down levels are symmetric about the center of the supply range and are referenced off the V LOGIC supply and ground. The output stage has nearly symmetric dynamic drive capability, yielding equal rise and fall times into subsequent logic gates. Unlike classic TTL or CMOS output stages, the AD90 circuit does not exhibit large current spikes due to unwanted current flow between the output transistors. The AD90 output stage has a controlled switching scheme in which amplifiers A and A drive the output transistors in a manner designed to reduce the current flow between Q and Q. This also helps minimize the disturbances feeding back to the input which can cause troublesome oscillations. The output high and low levels are well controlled values defined by V LOGIC ( V), ground and the transistor equivalent Schottky clamps and are compatible with TTL and CMOS logic requirements. The fanout of the output stage is shown in TPC for standard LSTTL or HCMOS gates. Output drive behavior vs. capacitive load is shown in TPC. HYSTERESIS The AD90 uses internal feedback to develop hysteresis about the input reference voltage. Figure shows how the input offset voltage and hysteresis terms are defined. Input offset voltage (V OS ) is the difference between the center of the hysteresis range and the ground level. This can be either positive or negative. The hysteresis voltage (V H ) is one-half the width of the GND Figure. Hysteresis Definitions (N, Q Package Pinout) hysteresis range. This built-in hysteresis allows the AD90 to avoid oscillation when an input signal slowly crosses the ground level. SUPPLY VOLTAGE CONNECTIONS The AD90 may be operated from either single or dual supply voltages. Internally, the V LOGIC circuitry and the analog frontend of the AD90 are connected to separate supply pins. If dual supplies are used, any combination of voltages in which V LOGIC 0. V and V S 0 may be chosen. For single supply operation (i.e., = V LOGIC ), the supply voltage can be operated between. V and V. Figure shows some other examples of typical supply connections possible with the AD90. BYPASSING AND GROUNDING Although the AD90 is designed to be stable and free from oscillations, it is important to properly bypass and ground the power supplies. Ceramic 0. µf capacitors are recommended and should be connected directly at the AD90 s supply pins. These capacitors provide transient currents to the device during comparator switching. The AD90 has three supply voltage pins,, V S and V LOGIC. It is important to have a common ground lead on the board for the supply grounds and the GND pin of the AD90 to provide the proper return path for the supply current. LATCH OPERATION The AD90 has a latch function for retaining input information at the output. The comparator decision is latched and the output state is held when Pin is brought low. As long as Pin is kept low, the output remains in the high or low state, and does not respond to changing inputs. Proper capture of the input signal requires that the timing relationships shown in Figure are followed. Pin should be driven with CMOS or TTL logic levels. The output of the AD90 will respond to the input when Pin is at a high logic level. When not in use, Pin should be connected to the positive logic supply. When using dual supplies, it is recommended that a 0 Ω resistor be placed in series with Pin and the driving logic gate to limit input currents during powerup.
Applying the AD90 + V AD90 +V = +V, V S = 0V V LOGIC = +V 0Ω OUT AD90 V +V = +V, V S = V, V LOGIC = +V OUT AD90 V +V = +V, V S = V V LOGIC = +V Figure. Typical Power Supply Connections (N, Q Package Pinout) Window Comparator for Overvoltage Detection The wide differential input range of the AD90 makes it suitable for monitoring large amplitude signals. The simple overvoltage detection circuit shown in Figure illustrates direct connection of the input signal to the high impedance inputs of the comparator without the need for special clamp diodes to limit the differential input voltage across the inputs. OUT The minus supply current is proportional to absolute temperature and compensates for the change in the sense resistance with temperature. The width and length of the PC board trace determine the resistance of the trace and consequently the trip current level. I LIMIT = 0 mv/r SENSE R SENSE = rho (trace length/trace width) rho = resistance of a unit square of trace PC BOARD TRACE L O A D R SENSE 0mV/00mA.Ω + V AD90 0Ω +V +V Figure 9. Ground Referred Overload Detector Circuit (N, Q Package Pinout) V IN +.V AD90 V +V +V 0Ω SIGN = HIGH 0 = LOW OVERRANGE = Precision Full-Wave Rectifier The high speed and precision of the AD90 make it suitable for use in the wide dynamic range full-wave rectifier shown in Figure 0. This circuit is capable of rectifying low level signals as small as a few mv or as high as 0 V. Input resolution, propagation delay and op amp settling will ultimately limit the maximum input frequency for a given accuracy level. Total comparator plus switch delay is approximately 00 ns, which limits the maximum input frequency to MHz for clean rectification..v AD90 V 0Ω Figure. Overvoltage Detector (N, Q Package Pinout) Single Supply Ground Referred Overload Detector The AD90 is useful as an overload detector for sensitive loads that must be powered from a single supply. A simple ground referenced overload detector is shown in Figure. The comparator senses a voltage across a PC board trace and compares that to a reference (trip) voltage established by the comparator s minus supply current through a. Ω resistor. This sets up a 0 mv reference level that is compared to the sense voltage. V IN +V +V 0kΩ 0kΩ 0Ω AD90 V 0kΩ +V AD V FET SWITCHES THE GAIN FROM + TO NMOS FET (R ON < 0 Ω) Figure 0. Precision Full-Wave Rectifier (N, Q Package Pinout) V OUT
AD90 kω STANDARD SCHOTTKY DIODE V BIPOLAR SIGNAL INPUT + V GND 00 Ω* * A RESISTOR UP TO 0k Ω MAYBE USED TO REDUCE THE SOURCE AND SINK CURRENT OF THE DRIVER. HOWEVER, THIS WILL SLIGHTLY LOWER THE MAXIMUM USABLE CLOCK RATE..V 0.V TTL LEVEL Figure. A Bipolar to CMOS TTL Line Receiver (N, Q Package Pinout) Bipolar to CMOS/TTL It is sometimes desirable to translate a bipolar signal (e.g., ± V) coming from a communications cable or another section of the system to CMOS/TTL logic levels; such an application is referred to as a line receiver. Previously, the interface to the bipolar signal required either a dual (± ) power supply or a reference voltage level about which the line receiver would switch. The AD90 may be used in a simple circuit to provide a unique capability: the ability to receive a bipolar signal while powered from a single V supply. Other comparators cannot perform this task. Figure shows a kω resistor in series with the input signal which is then clamped by a Schottky diode, holding the input of the comparator at 0. V below ground. Although the comparator is specified for a common mode range down to V S, (in this case ground) it is permissible to bring one of the inputs a few hundred mv below ground. The comparator switches around this level and produces a CMOS/TTL compatible swing. The circuit will operate to switching frequencies of 0 MHz.
AD90 OUTLINE DIMENSIONS 0.00 (0.) 0. (9.) 0. (9.0) 0.0 (.) MAX 0.0 (.) 0.0 (.0) 0. (.9) 0.0 (0.) 0.0 (0.) 0.0 (0.) 0.00 (.) BSC 0.0 (.) 0.0 (.) 0.0 (.0) 0.0 (0.) MIN SEATING PLANE 0.00 (0.) MIN 0.00 (.) MAX 0.0 (0.) GAUGE PLANE 0. (.) 0.0 (.) 0.00 (.) 0.0 (0.9) MAX 0.9 (.9) 0.0 (.0) 0. (.9) 0.0 (0.) 0.00 (0.) 0.00 (0.0) 0.00 (.) 0.00 (.) 0.0 (.) COMPLIANT TO JEDEC STANDARDS MS-00 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure. -Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-) Dimensions shown in inches and (millimeters) 000-A 0.00 (0.) MIN 0.0 (.0) MAX 0.0 (.) 0.0 (.9) 0.00 (.) BSC 0.00 (.0) MAX 0.0 (0.9) MAX 0.00 (.) 0.0 (0.) 0.0 (.) 0.90 (.) 0.00 (.0) 0. (.) 0.0 (0.) 0.0 (0.) 0.00 (.) 0.00 (0.) 0.0 (.) MIN SEATING PLANE 0 0.0 (0.) 0.00 (0.0) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure. -Lead Ceramic Dual In-Line Package [CERDIP] (Q-) Dimensions shown in inches and (millimeters) Rev. E Page 9
AD90.00 (0.9).0 (0.90).00 (0.).0 (0.9).0 (0.).0 (0.) 0. (0.009) 0.0 (0.000) COPLANARITY 0.0 SEATING PLANE. (0.000) BSC. (0.0). (0.0) 0. (0.00) 0. (0.0) 0 0. (0.009) 0. (0.00) 0.0 (0.09) 0. (0.0099). (0.000) 0.0 (0.0) COMPLIANT TO JEDEC STANDARDS MS-0-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure. -Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-) Dimensions shown in millimeters and (inches) 00-A ORDERING GUIDE Model Temperature Range Package Description Package Option AD90JN 0 C to 0 C -Lead PDIP N- AD90JNZ 0 C to 0 C -Lead PDIP N- AD90JR 0 C to 0 C -Lead SOIC_N R- AD90JR-REEL 0 C to 0 C -Lead SOIC Reel AD90JR-REEL 0 C to 0 C -Lead SOIC_N R- AD90JRZ 0 C to 0 C -Lead SOIC_N R- AD90JRZ-REEL 0 C to 0 C -Lead SOIC Reel AD90JRZ-REEL 0 C to 0 C -Lead SOIC Reel AD90AQ 0 C to + C -Lead CERDIP Q- AD90SQ C to + C -Lead CERDIP Q- Z = RoHS Compliant Part. REVISION HISTORY / Rev. D to Rev. E Updated Outline Dimensions... 9 Changes to Ordering Guide... 0 /0 Rev. C to Rev. D Edits to SOIC (R-) Package... 9 0/0 Rev. B to Rev. C Edits to Features... Edits to Product Description... Deleted Metalization Photograph... Edits to Ordering Guide... 0 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00-0-/(E) Rev. E Page 0