Laboratory #9 MOSFET Biasing and Current Mirror

Laboratory #9 MOSFET Biasing and Current Mirror. Objectives 1. Review the MOSFET characteristics and transfer function. 2. Understand the relationship between the bias, the input signal and the output response. 3. Understand the MOSFET biasing techniques.. Components and nstruments 1. Components (1) MOSFET array C4007 (2) Resistor: 4.7 kωx4, 1kΩx1, 10kΩx1, 330KΩx1 2. nstruments (1) Function generator (2) C power supply (3) igital multimeter (4) Oscilloscope. Reading 1. Section 5.1-5.7 of the Textbook Microelectronic Circuits, 6 th edition, Sedra/Smith. V. Preparation Nowadays, there are more and more complicated functions can be implemented using MOSFETs in VLS circuits. But no matter how complicated the functions are, all of them are realized by combining the processes of addition, subtraction, and amplification on the voltage and current signals. n practical circuits design, at first, the operating points (bias points) for MOSFETs should be decided so that all functional blocks can operate correctly within the required dynamic range. As the result, the MOSFET biasing is an important issue for circuit design. n the following sections, the concept of MOSFET biasing and some basic MOSFET biasing methods will be introduced. 1. The MOSFET Transfer Characteristics Taking CS amplifier as an example (as shown in Fig. 9.1(a)), the 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-1 成大電機 EE, NCKU, Tainan City, Taiwan

transfer function of v S vs. v GS can be derived from Fig. 9.1(b). f there is no voltage applied to the gate (v GS =0), then no current will flow through R and v S is equal to v. When v GS exceeds the threshold voltage V t, the current begins to increase and v S becomes lower because of the higher voltage drop on R. Based on the relationship between v GS, v S and i in saturation region, the operating point will move from point A to point B. The MOSFET continues operating in saturation region until v GS >v S +V t. After point B, the output voltage decrease slowly toward zero. Here we identify a particular operating point C as V GS =V. The corresponding output voltage C will usually be very small. This point-by-point determination of the transfer characteristics results in the transfer curve shown in Fig. 9.1 (c). V R V S V GS (a) (b) (c) Fig. 9.1 (a) NMOS with a load resistor R (b) i vs. v S under different v GS (c) NMOS transfer function. The MOSFET is biased in different regions for different applications. For example, if the MOSFET is used to provide the function of amplification, it should be biased in the saturation region because of its maximal slope (which means maximal gain). After the biasing voltage of V GS has been set, small signal v gs is applied to the input, the output response of v S can then be observed at the drain of MOSFET. As shown in Fig. 9.2, the input signal is the combination of V GS and v gs. V V R R response signal VGS VS Applying signal vgs vgs vs v GS = V GS + v gs v S = V S + v ds i = + i d bias VGS Bias Bias and signal Fig. 9.2 Combination of bias and signal. 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-2 成大電機 EE, NCKU, Tainan City, Taiwan

2. Biasing in MOSFET Amplifier Circuits As mentioned in the previous section, the establishment of an appropriate C operating point is an essential step in the design of a MOSFET amplifier circuit. This is the step known as biasing design. An appropriate C operating point or bias point should ensure the operation in the saturation region for all expected input-signal levels, which is characterized by a stable and predictable C drain current, and by a C drain-to-source voltage V S that. (1) Biasing by fixed V GS The most straightforward approach to bias a MOSFET is to fix its gate-to-source voltage V GS at the required value and so the desired. This voltage value can simply be derived from the supply voltage V through the use of an appropriate voltage divider. Alternatively, it can be derived from any another suitable reference voltage available in the system. However, this is not a good technique in biasing a MOSFET. Recall that, 1 W 2 ncox VGS Vt (Eq. 9.1) 2 L and note that the values of V t, C ox and W/L vary widely for the same devices, since the process variation. Furthermore, both V t and μ n is temperature-dependent, and the is thus temperature-sensitive. To emphasize that MOSFET biasing by fixed V GS is not a good technique, here in Fig. 9.3, we show the extreme case of i -v GS characteristic curves of two same type MOSFETs in a batch. As the value of V GS is fixed, it will correspond to different drain current due to the process variation. Fig. 9.3 The use of fixed bias (constant V GS ) can result in a large variation in the value of. 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-3 成大電機 EE, NCKU, Tainan City, Taiwan

(2) Biasing by fixing V G with source degeneration A better biasing technique for discrete MOSFET circuits is to connect a resistor with the source lead while fixing the gate voltage V G, as shown in Fig. 9.4 (a). For this circuit we can write V G V R (Eq. 9.2) GS S f V G is much greater than V GS, will then be determined by the values of V G and R S. However, even if V G is not much larger than V GS, the resistor R S provides negative feedback and stabilize the value of the bias current. This could be understood that since V G is constant, V GS will decrease as increases, and this in turn results in a decrease in. This negative feedback function of R S gives it the name degeneration resistor. Fig. 9.4 (b) provides a graphical illustration of the effectiveness of this biasing scheme, where the intersection of the straight line of (Eq. 9.2) and the i -v GS characteristic curve provides the coordinates of the bias point. Compared to the case of fixed V GS, the variation in is much smaller. Also, note that the variation decreases as V G and R S are made larger, since this results in flatter slope. Fig. 9.4 Biasing using a fixed voltage with degeneration resistance (a) basic arrangement; (b) reduced variability in (3) Biasing with drain-to-gate feedback resistor Another simple MOSFET biasing circuit is to utilize a feedback resistor to connect between the drain and the gate as shown in Fig. 9.5. Here the large feedback resistance R G (usually in range of MΩ) forces the C voltage at the gate to be equal to that at the drain (because G =0). For this circuit, it can be expressed as follows. V V R (Eq. 9.3) GS which is similar to Eq. 9.2, and it has the same mechanism as the 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-4 成大電機 EE, NCKU, Tainan City, Taiwan

biasing scheme discussed in Fig. 9.4 (a). f changes for some reason, say increases, V GS will decrease according to Eq. 9.3. Thus the negative feedback function or degeneration provided by R G works to keep the value of as constant as possible. Fig. 9.5 Biasing MOSFET using feedback resistance, R G The biasing circuit of Fig. 9.5 can directly be utilized in CS amplifier. Apply the input voltage signal to the gate via a coupling capacitor for not disturbing the C bias conditions, and the amplified output signal at the drain can also be coupled to another part of the circuit via another capacitor. (4) Biasing using current mirror The most effective scheme for biasing a MOSFET amplifier is the using of a constant-current source, which is as shown in Fig. 9.6 (a). Resistor R establishes an appropriate C voltage at the drain to allow for the required output signal swing while ensuring that the transistor always remains in the saturation region. A circuit for implementing the constant-current source is shown in Fig. 9.6 (b). The key-point of the circuit is the transistor Q 1, whose drain is shorted to its gate and is thus operated in the saturation region, such that 1 W V 2 GS Vt (Eq. 9.4) 2 L 1 kn ' 1 n Eq. 9.4, we have neglected channel-length modulation. The drain current of Q 1 is supplied by V through resistor R. Since the gate current is zero, the drain current of Q 1 will be V VGS 1 REF (Eq. 9.5) R where the current through R could be considered as the reference 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-5 成大電機 EE, NCKU, Tainan City, Taiwan

current of the current source and denoted as REF. Eq. 9.4 and Eq. 9.5 can be used to determine the value of R, once the parameter values of Q 1 and the desired value for REF are given. Now consider the transistor Q 2, which has the same V GS as Q 1, its drain current can be expressed as Eq. 9.6 if Q 2 is ensured to be operated in saturation region. 1 W 2 2 kn ' VGS Vt (Eq. 9.6) 2 L 2 n Eq. 9.6, we have neglected channel-length modulation. Eq. 9.5 and Eq. 9.6 enables us to relate the current to the reference current REF, W / L 2 W / L 1 (Eq. 9.7) REF This circuit, which is known as a current mirror, is very popular in the design of C MOSFET amplifiers. Fig. 9.6 (a) MOSFET biasing using a constant-current source. (b) Constant-current source implemented by current mirror. 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-6 成大電機 EE, NCKU, Tainan City, Taiwan

V. Explorations The layout and connections of C4007 MOS array are shown in Fig. 9.7. C4007 consists of 6 transistors, 3 are p-channel and another 3 are n-channel, which are connected in some nodes in order to reduce the number of C pins required, but otherwise fairly flexible. 1 14 2 3 4 13 12 11 5 10 6 9 7 8 Fig. 9.7 C4007 MOSFET array NOTE: Pin14 must be connected to the most positive voltage, and pin 7 to the most negative. For the sake of safety, maintain the voltage between pin 7 and pin 14 at or below 16V to avoid internal voltage breakdown. Make sure you turn off the power supply before changing any circuit connection. VM: igital Voltage Meter CM: igital Current Meter MM: igital Multi-Meter 1. Transfer curve of NMOS CS amplifier +12V R V o V Fig. 9.8 CS MOSFET amplifier 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-7 成大電機 EE, NCKU, Tainan City, Taiwan

(1) Use the C4007 array to assemble the circuit as shown in Fig. 9.8. Choose the resistor R to be 1kΩ. Be sure to connect the substrates correctly to the supplies as indicated, i.e. pin14 to +12V, pin7 to the ground. (2) At first, apply a C voltage of V =0V to the gate so that the NMOS can be fixed-biased. Record the output voltage in Table 9.1. (3) Keep increasing the input voltage V until begins to decrease, then record the values of V and. According to Table 9.1, alter the input voltage V and record the corresponding until you finish the tables. (4) Further, change R into 10kΩ and 330kΩ, repeating steps (1)-(3), to finish Tables 9.2 and 9.3 respectively. 2. PMOS Current Mirror +5V Q 1 Q 2 Q 3 A R B 10kΩ B C R 1B 4.7kΩ R 2B 4.7kΩ E R 1A 4.7kΩ R 2A 4.7kΩ Fig. 9.9 A PMOS current mirror (1) Assemble the PMOS current mirror as shown in Fig. 9.9. (2) Use the VM to measure the voltages at nodes A, B, C,, E. Measure the current transfer ratios from input (A) to outputs (B and ) and record them in Table 9.4. (3) Short R 1A, noting the old and new values, and particularly the change in voltage. (4) Remove R 1A and R 2A, and short nodes B and. Record the current flow through point A and point B in Table 9.4 respectively. V. Reference 1. Laboratory manual for microelectronic circuits, third edition. 2. Microelectronic circuit, sixth edition. 3. C4007UBE datasheet, Texas nstruments. (http://focus.ti.com/lit/ds/symlink/cd4007ub.pdf) 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-8 成大電機 EE, NCKU, Tainan City, Taiwan

Class: Name: Laboratory #9 Pre-lab Student : Problem 1 (PSPCE simulation) Assemble the circuit as shown in Fig. 9.8 with R =10kΩ, and use C analysis to sweep V from 0V to 15V. Plot the transfer function of vs. V. Problem 2 (PSPCE simulation) Assemble the circuit as shown in Fig. 9.9. Use the transient analysis to measure the voltage and current values at nodes A, B, C,, and E. 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-9 成大電機 EE, NCKU, Tainan City, Taiwan

Laboratory #9 Report Class: Name: Student : Exploration 1 R = 1kΩ V 0V V t = 2V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V 5.5V 6.0V V 7.0V 8.0V 9.0V 10V 11V 12V Table 9.1 R = 10kΩ V 0V V t = 2V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V 5.5V 6.0V V 7.0V 8.0V 9.0V 10V 11V 12V Table 9.2 R = 330kΩ V 0V V t = 2V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V 5.5V 6.0V V 7.0V 8.0V 9.0V 10V 11V 12V Exploration 2 Table 9.3 Bias point measurement Node A B C E Voltage Current transfer ratio B A B A Current transfer ratio (with R 1A shorting) Current mirror (remove R XA and connecting B and ) A A A B 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-10 成大電機 EE, NCKU, Tainan City, Taiwan

Table 9.4 Problem 1 Use MATLAB or Excel to plot the vs. V transfer curve according your experimental results. (For Exploration 1) Problem 2 n Exploration 2, after removing R 1A and R 2A, does the current B become two times of A? f not, try to figure out the reasons. Conclusion 電子學實驗 ( 一 ) Electronics Laboratory (1), 2013 p. 9-11 成大電機 EE, NCKU, Tainan City, Taiwan