TVS Diode TVS (Transient Voltage Suppressor) ESD23-B1-W21 Bi-directional, 5.5 V, 7 pf, 21, RoHS and Halogen Free compliant Quality Requirement Category: Standard ESD23-B1-W21 Data Sheet Revision 1., 216-4-22 Final Power Management & Multimarket
Edition 216-4-22 Published by Infineon Technologies AG 81726 Munich, Germany 216 Infineon Technologies AG All Rights Reserved. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Product Overview 1 Product Overview 1.1 Features ESD / transient protection of high speed data lines according to: IEC61-4-2 (ESD): ±16 kv (air/contact discharge) IEC61-4-4 (EFT): ±2kV / ±4 A (5/5 ns) IEC61-4-5 (surge): ±3 A (8/2 µs) Bi-directional working voltage up to: V RWM =±5.5V Line capacitance: C L = 7 pf (typical) at f =1MHz Clamping voltage: V CL =13V (typical) at I TLP =16A with R DYN =.22Ω (typical) Very low reverse current: I R <1nA (typical) Minimized clamping overshoot due to extremely low parasitic inductance Small form factor SMD Size 21 and low profile (.58 mm x.28 mm x.15 mm) Bidirectional and symmetric I/V characteristics for optimized design and assembly Pb-free (RoHS compliant) and halogen free package Guidelines for optimized PCB design and assembly process available [2] 1.2 Application Examples ESD Protection of highly susceptible IC/ASICs in audio, headset, human digital interfaces Dedicated solution to boost space saving and high performance in miniaturized modern electronics 1.3 Product Description a) Pin configuration top view b) Schematic diagram Configuration_Schematic_Diagram.vst.vsd Figure 1-1 Pin Configuration and Schematic Diagram Table 1-1 Part Information Type Package Configuration Marking code ESD23-B1-W21 WLL-2-1 1 line, bi-directional A 1) 1) The device does not have any marking or date code on the device backside. The Marking code is on pad side. Final Data Sheet 3 Revision 1., 216-4-22
Maximum Ratings 2 Maximum Ratings Table 2-1 Maximum Ratings at T A = 25 C, unless otherwise specified 1) Parameter Symbol Values Unit Reverse working voltage V RWM ±5.5 V ESD (air / contact) discharge 2) V ESD ±16 kv Peak pulse power 3) P PK 56 W Peak pulse current 3) I PP ±3 A Operating temperature range T OP -55 to 125 C Storage temperature T stg -65 to 15 C 1) Device is electrically symmetrical 2) V ESD according to IEC61-4-2 (R =33Ω, C = 15 pf discharge network) 3) Stress pulse: 8/2μs current waveform according to IEC61-4-5 Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 3 Electrical Characteristics Figure 3-1 Definitions of electrical characteristics Final Data Sheet 4 Revision 1., 216-4-22
Electrical Characteristics Table 3-1 DC Characteristics at T A = 25 C, unless otherwise specified 1) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Breakdown voltage V BR 6.5 8 V I T =1mA Reverse current I R 1 na V R =5.5V 1) Device is electrically symmetrical Table 3-2 RF Characteristics at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Line capacitance C L 7 11 pf V R =V, f =1MHz 7 V R =V, f =1GHz Table 3-3 ESD and Surge Characteristics at T A = 25 C, unless otherwise specified 1) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Clamping voltage 2) V CL - - 1.5 V I TLP =1A, t p =1ns - - 15 I TLP =16A, t p =1ns Clamping voltage 3) - - 11.3 I PP =1A, t p =8/2µs - - 14 I PP =3A, t p =8/2µs Dynamic resistance 2) R DYN -.22 - Ω t p = 1 ns 1) Device is electrically symmetrical 2) Please refer to Application Note AN21[1]. TLP parameter: Z = 5 Ω, t p = 1ns, t r =.6 ns. 3) Stress pulse: 8/2μs current waveform according to IEC61-4-5 Final Data Sheet 5 Revision 1., 216-4-22
Typical Characteristics Diagrams 4 Typical Characteristics Diagrams Typical characteristics diagrams at T A = 25 C, unless otherwise specified 1-3 1-4 1-5 1-6 I R [A] 1-7 1-8 1-9 1-1 1-11 1-12 -5-4 -3-2 -1 1 2 3 4 5 V R [V] Figure 4-1 Reverse leakage current: I R = f(v R ) 1 9 8 C L [pf] 7 6 5 4 3 2 1 1 MHz 1 GHz.5 1 1.5 2 2.5 3 V R [V] Figure 4-2 Line capacitance: C L = f(v R ) Final Data Sheet 6 Revision 1., 216-4-22
Typical Characteristics Diagrams V CL [V] 5 45 Scope: 6 GHz, 2 GS/s 4 35 V CL-max-peak = 25 V 3 V CL-3ns-peak = 12 V 25 2 15 1 5-5 -1 1 2 3 4 5 6 7 8 9 t p [ns] Figure 4-3 Clamping voltage (ESD): V CL = f(t), 8 kv positive pulse V CL [V] 5-5 -1-15 -2-25 -3 V CL-max-peak = -24 V -35 V CL-3ns-peak = -11 V -4-45 -5 Scope: 6 GHz, 2 GS/s -1 1 2 3 4 5 6 7 8 9 t p [ns] Figure 4-4 Clamping voltage (ESD) V CL = f(t), 8 kv negative pulse Final Data Sheet 7 Revision 1., 216-4-22
Typical Characteristics Diagrams V CL [V] 5 45 Scope: 6 GHz, 2 GS/s 4 35 V CL-max-peak = 34 V 3 V CL-3ns-peak = 13 V 25 2 15 1 5-5 -1 1 2 3 4 5 6 7 8 9 t p [ns] Figure 4-5 Clamping voltage (ESD) V CL = f(t), 15 kv positive pulse V CL [V] 5-5 -1-15 -2-25 -3 V CL-max-peak = -35 V -35 V CL-3ns-peak = -12 V -4-45 -5 Scope: 6 GHz, 2 GS/s -1 1 2 3 4 5 6 7 8 9 t p [ns] Figure 4-6 Clamping voltage (ESD) V CL = f(t), 15 kv negative pulse Final Data Sheet 8 Revision 1., 216-4-22
Typical Characteristics Diagrams 3 25 ESD23-B1-W21 R DYN 15 12.5 2 1 15 1 R DYN =.22 Ω 7.5 5 I TLP [A] 5-5 2.5-2.5 Equivalent V IEC [kv] -1-15 R DYN =.22 Ω -5-7.5-2 -1-25 -12.5-3 -15-2 -15-1 -5 5 1 15 2 V TLP [V] Figure 4-7 Clamping voltage (TLP): I TLP = f(v TLP )[1] Final Data Sheet 9 Revision 1., 216-4-22
Typical Characteristics Diagrams 4 3 2 1 I PP [A] -1-2 -3-4 -15-1 -5 5 1 15 V CL [V] Figure 4-8 Clamping voltage (Surge): I PP = f(v CL )[1] Final Data Sheet 1 Revision 1., 216-4-22
Typical Characteristics Diagrams -5 Insertion Loss [db] -1-15 -2-25 -3 ESD23-B1-W21-35 1 1 1 1 f [MHz] Figure 4-9 Insertion loss vs. frequency in a 5 Ω system Final Data Sheet 11 Revision 1., 216-4-22
Package 5 Package Top view Bottom view.15±.1.28±.3 2.36 (.16) 1.58 ±.3.26±.2.2 ±.2 SG-WLL-2-1-PO V1 Figure 5-1 WLL-2-1 Package outline (dimension in mm).32.24.27.24.19.19.19.62.57.14 Copper Solder mask Stencil apertures Figure 5-2 WLL-2-1 Footprint (dimension in mm)recommendation for Printed Circuit Board Assembly[2].23.68 8 2.35.21 Deliveries can be in Embossed Tape with or without vacuum hole (no selection possible). Specification allows identical processing (pick & place) by users. Figure 5-3 WLL-2-1 Packing (dimension in mm) SG-WLL-2-1-TP V2 Marking on pad-side 1 Type code Type code 1 1 1 SG-WLL-2-1-MK V3 Figure 5-4 WLL-2-1 Marking example, Type code see: Table 1-1 Part Information on Page 3 Final Data Sheet 12 Revision 1., 216-4-22
References References [1] Infineon AG - Application Note AN21: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology [2] Infineon AG - Recommendation for Printed Circuit Board Assembly of Infineon WLL Packages http://www.infineon.com/dgdl/?fileid=db3a34344f7b4f91453db5427c [3] Infineon AG - Application Note AN392: TVS Diodes in Chip Scale Package reduce size and save cost Final Data Sheet 13 Revision 1., 216-4-22
Revision History: Page or Item Subjects (major changes since previous revision) Revision 1., 216-4-22 Trademarks of Infineon Technologies AG AURIX, BlueMoon, C166, CanPAK, CIPOS, CIPURSE, COMNEON, EconoPACK, CoolMOS, CoolSET, CORECONTROL, CROSSAVE, DAVE, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPIM, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, I²RF, ISOFACE, IsoPACK, MIPAQ, ModSTACK, my-d, NovalithIC, OmniTune, OptiMOS, ORIGA, PRIMARION, PrimePACK, PrimeSTACK, PRO-SIL, PROFET, RASIC, ReverSave, SatRIC, SIEGET, SINDRION, SIPMOS, SMARTi, SmartLEWIS, SOLID FLASH, TEMPFET, thinq!, TRENCHSTOP, TriCore, X-GOLD, X-PMU, XMM, XPOSYS. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. AUTOSAR is licensed by AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CAT-iq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. FlexRay is licensed by FlexRay Consortium. HYPERTERMINAL of Hilgraeve Incorporated. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. Mifare of NXP. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave Openwave Systems Inc. RED HAT Red Hat, Inc. RFMD RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex Limited. Last Trademarks Update 21-1-26 Final Data Sheet 14 Revision 1., 216-4-22
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