SNSS35200MR6T1G. 35 V, 5 A, Low V CE(sat) PNP Transistor. 35 VOLTS 5.0 AMPS PNP LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) 100 m

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35 V, 5 A, Low V CE(sat) PNP Transistor ON Semiconductor s e 2 PowerEdge family of low V CE(sat) transistors are miniature surface mount devices featuring ultra low saturation voltage (V CE(sat) ) and high current gain capability. These are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important. Typical application are DCDC converters and power management in portable and battery powered products such as cellular and cordless phones, PDAs, computers, printers, digital cameras and MP3 players. Other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. In the automotive industry they can be used in air bag deployment and in the instrument cluster. The high current gain allows e 2 PowerEdge devices to be driven directly from PMU s control outputs, and the Linear Gain (Beta) makes them ideal components in analog amplifiers. Features S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ0 Qualified and PPAP Capable These Devices are PbFree and are RoHS Compliant* MAXIMUM RATINGS () Rating Symbol Max Unit Collector-Emitter Voltage V CEO 35 Vdc Collector-Base Voltage V CBO 55 Vdc Emitter-Base Voltage V EBO 5.0 Vdc Collector Current Continuous I C 2.0 Adc Collector Current Peak I CM 5.0 A Electrostatic Discharge ESD HBM Class 3 MM Class C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 35 VOLTS 5.0 AMPS PNP LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) m 3 BASE 4 5 6 2 3 TSOP6 CASE 38G STYLE 6 COLLECTOR, 2, 5, 6 4 EMITTER MARKING DIAGRAM VS8 M VS8 = Device Code M = Date Code* = PbFree Package (*Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NSS35MR6TG SNSS35MR6TG TSOP6 (PbFree) TSOP6 (PbFree) 3,000 / Tape & Reel 3,000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. Semiconductor Components Industries, LLC, 203 September, 203 Rev. 5 Publication Order Number: NSS35MR6/D

THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation Derate above 25 C P D (Note ) 625 5.0 mw mw/ C Thermal Resistance, JunctiontoAmbient R JA (Note ) C/W Total Device Dissipation Derate above 25 C P D (Note 2).0 8.0 W mw/ C Thermal Resistance, JunctiontoAmbient R JA (Note 2) 20 C/W Thermal Resistance, JunctiontoLead # Total Device Dissipation (Single Pulse < 0 sec.) R JL 80 P Dsingle (Notes 2 & 3).75 C/W W Junction and Storage Temperature Range T J, T stg 55 to +50 C. FR4 @ Minimum Pad. 2. FR4 @.0 X.0 inch Pad. 3. Refer to Figure 8. 2

ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Typical Max Unit OFF CHARACTERISTICS CollectorEmitter Breakdown Voltage V (BR)CEO Vdc (I C = 0 madc, I B = 0) 35 45 CollectorBase Breakdown Voltage (I C = madc, I E = 0) EmitterBase Breakdown Voltage (I E = madc, I C = 0) Collector Cutoff Current (V CB = 35 Vdc, I E = 0) CollectorEmitter Cutoff Current (V CES = 35 Vdc) Emitter Cutoff Current (V EB = 4.0 Vdc) ON CHARACTERISTICS DC Current Gain (Note 4) (I C =.0 A, V CE =.5 V) (I C =.5 A, V CE =.5 V) (I C = 2.0 A, V CE = 3.0 V) CollectorEmitter Saturation Voltage (Note 4) (I C = 0.8 A, I B = 0.008 A) (I C =.2 A, I B = 2 A) (I C = 2.0 A, I B = 0.02 A) BaseEmitter Saturation Voltage (Note 4) (I C =.2 A, I B = 2 A) BaseEmitter Turnon Voltage (Note 4) (I C = 2.0 A, V CE = 3.0 V) Cutoff Frequency (I C = ma, V CE = 5.0 V, f = MHz) V (BR)CBO 55 65 V (BR)EBO 5.0 7.0 I CBO 0.03 I CES 0.03 I EBO h FE V CE(sat) 25 75 0.260 400 5 0.20 0.3 V BE(sat) 0.68 0.85 V BE(on) 0.8 0.875 f T Vdc Vdc Adc Adc Adc V V V MHz Input Capacitance (V EB = 0.5 V, f =.0 MHz) Cibo 600 650 pf Output Capacitance (V CB = 3.0 V, f =.0 MHz) Cobo 85 pf Turnon Time (V CC = 0 V, I B = ma, I C = A, R L = 3 ) t on 35 ns Turnoff Time (V CC = 0 V, I B = I B2 = ma, I C = A, R L = 3 ) t off 225 ns 4. Pulsed Condition: Pulse Width = 300 sec, Duty Cycle 2%. 3

V CE(sat), COLLECTOREMITTER SATURATION VOLTAGE (V) I C /I B = T A = 55 C T A = 50 C 0.00 0 V CE(sat), COLLECTOREMITTER SATURATION VOLTAGE (V) 0.25 0.20 5 0 0.05 0 0.00 I C /I B = 50 C.0 I C, COLLECTOR CURRENT (AMPS) 25 C 55 C Figure. Collector Emitter Saturation Voltage Figure 2. Collector Emitter Saturation Voltage h FE, DC CURRENT GAIN 0 T A = 50 C T A = 55 C V CE =.5 V 0 0.00 0 Figure 3. DC Current Gain versus Collector Current V BE(sat), BASEEMITTER SATURATION VOLTAGE (V). 0.9 T A = 55 C 0.8 0.7 0.6 0.5 0.4 T A = 50 C 0.3 0.2 I C /I B = 0 0.00 0 Figure 4. Base Emitter Saturation Voltage V BE(ON), BASEEMITTER ON VOLTAGE (V).2. 0.9 0.8 0.7 0.6 0.5 0.4 0.3 V CE = 3 V T A = 55 C T A = 50 C 0.2 0.00 0 Figure 5. Base Emitter TurnOn Voltage C, CAPACITANCE (pf) 0 C ibo C obo 0 0 V R, REVERSE VOLTAGE (V) Figure 6. Capacitance 4

0 s ms 0 ms ms s, COLLECTOR CURRENT (AMPS).0 DC I C SINGLE PULSE AT T amb = 25 C.0 0 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 7. Safe Operating Area r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE.0 D = 0.5 0.2 0.05 0.02 SINGLE PULSE 0.00 0.0000 0.000 0.00.0 0 0 t, TIME (sec) Figure 8. Normalized Thermal Response 5

PACKAGE DIMENSIONS TSOP6 CASE 38G02 ISSUE V E NOTE 5 e 0.05 A 6 D 5 4 2 3 b E A c L H M DETAIL Z DETAIL Z L2 GAUGE PLANE C SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, 994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 5 PER SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. MILLIMETERS DIM MIN NOM MAX A 0.90.00.0 A 0.06 0 b 0.25 0.38 0.50 c 0 8 0.26 D 2.90 3.00 3.0 E 2.50 2.75 3.00 E.30.50.70 e 0.85 0.95.05 L 0.20 0.40 0.60 L2 0.25 BSC M 0 0 STYLE 6: PIN. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR RECOMMENDED SOLDERING FOOTPRINT* 6X 0.60 3.20 6X 0.95 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: 303675275 or 8003443860 Toll Free USA/Canada Fax: 303675276 or 8003443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8002829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 790 290 Japan Customer Focus Center Phone: 83587050 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NSS35MR6/D