IFB270 Advanced Electronic Circuits

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IFB270 Advanced Electronic Circuits Chapter 13: Basic op-amp circuits Prof. Manar Mohaisen Department of EEC Engineering

Introduction Review of the Precedent Lecture Op-amp operation modes and parameters Op-amp circuits with a negative feedback Effects of the negative feedback on the op-amp impedances Open-loop p frequency response of an op-amp p Closed-loop frequency response of an op-amp 2

Class Objectives Introduce the level detection op-amp circuits Introduce the op-amp comparators and their applications Introduce the summing op-amp amplifiers and some applications Introduce the integrator and differentiator op-amp circuits Keywords 3

A comparator Comparators Zero-level detection An op-amp circuit that compares two input voltages It produces an output that is at either one of two states (greater than or less than) Zero-level detection The inverting input is grounded and the input is applied to noninverting input Open-loop configuration leads to saturation even if for a small input Therefore, when the input goes from +ve to ve value, the output goes from + out(max) to out(max) 4

Nonzero-level detection Comparators contd. Nonzero-level detection When the input is larger than REF, the output is + out(max) Otherwise the output is out(max) REF R = 2 ( ) R + R + REF Z 1 2 = 5

Comparators contd. Nonzero-level detection contd. Nonzero-level detection Example 13-1: Draw the output in relation to the input voltage REF R = 2 ( + ) = R1 + R2 1 + ( 15) = 1.63 1+ 8.2 6

A sine wave example Comparators contd. Effects of noise on the comparator operation y() t = x() t + n() t 123 123 123 noisy desired noise signal signal undesired 7

Hysteresis Comparators contd. Reducing noise effects with hysteresis There is a higher reference level when the input voltage goes from a lower value to higher value than when the input goes from a higher to a lower value This can be achieved by using a feedback form the output as shown below 8

Hysteresis Comparators contd. Reducing noise effects with hysteresis contd. There is a higher reference level when the input voltage goes from a lower value to higher value than when the input goes from a higher to a lower value lower value to higher value R ( ) 2 REF = R1 + R + 2 out(max) higher value to lower value R ( ) 2 REF = R1 + R 2 out(max) 9

Hysteresis Comparators contd. Reducing noise effects with hysteresis contd. There is a higher reference level when the input voltage goes from a lower value to higher value than when the input goes from a higher to a lower value Input moves from a lower value to higher value Output is +ve and moves to ve The reference value is +ve but moves to ve R = 2 REF = ( + (UTP) out (max) ) R + R 1 2 Input moves from a higher value to lower value Output is ve and moves to +ve The reference value is ve but moves to +ve R = 2 (LTP) REF = ( out(max) ) R + R 1 2 10

Bounding Comparators contd. Output bounding Limiting the output voltage to a value less than the saturation level Zener diode is usually used for such purpose 11

Bounding Comparators contd. Output bounding Limiting the output voltage to a value less than the saturation level Two Zener diodes can be used to limit the output to ±( Z + 0.7) Operation When the output is positive and >( Z +07) 0.7), it will be limited to ( Z +07) 0.7) Output is connected in parallel with the two series diodes (-ve input of the op-amp is ground) When the output is negative and < -( Z + 0.7), it will be limited to -( Z + 0.7) What happens when the output is between these two values? [3 points] 12

Bounding Example 13-3 Comparators contd. Output bounding contd. Determine the output voltage waveform for the following circuit Solution: Since input current = 0 I R1 D 1 + = D2 = ± (4.7 + 0.7) =± 54μA R 100 k 1 Since input current = 0, I R1 = I R2, therefore out = R 1+ R2 = IR 1( R1+ R2) =± 54 μ (147k) =± 7.94 The upper trigger and lower trigger points are given by UTP LTP R = ( + ) = ( + 7.94) =+ 2.54 2 47 R out 1+ R 2 147 R 2 ( ) 47 = out = ( 7.94) = 2.54 R + R 147 1 2 13

Comparators contd. Applications Over-temperature sensing circuit R 1 is a thermistor with a negative temperature coefficient Its resistance decreases as the temperature increases. R 2 is set to a value equivalent to the thermistor resistance at the critical temperature When R 1 is higher than R 2, the output of the op-amp is at negative saturation value When R 1 is equal to or less than R 2, the output is at positive saturation value Q 1 is therefore turned on and the alarm is activated 14

Comparators contd. Applications contd. Analog-to-digital (A/D) conversion This ADC is referred to as flash or simultaneous converter (2 n 1) comparators are required n is the number of output bits The priority encoder Produces a binary number that is equivalent to the highest value input The sampling rate Time between any two consecutive samples Is controlled by a pulse on Enable input of the priority encoder 15

Example 13-4 Comparators contd. Applications contd. Find the output binary sequence for the following input signal and sampling pulses 16

Summing amplifier Summing Amplifiers Summing amplifier with unity gain The output is proportional to the negative algebraic sum of it inputs (two or more inputs) Two-input inverting summing amplifier = I R = ( I + I ) R OUT T f 1 2 f IN1 = + R R IN2 1 2 R = ( + ), for R = R = R f IN1 IN2 1 2 f The resistors can be used to adjust the scalar multiplication of the input sum 17

Summing Amplifiers contd. Summing amplifier with unity gain contd. Summing amplifier with n inputs = ( + + L + ) OUT IN1 IN2 INn Example with n = 3 OUT = 12 18

Examples Summing Amplifiers contd. Summing amplifier with gain different than unity contd. The input resistors are equal (R) and R f is used to set the gain Rf OUT = ( IN1 IN2 + + L R + INn ) Averaging amplifier R f 1 = 1 OUT = ( IN1 + IN2 + L + IN n ) R n n Scaling adder (the input resistors are not equal) Rf Rf Rf OUT = IN1 + IN2 + L + R R R 1 2 n INn 19

Summing Amplifiers contd. Applications Digital-to-analog converter (DAC) This can be done using a scaled adder A more commonly-used DAC is the R/2R ladder (to be introduced later) R R R R f f f f OUT = 8 IN1 + R 4R IN2 + 2R IN3 + R IN4 20

Summing Amplifiers contd. Applications contd. Digital-to-analog converter (DAC) contd. Example 13-9 Find the output level for the input sequences in Figure (b) 10 D 10 D 10 D 10 D OUT = 0 + 1 + 2 + 3 200 100 50 25 Example: The input is given by 1011 (decimal 11) OUT 10 10 10 10 = 5 + 5 + 0 + 5 = 2.75 200 100 50 25 21

Summing Amplifiers contd. Applications contd. Digital-to-analog converter (DAC) contd. R/2R Ladder Do you remember the Thévenin Theorem for the circuit equivalence? 22

DAC R/2R Ladder Let s conduct the analysis Summing Amplifiers contd. Applications contd. 23

The ideal integrator Integrators and Differentiators The op-amp integrator The charge on a capacitor is given by Q = I c t Also, Q = C C This results in C = I C C t This is a line with slope I C /C But hold on! Is the voltage of the capacitor linear? NO. Because the current is decreased when the capacitor voltage increases. The voltage can be linear iff the current is fixed constant This what exactly happens in the op-amp integrator circuit 24

Integrators and Differentiators The op-amp integrator contd. The ideal integrator The current through the capacitor is constant and given by I C = Iin = R in i capacitor current capacitor voltage Δ Δt out = in RC i Output voltage 25

The ideal integrator Example 13-10: Integrators and Differentiators The op-amp integrator contd. Δ out = in = 25 2.5 = 25 m / μs Δt RC i (10k)(0.01μ F) Δout =+ in = 25 m / μs Δt RC i 26

Integrators and Differentiators The op-amp integrator contd. The practical integrator The gain of the ideal integrator at DC is the open-loop gain (capacitor is open) Therefore, at DC any imbalance due to the bias current leads to saturation at the output A solution is to add a resistor in parallel with the capacitor R f is much larger than R i The gain when the capacitor is open is defined by R f and R i Also, R c can be added to reduce the effect of the bias current 27

The ideal differentiator Integrators and Differentiators The op-amp differentiator At all time, C = in The current through the capacitor is defined by I C = t C C The output voltage is defined as = I R = I R out R f C f = t C R C f 28

The ideal differentiator Note that the currents are constant! Integrators and Differentiators The op-amp differentiator contd. out = IR Rf = IC R = t f C R C f 29

Integrators and Differentiators The op-amp differentiator contd. Example 13-11: determine the output voltage The time constant: The rate of change in voltage τ = R C = (0.001μF)(2.2k Ω ) = 2.2μs f C t = 10 = 2/ μ s 5μs The output voltage is then given by out Likewise, for negative slope out = C R C = 4.4 t f = C R C =+ 4.4 t f 30

Integrators and Differentiators The op-amp differentiator contd. The practical op-amp differentiator At high frequencies, the gain of the ideal op-amp diff. is too high This means that the op-amp circuit becomes noisy The solution is to add a resistor in series with C This resistor should be small enough to have negligible effect on input voltage 31

Keywords and terms Level detector Hysteresis device Keywords Output bounding Analog-to-digital convertor using op-amps Digital-to-analog convertor using op-amps Summers op-amps Average op-amp amplifier Integrator op-amp circuit Integrator op-amp circuit Differentiator op-amp circuit 32

Lecture Summary Introduced the level detection op-amp circuits Introduced the op-amp comparators and their applications Introduced the summing op-amp amplifiers and some applications Introduced the integrator and differentiator op-amp circuits 33