FEATURES n 9 Seectabe Suppy otages 12,, 3.3, 2., 1.8 1., 1.2, 1., +ADJ (.) n 3 Seectabe Toerances %, 1%, 1% () n Manua Reset Input (LTC2916) n 1. to. Suppy Operation n 6.2 Shunt Reguator for High otage Operation n Guaranteed Operation to 12 C n Guaranteed Threshod Accuracy: ±1.% n Low Quiescent Current: 3μA Typica n Power Suppy Gitch Immunity n Guaranteed for CC.8 n Low Profi e (1mm) 8-Lead TSOT-23 (ThinSOT TM ) and (3mm 2mm) DFN Packages APPLICATIONS n Handhed Devices n Ce Phone Base Stations n Automotive Contro Systems n Network Servers n Optica Networking Systems DESCRIPTION /LTC2916 otage Supervisor with 27 Seectabe Threshods The LTC 291/LTC2916 are ow votage singe-suppy monitors with seectabe threshods. The parts operate from 1. to. and consume a quiescent current of ony 3μA. Two three-state inputs seect one of nine internay programmed threshods without the need for externa resistors. For the, an additiona three-state input determines the toerance ( %, 1%, 1%). The toerance for the LTC2916 is fixed at %. Threshod accuracy is guaranteed at ±1.% over the entire operating temperature range. Gitch fitering ensures reiabe reset operation without fase triggering. The reset timeout may be set to 2ms or adjusted using an externa capacitor. A separate manua reset input on the LTC2916 aows a simpe push button interface. Operation to 12 C makes the and LTC2916 suitabe for automotive appications. L, LT, LTC and LTM are registered trademarks of Linear Technoogy Corporation. ThinSOT is a trademark of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. TYPICAL APPLICATION 1.8, % Toerance Suppy Monitor 1.8 Monitor Seection Tabe NOMINAL OLTAGE.1μF CC LTC2916 1k CC 12 CC CC CC Open 3.3 CC M RESET 2. Open CC MR t = 2ms 2916 TA1 1.8 Open Open 1. Open 1.2 CC 1 Open ADJ (.) 1
/LTC2916 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Termina otages CC (Note 3)....3 to.7,,, MR,....3 to 7. M....3 to 1....3 to ( CC +.3) Termina Currents CC (Note 3)...±mA Operating Temperature Range C/LTC2916C... C to 7 C I/LTC2916I... 4 C to 8 C H/LTC2916H... 4 C to 12 C Storage Temperature Range... 6 C to 1 C TS8 Lead Temperature (Sodering, 1 sec)... 3 C PIN CONFIGURATION TOP IEW M 1 2 /MR 3 4 TOP IEW 8 CC 7 6 /MR M 1 2 3 4 9 8 7 6 CC TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 FOR MR FOR LTC2916 T JMAX = 1 C, θ JA = 2 C/W DDB PACKAGE 8-LEAD (3mm 2mm) PLASTIC DFN FOR MR FOR LTC2916 T JMAX = 1 C, θ JA = 76 C/W EXPOSED PAD (PIN 9) PCB CONNECTION OPTIONAL ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PA MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE CTS8-1#PBF ITS8-1#PBF HTS8-1#PBF CDDB-1#PBF IDDB-1#PBF HDDB-1#PBF CTS8-1#TRPBF ITS8-1#TRPBF HTS8-1#TRPBF CDDB-1#TRPBF IDDB-1#TRPBF HDDB-1#TRPBF LTCQ LTCQ LTCQ LCR LCR LCR 8-Lead TSOT-23 8-Lead TSOT-23 8-Lead TSOT-23 8-Lead (3mm 2mm) Pastic DFN 8-Lead (3mm 2mm) Pastic DFN 8-Lead (3mm 2mm) Pastic DFN C to 7 C 4 C to 8 C 4 C to 12 C C to 7 C 4 C to 8 C 4 C to 12 C LEAD FREE FINISH TAPE AND REEL PA MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2916CTS8-1#PBF LTC2916ITS8-1#PBF LTC2916HTS8-1#PBF LTC2916CDDB-1#PBF LTC2916IDDB-1#PBF LTC2916HDDB-1#PBF LTC2916CTS8-1#TRPBF LTC2916ITS8-1#TRPBF LTC2916HTS8-1#TRPBF LTC2916CDDB-1#TRPBF LTC2916IDDB-1#TRPBF LTC2916HDDB-1#TRPBF LTDCW LTDCW LTDCW LDCX LDCX LDCX 8-Lead TSOT-23 8-Lead TSOT-23 8-Lead TSOT-23 8-Lead (3mm 2mm) Pastic DFN 8-Lead (3mm 2mm) Pastic DFN 8-Lead (3mm 2mm) Pastic DFN C to 7 C 4 C to 8 C 4 C to 12 C C to 7 C 4 C to 8 C 4 C to 12 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based fi nish parts. For more information on ead free part marking, go to: http://www.inear.com/eadfree/ For more information on tape and ree specifi cations, go to: http://www.inear.com/tapeandree/ 2
ELECTRICAL CHARACTERISTICS /LTC2916 The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = 2 C. CC = 2., uness otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CC(MIN) Suppy otage for Guaranteed Low Driven Low.8 CC(ULO) Suppy Undervotage Lockout 1. CC(SHUNT) Shunt Reguation otage I CC =.ma.7 6.2 7. I CC CC Pin Current,,, MR = Open,, = () MR = CC (LTC2916) Monitor Input (M) MT12 12, % Reset Threshod 12, 1% Reset Threshod 12, 1% Reset Threshod MT, % Reset Threshod, 1% Reset Threshod, 1% Reset Threshod MT33 3.3, % Reset Threshod 3.3, 1% Reset Threshod 3.3, 1% Reset Threshod MT2 2., % Reset Threshod 2., 1% Reset Threshod 2., 1% Reset Threshod MT18 1.8, % Reset Threshod 1.8, 1% Reset Threshod 1.8, 1% Reset Threshod MT1 1., % Reset Threshod 1., 1% Reset Threshod 1., 1% Reset Threshod MT12 1.2, % Reset Threshod 1.2, 1% Reset Threshod 1.2, 1% Reset Threshod MT1 1, % Reset Threshod 1, 1% Reset Threshod 1, 1% Reset Threshod MTADJ ADJ (.), % Reset Threshod ADJ (.), 1% Reset Threshod ADJ (.), 1% Reset Threshod 11.4 1.44 9.84 4.6 4.3 4.1 3.36 2.871 2.76 2.3 2.17 2. 1.66 1.66 1.476 1.38 1.3 1.23 1.14 1.44.984.92.87.82 46. 43. 41. R M M Input Impedance (Note 4) Fixed Threshod Modes. 8 MΩ I M(ADJ) ADJ Input Current M =. ±1 na Three-State Inputs (, ), (, ) TPIN,LOW Low Leve Input otage. TPIN,HIGH High Leve Input otage 1.4 TPIN,Z Pin otage when Open I TPIN = μa.9 I TPIN,Z Aowabe Leakage in Open State ± μa I TPIN,H/L Pin Input Current TPIN =, CC ±2 μa 3 4 11.22 1.62 1.2 4.67 4.42 4.17 3.86 2.921 2.76 2.338 2.213 2.88 1.683 1.93 1.3 1.43 1.328 1.23 1.122 1.62 1.2.93.88.83 467. 442. 417. 8 11.4 1.8 1.2 4.7 4. 4.2 3.13 2.97 2.8 2.37 2.2 2.12 1.71 1.62 1.3 1.42 1.3 1.27 1.14 1.8 1.2.9.9.8 47. 4. 42. μa μa m m m 3
/LTC2916 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = 2 C. CC = 2., uness otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Reset Timer Contro () I (UP) Pu-Up Current =.2 2 3 4 μa I (DOWN) Pu-Down Current = 1.1 2 3 4 μa I (INT) Interna CC Detect Current = CC 1 8 μa (INT,LH) Interna Timer Threshod Rising, Referenced to CC 1 16 3 m Reset Output () t (INT) Interna Reset Timeout Period = CC 1 2 26 ms t (EXT) Adjustabe Reset Timeout Period C = 2.2nF 16 2 2 ms t U M Undervotage Detect to Asserted M Less Than Reset Threshod MTX by More Than % 1 8 1 μs OL Output otage Low CC = 3.3, I = 2.mA CC = 1, I = 1μA CC =.8, I = 1μA I OH() Output otage High Leakage = CC ±1 μa Manua Reset Input (LTC2916) IL Input Low otage.2 CC IH Input High otage.8 CC Pu Up Resistance 1 1 kω t PW Pusewidth 2 ns.1.1..4.3.2 Note 1: Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: A currents into pins are positive; a votages are referenced to uness otherwise noted. Note 3: CC maximum pin votage is imited by input current. Since the CC pin has an interna 6.2 shunt reguator, a ow impedance suppy which exceeds.7 may exceed the rated termina current. Operation from higher votage suppies requires a series dropping resistor. See Appications Information. Note 4: Input impedance is dependent on the confi guration of the SEL pins. TIMING DIAGRAM Monitor Input Timing M MTx t U t 1 2916 TD1 4
TYPICAL PERFORMANCE CHARACTERISTICS /LTC2916 T A = 2 C uness otherwise noted. NORMALIZED MTnn (%) 1. 1... 1. 1. Threshod otage vs Temperature MT2 2 2 7 1 12 TEMPERATURE ( C) MTADJ MT12 2916 G1 QUIESCENT SUPPLY CURRENT, I CC (μa) 4 3 3 2 2 Quiescent Suppy Current vs Temperature = = 2. = OPEN CC =. CC = 2. CC = 1. 2 2 7 1 12 TEMPERATURE ( C) 2916 G2 MAXIMUM ALLOWABLE GLITCH DURATION (μs) 3 2 2 1 1 Aowabe Gitch Duration vs Magnitude RESET OCCURS ABOE CURE.1 1 1 1 GLITCH PERCENTAGE PAST THRESHOLD (%) 2916 G3 RESET TIMEOUT PERIOD (ms), t (INT) 2 23 21 19 17 Interna Reset Timeout Period vs Temperature = CC 1 2 2 7 1 12 TEMPERATURE ( C) SHUNT REGULATION OLTAGE, CC(SHUNT) () 6.4 6.3 6.2 6.1 Shunt Reguation otage vs Temperature I CC = ma I CC = 1mA I CC = 1μA 2 2 7 1 12 TEMPERATURE ( C) SHUNT REGULATION OLTAGE, CC(SHUNT) () 7. 6.8 6.6 6.4 6.2 6..1 Shunt Reguation otage vs Suppy Current.1 1 1 SUPPLY CURRENT, I CC (ma) 1 2916 G4 2916 G 2916 G6 OLTAGE () 6 4 3 2 1 Output otage vs CC Pu-Down Current vs CC OL vs I 1k PULL-UP TO CC = = = M =. PULL-DOWN CURRENT, I (ma) 6 4 3 2 1 AT 1m AT m OLTAGE () 1..8.6.4.2 NO PULL-UP R CC = 2. T A = 2 C T A = 12 C T A = 4 C 1 2 3 4 SUPPLY OLTAGE, CC () 1 2 3 4 SUPPLY OLTAGE, CC () 2 4 6 8 1 I (ma) 2916 G7 2916 G8 2916 G9
+ /LTC2916 PIN FUNCTIONS (TSOT/DFN) (Pin 4/Pin 1): Device Ground. MR (Pin 3/Pin 2) (LTC2916 ony): Manua Reset Input (Active Low). A ow eve on the MR input causes the part to issue a reset, which is reeased one reset timeout after the input goes high. The pin has an interna 1k pu-up to CC, and thus may interface directy to a momentary pushbutton. Leave open if unused. (Pin /Pin 8): Open Drain Output. Asserts ow when M is beow the threshod seected by, and input pins. Hed ow for an adjustabe timeout after M input is above threshod. (Pin 6/Pin 7): Reset Timeout Contro Pin. Attach an externa Capacitor (C ) to to set a reset timeout of 9ms/nF. Foating generates a reset timeout of approximatey 4μs. Tie to CC to generate a reset timeout of approximatey 2ms., (Pins 2, 7/Pins 3, 6): Monitor otage Seect Three-State Inputs. and contro the nomina threshod votage that M is set to monitor. Connect to CC, or eave unconnected in open state. (See Tabe 1). (Pin 3/Pin 2) ( ony): Three-State Input for Suppy Toerance Seection ( %, 1% or 1%). Contros the toerance band at which the M suppy is monitored. Connect to CC,, or eave unconnected in open state. (See Tabe 2). CC (Pin 8/Pin ): Power Suppy Input. Bypass this pin to ground with a.1μf ceramic capacitor. A minimum of 1. on CC ensures that the part is out of under votage ockout and that the votage threshods are accurate. Operates as a direct suppy input for votages up to.. Operates as a shunt reguator for suppy votages greater than.7 and shoud have a resistor between this pin and the suppy to imit CC input current to no greater than ma. When used without a current-imiting resistor, pin votage must not exceed.7. M (Pin 1/Pin 4): otage Monitor Input to Comparator., and inputs seect the exact threshod that asserts the output. Exposed Pad (Pin 9, DFN Ony): Exposed Pad may be eft open or connected to device ground. BLOCK DIAGRAM LTC2916 MR 3 STATE DECODE CC 1k CC DETECT CC CC 6.2 M MONITOR DIIDER MATRIX INTERNAL 2ms TIMER +. REFERENCE DIIDER MATRIX ADJUSTABLE RESET TIMER RESET DRIER LOGIC 2916 BD 6
/LTC2916 APPLICATIONS INFORMATION Suppy Monitoring The /LTC2916 are ow votage singe suppy monitors with seectabe threshods. Two three-state inputs seect one of nine internay programmed threshods. For the, a third three-state input seects the toerance at which the suppy connected to the M pin is monitored ( %, 1%, 1%). The toerance for the LTC2916 is fixed at %. Threshod accuracy is guaranteed at ±1.% over the entire operating temperature range. The /LTC2916 asserts the output ow when M is beow the programmed threshod, and for a reset timeout (t ) after M goes above the threshod. The reset timeout can be configured to use an interna timer with no externa components, or an adjusted timer programmed by pacing an externa capacitor from to ground. Power-Up CC powers the drive circuits for the pin. Therefore, as soon as CC reaches.8 during power up, the output asserts ow. Unti CC reaches the undervotage ockout threshod (guaranteed ess than 1.), is hed ow regardess of the state of M. Once CC is above the under votage ockout threshod and M is above the programmed threshod, the reset timer is started. After the reset timeout (t ), the open drain pu-down reeases and the externa pu-up resistor pus high. Power-Down On power-down, once M drops beow its threshod or CC drops beow the undervotage ockout, asserts ogic ow. Monitor Threshod Contro The monitor threshod on the M pin is controed by the, and three-state pins. The and pins seect one of nine preset nomina votages (incuding one externay adjustabe threshod) as shown in Tabe 1. The and three-state input pins shoud be connected to, CC or eft unconnected during norma operation. Note that when eft unconnected, the maximum eakage aowabe from the pin to either or CC is ±μa. The toerance at which the monitored suppy is measured is set by the pin ( ony), as shown in Tabe 2. If desired (e.g. for margining purposes), the pin may be driven by a three-state buffer. That three-state buffer must have a OL and OH which meet the IL and IH of the pin specified in the Eectrica Characteristics, and maintain ess than μa of eakage in the open state. Threshod Accuracy The trip threshod for M is seected by configuring the three-state input pins. When using the adjustabe input, an externa resistive divider sets the trip threshod, aowing the user compete contro over the trip point. Seection of this trip votage is crucia to the reiabiity of the system. Tabe 1. otage Threshod Settings NOMINAL OLTAGE 12 CC CC CC Open 3.3 CC 2. Open CC 1.8 Open Open 1.* Open 1.2* CC 1* Open ADJ* (.) *Require a separate suppy for CC Tabe 2. System otage Toerance Settings ERANCE % CC 1% Open 1% 7
/LTC2916 APPLICATIONS INFORMATION Any power suppy has some toerance band within which it is expected to operate (e.g. ±1%). It is generay undesirabe that a supervisor issue a reset when the power suppy is inside this toerance band. Such a nuisance reset reduces reiabiity by preventing the system from functioning under norma conditions. To prevent nuisance resets, the supervisor threshod must be guaranteed to ie outside the power suppy toerance band. To ensure that the threshod ies outside the power suppy toerance range, the nomina threshod must ie outside that range by the monitor s accuracy specification. A 27 of the seectabe threshods have the same reative threshod accuracy of ±1.% of the programmed nomina input votage (over the fu operating temperature range). Consider the exampe of monitoring a suppy with a 1% toerance. The nomina threshod interna to the is 11.% beow the input at 4.42. With ±1.% accuracy, the trip threshod range is 4.42±7m over temperature (i.e. 1% to 13% beow.). The monitored system must thus operate reiaby down to 4.3 or 13% beow. over temperature. Gitch Immunity The above discussion is concerned ony with the DC vaue of the monitored suppy. Rea suppies aso have reativey high-frequency variation, from sources such as oad transients, noise, and pickup. These variations shoud not be considered by the monitor in determining whether a suppy votage is vaid or not. The variations may cause spurious outputs at, particuary if the suppy votage is near its trip threshod. Two techniques are used to combat spurious reset without sacrifi cing threshod accuracy. First, the timeout period heps prevent high-frequency variation whose frequency is above 1/ t from appearing at the output. When the votage at M goes beow the threshod, the pin asserts ow. When the suppy recovers past the threshod, the reset timer starts (assuming it is not disabed), and does not go high unti it finishes. If the suppy becomes invaid any time during the timeout period, the timer resets and begins again when the suppy next becomes vaid. Whie the reset timeout is usefu at preventing togging of the reset output in most cases, it is not effective at preventing nuisance resets due to short gitches (due to oad transients or other effects) on a vaid suppy. To reduce sensitivity to these short gitches, the comparator has additiona anti-gitch circuitry. Any transient at the input of the comparator needs to be of sufficient magnitude and duration t U before it can change the monitor state. The combination of the reset timeout and anti-gitch circuitry prevents spurious changes in output state without sacrificing threshod accuracy. Adjustabe Input When the monitor threshod is configured as ADJ, the interna comparator input is connected to the pin without a resistive divider, and the pin is high-impedance. Thus, any desired threshod may be chosen by attaching M to a tap point on an externa resistive divider between the monitored suppy and ground, as shown in Figure 1. The reference input of the comparator is controed by the toerance pin. The externa resistive divider shoud make the votage at M =. when the suppy is at nomina vaue. The actua threshod of M accounts for the suppy toerance of ±1.% guaranteed over the fu operating temperature range. The resuting toerances are 6.%, 11.%, 16.% which correspond to.468,.443,.418 repectivey. MON R2 R1 M +. Figure 1. Setting the Trip Point Using the Adjustabe Threshod + 2916 F1 8
APPLICATIONS INFORMATION Typicay, the user wi pick a vaue of R1 based on acceptabe current draw. Current used by the resistor divider wi be approximatey R1=. I Recommended range of R1 is 1k to 1M. Higher vaues of resistance exacerbate the degradation of threshod accuracy due to eakage currents. If the nomina vaue of the suppy being monitored is NOM, then R2 = R1(2 NOM 1) Resistor toerances must be taken into account when determining the overa accuracy. Seecting the Reset Timing Capacitor The reset timeout period can be set to one of two fixed interna timers or set with a capacitor in order to accommodate a variety of appications. Connecting a capacitor, C, between the pin and ground sets the reset timeout period, t. The foowing formua approximates the vaue of capacitor needed for a particuar timeout: C = t 11 [pf/ms] For exampe, using a standard capacitor vaue of 2.2nF woud give 2ms deay. Figure 2 shows the reset timeout period as a function of the vaue of the timer capacitor. RESET TIMEOUT PERIOD, t (ms) 1 1 1 1 1.1.1.1.1 1 1 1 1 PIN CAPACITANCE, C (nf) 2916 F2 Figure 2. Reset Timeout Period vs Capacitance /LTC2916 Leaving open with no externa capacitor generates a reset timeout of approximatey 4μs. Shorting to CC generates a reset timeout of approximatey 2ms. Output Characteristics The DC characteristics of the pu-down strength are shown in the Typica Performance Characteristics section. is an open-drain pin and thus requires an externa pu-up resistor to the ogic suppy. may be pued above CC, providing the votage imits of the pin are observed. The open-drain of the pin aows for wired-or connection of severa /LTC2916s. As noted in the discussion of power up and power down, the circuits that drive are powered by CC. During a faut condition, CC of at east 1 ensures that pus ow. Manua Reset (LTC2916 Ony) The LTC2916 incudes the MR pin for appications where a manua reset is desired. MR is internay pued up, aowing it to interface with a push button with no externa components required. Asserting MR ow when is high, initiates a reset, resuting in being asserted ow for the set reset timeout. Shunt Reguator The and LTC2916 contain an interna 6.2 shunt reguator on the CC pin to aow operation from a high votage suppy. To operate the part from a suppy higher than.7, the CC pin must have a series resistor, R CC, to the suppy. This resistor shoud be sized according to the foowing equation: 7. R ma 7 2μA SMAX ( ) SMIN ( ) CC where S(MIN) and S(MAX) are the operating minimum and maximum of the suppy. As an exampe, consider operation from an automobie battery which might dip as ow as 1 or spike to 6. We must then pick a resistance between 1.86k and 12k. 9
/LTC2916 TYPICAL APPLICATIONS 12 Suppy Monitor Powered from 12, Utiizing Interna Shunt Reguator with 3.3 Logic Out, 1% Toerance Suppy Monitor with 2ms Interna Reset Timeout 12 3.3 R CC 11k 1k 3.3.1μF 1k CC M.1μF CC 2916 TA2 3.3 CC M CC 2916 TA3 3.3 C 9, 1% Toerance Suppy Monitor with 3.3 Logic Out 1, 1% Toerance Suppy Monitor with 9ms Timeout 9 3.3.1μF 1k 3.3.1μF 1k R2 866k CC CC CC CC M 1 M R1 1.1k 2916 TA4 2916 TA C C.1μF 1.8, % Suppy Monitor with Manua Reset 1. Suppy Monitor with Toerance Contro for Margining, % Operation with 1% Margining 1.8.1μF 1k CC 3.3.1μF 1k CC LTC2916 M CC CC MR 2916 TA7 1. M 1% % I/O 2916 TA8 1k* MANUAL RESET PUSHBUTTON C C *OPTIONAL RESISTOR RECOMMENDED TO EXTEND ESD ERANCE 1
PACKAGE DESCRIPTION TS8 Package 8-Lead Pastic TSOT-23 (Reference LTC DWG # -8-1637) /LTC2916.2 MAX.6 REF 2.9 BSC (NOTE 4) 1.22 REF 3.8 MAX 2.62 REF 1.4 MIN 2.8 BSC 1. 1.7 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR.6 BSC.22.36 8 PLCS (NOTE 3).8.9.2 BSC DATUM A 1. MAX.1.1.3. REF.9.2 1.9 BSC (NOTE 3) TS8 TSOT-23 82 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIE OF PLATING 4. DIMENSIONS ARE EXCLUSIE OF MOLD FLASH AND METAL BURR. MOLD FLASH SHALL NOT EXCEED.24mm 6. JEDEC PACKAGE REFERENCE IS MO-193 DDB Package 8-Lead Pastic DFN (3mm 2mm) (Reference LTC DWG # -8-172 Rev B) 2. ±. 1.1 ±..61 ±. (2 SIDES).7 ±. PACKAGE OUTLINE.2 ±.. BSC 2.2 ±. (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 BAR TOP MARK (SEE NOTE 6).2 REF 3. ±.1 (2 SIDES) 2. ±.1 (2 SIDES).7 ±.. R =. TYP.6 ±. (2 SIDES) R =.11 TYP 4.2 ±. 2.1 ±. (2 SIDES) BOTTOM IEW EXPOSED PAD 8 1.4 ±.1. BSC PIN 1 R =.2 OR.2 4 CHAMFER (DDB8) DFN 9 RE B NOTE: 1. DRAWING CONFORMS TO ERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.1mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 11
/LTC2916 TYPICAL APPLICATION Dua Suppy Monitor (1.8 and 12) with Manua Reset and 2ms Reset Timeout 1.8 MANUAL RESET PUSHBUTTON.1μF M MR CC LTC2916 1.8 12 1.8 CC M 1.8 1k CC 2916 TA1 RELATED PAS PA NUMBER DESCRIPTION COMMENTS LTC69 Suppy Monitor, Watchdog Timer and Battery Backup 4.6 Threshod LTC694-3.3 3.3 Suppy Monitor, Watchdog Timer and Battery Backup 2.9 Threshod LTC1232 Suppy Monitor, Watchdog Timer and Push-Button Reset 4.37/4.62 Threshod LTC1326 Micro Power Precision Tripe Suppy Monitor 4.72, 2.363, 3.118, 1 Threshod (±.7%) LTC1726 Micro Power Tripe Suppy Monitor for 2./, 3.3 and ADJ Adjustabe RESET and Watchdog Time-Outs LTC1727 Micro Power Tripe Suppy Monitor with Open-Drain Reset Individua Monitor Outputs in MSOP LTC1728 Micro Power Tripe Suppy Monitor with Open-Drain Reset -Lead SOT-23 Package LTC198-1.8 Micro Power Tripe Suppy Monitor with Push-Pu Reset -Lead SOT-23 Package LTC29 Programmabe Quad Suppy Monitor Adjustabe RESET, 1-Lead MSOP and 3mm 3mm 1-Lead DFN LTC291 Programmabe Quad Suppy Monitor Adjustabe RESET and Watchdog Timer, 16-Lead SSOP Package LTC292 Programmabe Quad Suppy Monitor Adjustabe RESET and Toerance, 16-Lead SSOP Package, Margining LTC293 Precision Quad Suppy Monitor 6-Lead SOT-23 Package, Utra Low otage Reset LTC294/LTC29 3-State Programmabe Precision Dua Suppy Monitor Adjustabe RESET and Toerance, 8-Lead SOT-23 Package LTC296 Precision Dua Suppy Monitor 1 Seectabe and 1 Adjustabe Separate CC Pin, / Outputs LTC297 Precision Dua Suppy Monitor 1 Seectabe and 1 Adjustabe Separate CC Pin, Adjustabe Reset Timer LTC298 Precision Six Suppy Monitor (Four Fixed and 2 Adjustabe) 8-Lead SOT-23 and DDB Packages LTC299 Precision Tripe/Dua Input U, O Monitor 2 ADJ Inputs, Monitors Negative otages LTC291 Octa Positive/Negative otage Monitor 16-Lead SSOP and mm 3mm DFN Packages LTC2912 Singe U/O otage Monitor, Adjustabe U and O Trip 8-Lead TSOT and 3mm 2mm DFN Packages aues LTC2913 Dua U/O otage Monitor 1-Lead MOSP and 3mm 3mm DFN Packages LTC2914 Qua U/O Positive/Negative otage Monitor 16-Lead SSOP and mm 3mm DFN Packages 12 LT 18 RE A PRINTED IN USA Linear Technoogy Corporation 163 McCarthy Bvd., Mipitas, CA 93-7417 (48) 432-19 FAX: (48) 434-7 www.inear.com LINEAR TECHNOLOGY CORPORATION 27