description/ordering information

Similar documents
MAX232, MAX232I DUAL EIA-232 DRIVER/RECEIVER

description/ordering information

MAX232, MAX232I DUAL EIA-232 DRIVER/RECEIVER

MAX211 5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION

description/ordering information

µa78m00 SERIES POSITIVE-VOLTAGE REGULATORS

SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS

SN54HC00, SN74HC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES

CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541

SN74LVC2244ADWR OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS. description/ordering information

SN54HC541, SN74HC541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

description/ordering information

SN75150 DUAL LINE DRIVER

SN54HC126, SN74HC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

1OE 3B V GND ORDERING INFORMATION. TOP-SIDE MARKING QFN RGY Tape and reel SN74CBTLV3126RGYR CL126 PACKAGE

AM26LS31 QUADRUPLE DIFFERENTIAL LINE DRIVER

ORDERING INFORMATION PACKAGE

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description

CD74HCT4514, CD74HCT LINE TO 16-LINE DECODERS/DEMULTIPLEXERS WITH INPUT LATCHES

ORDERING INFORMATION TOP-SIDE

ua9636ac DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE

SN54LV4052A, SN74LV4052A DUAL 4-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS

SN55110A, SN75110A, SN75112 DUAL LINE DRIVERS

description/ordering information

SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SN75150 DUAL LINE DRIVER

EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.

description/ordering information


SN75158 DUAL DIFFERENTIAL LINE DRIVER

The ULN2003AI has a 2.7-kΩ series base resistor for each Darlington pair for operation directly with TTL or 5-V CMOS devices. ORDERING INFORMATION

LM317 3-TERMINAL ADJUSTABLE REGULATOR

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER

CD54ACT74, CD74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

SN54ALS1035, SN74ALS1035 HEX NONINVERTING BUFFERS WITH OPEN-COLLECTOR OUTPUTS

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

L293, L293D QUADRUPLE HALF-H DRIVERS

SN65LVDM31 HIGH-SPEED DIFFERENTIAL LINE DRIVER

SN54HCT14, SN74HCT14 HEX SCHMITT-TRIGGER INVERTERS

description 1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND V CC 2G/2G 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1Y1 2A4 1Y2 2A3 1Y3 1A2 2Y3 1A3 2Y2 1A4 2A2 2G/2G 2Y1

OUTPUT INPUT ADJUSTMENT INPUT INPUT ADJUSTMENT INPUT

description/ordering information

SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS

ULN2001A, ULN2002A, ULN2003A, ULN2004A, ULQ2003A, ULQ2004A HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAY


available options TA PACKAGED DEVICE FEATURES 40 C to 85 C ONET2501PARGT 2.5-Gbps limiting amplifier with LOS and RSSI

CDC337 CLOCK DRIVER WITH 3-STATE OUTPUTS

High Speed PWM Controller

TL750L, TL751L SERIES LOW-DROPOUT VOLTAGE REGULATORS

MAX To 5.5V Powered, Dual RS-232 Drivers/Receivers

The TPS61042 as a Standard Boost Converter

SN54ACT573, SN74ACT573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

ORDERING INFORMATION PACKAGE

CD54AC08, CD74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES

SN54AHC573, SN74AHC573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

POSITIVE-VOLTAGE REGULATORS

ORDERING INFORMATION PACKAGE

POSITIVE-VOLTAGE REGULATORS

SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

LM158, LM158A, LM258, LM258A LM358, LM358A, LM2904, LM2904Q DUAL OPERATIONAL AMPLIFIERS

SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 HEX INVERTERS


TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITS

Application Report. 1 Background. PMP - DC/DC Converters. Bill Johns...

SN75LV4737A 3.3-V/5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER

description/ordering information

SN54ALS541, SN74ALS540, SN74ALS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

POSITIVE-VOLTAGE REGULATORS

SN75176A DIFFERENTIAL BUS TRANSCEIVER


ORDERING INFORMATION PACKAGE

1.5 C Accurate Digital Temperature Sensor with SPI Interface

CD74HCT4543 BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER

MSP53C391, MSP53C392 SLAVE SPEECH SYNTHESIZERS

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State Description Features


SN74AUC1G07 SINGLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT

54ACT11020, 74ACT11020 DUAL 4-INPUT POSITIVE-NAND GATES


LM317M 3-TERMINAL ADJUSTABLE REGULATOR

SN54HC00, SN74HC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES

description/ordering information

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS

THS6092, THS ma, +12 V ADSL CPE LINE DRIVERS

description/ordering information

SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

SN54HC377, SN74HC377 OCTAL D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT

SN54HC175, SN74HC175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

LM317 3-TERMINAL ADJUSTABLE REGULATOR

SN54AHCT174, SN74AHCT174 HEX D-TYPE FLIP-FLOPS WITH CLEAR

description/ordering information

SN54HC245, SN74HC245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

ULN2001A, ULN2002A, ULN2003A, ULN2004A, ULQ2003A, ULQ2004A, HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAY

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS

MC3487 QUADRUPLE DIFFERENTIAL LINE DRIVER

Transcription:

Meets or Exceeds TIA/EIA-232-F and ITU Recommendation V.28 Operates From a Single 5-V Power Supply With 1.0-F Charge-Pump Capacitors Operates Up To 120 kbit/s Two Drivers and Two Receivers ±30-V Input Levels Low Supply Current...8 ma Typical ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) Upgrade With Improved ESD (15-kV HBM) and 0.1-F Charge-Pump Capacitors is Available With the MAX202 Applications TIA/EIA-232-F, Battery-Powered Systems, Terminals, Modems, and Computers MAX232... D, DW, N, OR NS PACKAGE MAX232I... D, DW, OR N PACKAGE (TOP VIEW) C1+ V S+ C1 C2+ C2 V S T2OUT R2IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 V CC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT description/ordering information The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASIC library. TA 0 C to 70 C 40 C to 85 C ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP (N) Tube of 25 MAX232N MAX232N Tube of 40 MAX232D SOIC (D) Reel of 2500 MAX232DR MAX232 SOIC (DW) Tube of 40 Reel of 2000 MAX232DW MAX232DWR MAX232 SOP (NS) Reel of 2000 MAX232NSR MAX232 PDIP (N) Tube of 25 MAX232IN MAX232IN SOIC (D) SOIC (DW) Tube of 40 Reel of 2500 Tube of 40 Reel of 2000 MAX232ID MAX232IDR MAX232IDW MAX232IDWR MAX232I MAX232I Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinASIC is a trademark of Texas Instruments. Copyright 2004, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1

Function Tables EACH DRIVER INPUT TIN L H OUTPUT TOUT H L H = high level, L = low level EACH RECEIVER INPUT RIN L H OUTPUT ROUT H L H = high level, L = low level logic diagram (positive logic) T1IN 11 14 T1OUT T2IN 10 7 T2OUT R1OUT 12 13 R1IN R2OUT 9 8 R2IN 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input supply voltage range, V CC (see Note 1).......................................... 0.3 V to 6 V Positive output supply voltage range, V S+....................................... V CC 0.3 V to 15 V Negative output supply voltage range, V S.......................................... 0.3 V to 15 V Input voltage range, V I : Driver................................................ 0.3 V to V CC + 0.3 V Receiver........................................................... ±30 V Output voltage range, V O : T1OUT, T2OUT................................ V S 0.3 V to V S+ + 0.3 V R1OUT, R2OUT.................................... 0.3 V to V CC + 0.3 V Short-circuit duration: T1OUT, T2OUT................................................... Unlimited Package thermal impedance, θ JA (see Notes 2 and 3): D package............................ 73 C/W DW package.......................... 57 C/W N package............................ 67 C/W NS package........................... 64 C/W Operating virtual junction temperature, T J................................................... 150 C Storage temperature range, T stg.................................................. 65 C to 150 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θja, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/θJA. Operating at the absolute maximum TJ of 150 C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage (T1IN,T2IN) 2 V VIL Low-level input voltage (T1IN, T2IN) 0.8 V R1IN, R2IN Receiver input voltage ±30 V TA Operating free-air temperature MAX232 0 70 MAX232I 40 85 C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) ICC Supply current PARAMETER TEST CONDITIONS MIN TYP MAX UNIT All typical values are at VCC = 5 V and TA = 25 C. NOTE 4: Test conditions are C1 C4 = 1 µf at VCC = 5 V ± 0.5 V. VCC = 5.5 V, TA = 25 C All outputs open, 8 10 ma POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature range (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage T1OUT, T2OUT RL = 3 kω to GND 5 7 V VOL Low-level output voltage T1OUT, T2OUT RL = 3 kω to GND 7 5 V ro Output resistance T1OUT, T2OUT VS+ = VS = 0, VO = ±2 V 300 Ω IOS Short-circuit output current T1OUT, T2OUT VCC = 5.5 V, VO = 0 ±10 ma IIS Short-circuit input current T1IN, T2IN VI = 0 200 µa All typical values are at VCC = 5 V, TA = 25 C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Not more than one output should be shorted at a time. NOTE 4: Test conditions are C1 C4 = 1 µf at VCC = 5 V ± 0.5 V. switching characteristics, V CC = 5 V, T A = 25 C (see Note 4) SR Driver slew rate PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RL = 3 kω to 7 kω, See Figure 2 30 V/µs SR(t) Driver transition region slew rate See Figure 3 3 V/µs Data rate One TOUT switching 120 kbit/s NOTE 4: Test conditions are C1 C4 = 1 µf at VCC = 5 V ± 0.5 V. RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature range (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage R1OUT, R2OUT IOH = 1 ma 3.5 V VOL Low-level output voltage R1OUT, R2OUT IOL = 3.2 ma 0.4 V VIT+ VIT Receiver positive-going input threshold voltage Receiver negative-going input threshold voltage R1IN, R2IN VCC = 5 V, TA = 25 C 1.7 2.4 V R1IN, R2IN VCC = 5 V, TA = 25 C 0.8 1.2 V Vhys Input hysteresis voltage R1IN, R2IN VCC = 5 V 0.2 0.5 1 V ri Receiver input resistance R1IN, R2IN VCC = 5, TA = 25 C 3 5 7 kω All typical values are at VCC = 5 V, TA = 25 C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. NOTE 4: Test conditions are C1 C4 = 1 µf at VCC = 5 V ± 0.5 V. switching characteristics, V CC = 5 V, T A = 25 C (see Note 4 and Figure 1) PARAMETER TYP UNIT tplh(r) Receiver propagation delay time, low- to high-level output 500 ns tphl(r) Receiver propagation delay time, high- to low-level output 500 ns NOTE 4: Test conditions are C1 C4 = 1 µf at VCC = 5 V ± 0.5 V. 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION VCC Pulse Generator (see Note A) R1IN or R2IN R1OUT or R2OUT RL = 1.3 kω See Note C CL = 50 pf (see Note B) TEST CIRCUIT 10 ns 10 ns Input 10% tphl 50% 500 ns 50% 10% tplh 3 V 0 V Output 1.5 V 1.5 V WAVEFORMS NOTES: A. B. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle 50%. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 1. Receiver Test Circuit and Waveforms for t PHL and t PLH Measurements VOH VOL POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5

PARAMETER MEASUREMENT INFORMATION Pulse Generator (see Note A) T1IN or T2IN T1OUT or T2OUT RL CL = 10 pf (see Note B) EIA-232 Output TEST CIRCUIT 10 ns 10 ns Input 10% tphl 50% 5 µs 50% 10% tplh 3 V 0 V Output 10% 10% tthl ttlh SR 0.8 (V V ) 0.8 (V V ) OH OL OL OH or t t TLH THL WAVEFORMS VOH VOL NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle 50%. B. CL includes probe and jig capacitance. Figure 2. Driver Test Circuit and Waveforms for t PHL and t PLH Measurements (5-µs Input) Pulse Generator (see Note A) 3 kω CL = 2.5 nf EIA-232 Output TEST CIRCUIT Input 10 ns 10% 1.5 V 1.5 V 10 ns 10% 20 µs tthl ttlh Output 3 V 3 V 3 V 3 V VOH VOL SR 6V t THL or t TLH WAVEFORMS NOTE A: The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle 50%. Figure 3. Test Circuit and Waveforms for t THL and t TLH Measurements (20-µs Input) 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

APPLICATION INFORMATION 5 V CBYPASS = 1 µf C1 C2 + 16 VCC 1 C1+ 1 µf 3 VS+ C1 4 C2+ VS 1 µf 5 C2 2 6 C4 + C3 1 µf 1 µf 8.5 V 8.5 V From CMOS or TTL 11 10 14 7 EIA-232 Output EIA-232 Output To CMOS or TTL 12 9 0 V 13 8 EIA-232 Input EIA-232 Input 15 GND C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. In addition to the 1-µF capacitors shown, the MAX202 can operate with 0.1-µF capacitors. Figure 4. Typical Operating Circuit POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7

MECHANICAL DATA MSOI002B JANUARY 1995 REVISED SEPTEMBER 2001 D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 0.010 (0,25) 8 5 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM 0.157 (4,00) 0.150 (3,81) Gage Plane 1 4 A 0 8 0.010 (0,25) 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) DIM PINS ** 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 0.337 (4,80) (8,55) 0.386 (9,80) 4040047/E 09/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

MECHANICAL DATA MSOI003E JANUARY 1995 REVISED SEPTEMBER 2001 DW (R-PDSO-G**) 16 PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0.050 (1,27) 16 0.020 (0,51) 0.014 (0,35) 9 0.010 (0,25) 0.419 (10,65) 0.400 (10,15) 0.299 (7,59) 0.291 (7,39) 0.010 (0,25) NOM Gage Plane 0.010 (0,25) 1 A 8 0 8 0.050 (1,27) 0.016 (0,40) 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) Seating Plane 0.004 (0,10) DIM PINS ** 16 18 20 24 28 A MAX 0.410 0.462 (10,41) (11,73) 0.510 (12,95) 0.610 (15,49) 0.710 (18,03) A MIN 0.400 (10,16) 0.453 (11,51) 0.500 (12,70) 0.600 (15,24) 0.700 (17,78) 4040000/E 08/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MS-013 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated