N-channel 30 V, Ω typ., 23 A STripFET H7 Power MOSFET plus monolithic Schottky in a PowerFLAT 3.3 x 3.3. Features.

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Transcription:

N-channel 30 V, 0.0027 Ω typ., 23 A STripFET H7 Power MOSFET plus monolithic Schottky in a PowerFLAT 3.3 x 3.3 Datasheet - production data Features Order code V DS R DS(on) max I D STL23NS3LLH7 30 V 0.0037 Ω 23 A Very low on-resistance Very low Q g High avalanche ruggedness Embedded Schottky diode G(4) Figure 1: Internal schematic diagram D(5, 6, 7, 8) Applications Switching applications Description This N-channel Power MOSFET utilizes the STripFET H7 technology with a trench gate structure combined with extremely low onresistance. The device also offers ultra-low capacitances for higher switching frequency operations. S(1, 2, 3) Table 1: Device summary Order code Marking Package Packing STL23NS3LLH7 23NS3 PowerFLAT TM 3.3 x 3.3 Tape and reel May 2015 DocID025074 Rev 3 1/14 This is information on a product in full production. www.st.com

Contents STL23NS3LLH7 Contents 1 Electrical ratings... 3 2 Electrical characteristics... 4 2.1 Electrical characteristics (curves)... 6 3 Test circuits... 8 4 Package information... 9 4.1 PowerFlat 3.3 x 3.3 package information... 10 5 Revision history... 13 2/14 DocID025074 Rev 3

Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage 30 V V GS Gate-source voltage ± 20 V I D (1) I D (1) I DM (1)(2) I D (3) I D (3) I DM (2)(3) P TOT (1) P TOT (3) T stg T j Drain current (continuous) at T pcb = 25 C 23 A Drain current (continuous) at T pcb = 100 C 14.3 A Drain current (pulsed) 92 A Drain current (continuous) at Tc = 25 C 92 A Drain current (continuous) at Tc = 100 C 57.5 A Drain current (pulsed) 368 A Total dissipation at T C = 25 C 50 W Total dissipation at T pcb = 25 C 2.9 W Storage temperature Operating junction temperature Notes: (1) This value is rated according to Rthj-c. (2) Pulse width limited by safe operating area. (3) This value is rated according to Rthj-pcb. -55 to 150 C Table 3: Thermal data Symbol Parameter Value Unit R thj-pcb (1) Thermal resistance junction-pcb max 42.8 C/W R thj-case Thermal resistance junction-case max 2.5 C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec. DocID025074 Rev 3 3/14

Electrical characteristics STL23NS3LLH7 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS I GSS V GS(th) R DS(on) Drain-source breakdown voltage Zero gate voltage drain current Gate-body leakage current Gate threshold voltage Static drain-source on-resistance I D = 1 ma, V GS = 0 V 30 V V GS = 0 V V DS = 24 V 500 µa V GS = ± 20 V, V DS = 0 V ±100 na V DS = V GS, I D = 1 ma 1.2 2.3 V V GS = 10 V, I D = 11.5 A 0.0027 0.0037 Ω V GS = 4.5 V, I D = 11.5 A 0.004 0.005 Ω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 2100 - pf C oss Output capacitance V DS = 15 V, f = 1 MHz, - 850 - pf Reverse transfer V GS = 0 V C rss - 60 - pf capacitance Q g Total gate charge V DD = 10 V, I D = 23 A, - 13.7 - nc Q gs Gate-source charge V GS = 4.5 V - 7.5 - nc Q gd Gate-drain charge (see Figure 13: "Gate charge test circuit") - 3.3 - nc Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time - 10 - ns t r Rise time V DD = 15 V, I D = 11.5 A, - 33 - ns t d(off) Turn-off delay time R G = 3 Ω, V GS = 4.5 V - 22 - ns t f Fall time - 7.5 - ns 4/14 DocID025074 Rev 3

Electrical characteristics Table 7: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit V SD (1) Forward on voltage I SD = 2 A, V GS = 0-0.4 0.7 V t rr Reverse recovery time I SD = 2 A, - 31.2 ns Q rr Reverse recovery charge di/dt = 100 A/µs - 18.7 nc I RRM Reverse recovery current V GS = 0 V - 1.2 A Notes: (1) Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DocID025074 Rev 3 5/14

Electrical characteristics 2.1 Electrical characteristics (curves) ID (A) 100 Figure 2: Safe operating area Operation in this area is Limited by max R DS(on) GIPG200220151026MT 100µs STL23NS3LLH7 Figure 3: Thermal impedance GIPG200220151051MT δ 0.2 0.1 0.05 0.02 10 1ms 0.01 Tj=150 C Tc=25 C 10ms Single pulse 1 0.1 1 10 VDS(V) Figure 4: Output characteristics GIPG200220151112MT ID(A) VGS=5, 6, 7V 40 Figure 5: Transfer characteristics GIPG200220151115MT ID (A) 100 30 4V 20 3V 50 10 V DS = 2 V 0 0 0.4 0.8 1.2 1.6 VDS(V) 0 0 2 VGS(V) Figure 6: Gate charge vs gate-source voltage VGS (V) 5 4 3 2 1 VDD=15V ID=23 A GIPG200220151123MT 0 0 2 4 6 8 10 12 14 Qg(nC) Figure 7: Static drain-source on-resistance GIPG200220151129MT RDS(on) (mohm) 3.00 2.90 VGS=10V 2.80 2.70 2.60 2.50 2.40 2.30 0 5 10 15 20 25 ID(A) 6/14 DocID025074 Rev 3

Figure 8: Capacitance variations GIPG200220151138MT C (pf) Electrical characteristics Figure 9: Normalized on-resistance vs temperature GIPG200220151338MT RDS(on) (norm) 1.90 Ciss 1.70 1000 Coss 1.50 1.30 VGS=10V Id=11.5A 100 Crss 1.10 0.90 0.70 10 0.1 1 10 VDS(V) 0.50-75 -25 25 75 125 TJ( C) Figure 10: Normalized V (BR)DSS vs temperature GIPG200220151327MT V(BR)DSS (norm) 1.06 1.04 ID=1m A 1.02 1.00 Figure 11: Source-drain diode forward characteristics GIPG200220151216MT VSD(V) 0.85 TJ=-50 C 0.75 TJ=25 C 0.65 0.98 0.96 0.55 0.45 TJ=150 C 0.94-75 -25 25 75 125 TJ( C) 0.35 0 10 20 ISD(A) DocID025074 Rev 3 7/14

Test circuits STL23NS3LLH7 3 Test circuits Figure 12: Switching times test circuit for resistive load Figure 13: Gate charge test circuit Figure 14: Test circuit for inductive load switching and diode recovery times Figure 15: Unclamped inductive load test circuit Figure 16: Unclamped inductive waveform Figure 17: Switching time waveform 8/14 DocID025074 Rev 3

Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DocID025074 Rev 3 9/14

Package information 4.1 PowerFlat 3.3 x 3.3 package information Figure 18: PowerFLAT 3.3 x 3.3 package outline STL23NS3LLH7 10/14 DocID025074 Rev 3

Package information Table 8: PowerFLAT 3.3 x 3.3 mechanical data mm Dim. Min. Typ. Max. A 0.70 0.80 0.90 b 0.25 0.30 0.39 c 0.14 0.15 0.20 D 3.10 3.30 3.50 D1 3.05 3.15 3.25 D2 2.15 2.25 2.35 e 0.55 0.65 0.75 E 3.10 3.30 3.50 E1 2.90 3.00 3.10 E2 1.60 1.70 1.80 H 0.25 0.40 0.55 K 0.65 0.75 0.85 L 0.30 0.45 0.60 L1 0.05 0.15 0.25 L2 0.15 θ 8 10 12 DocID025074 Rev 3 11/14

Package information STL23NS3LLH7 Figure 19: PowerFLAT 3.3 x 3.3 recommended footprint (dimension in millimeters) 12/14 DocID025074 Rev 3

Revision history 5 Revision history Table 9: Document revision history Date Revision Changes 31-Jul-2013 1 First release. 27-Mar-2015 2 07-May-2015 3 Updated title and features in cover page. Updated Table 2: "Absolute maximum ratings", Table 4: "On /off states" and Table 7: "Source drain diode". Added Section 2.1: "Electrical characteristics (curves)". Minor text changes. Document status promoted from preliminary data to production data. Minor text changes. DocID025074 Rev 3 13/14

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