R 7 2N7624U3 IRHLNJ V, P-CHANNEL RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-0.5) PD-97302D TECHNOLOGY.

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Transcription:

PD-9732D 2N7624U3 IRHLNJ79734 RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-.5) 6V, P-CHANNEL R 7 TECHNOLOGY Product Summary Part Number Radiation Level RDS(on) I D IRHLNJ79734 krads(si).72-22a* IRHLNJ79334 3 krads(si).72-22a* Description IR HiRel R7 Logic Level Power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments. The threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation. This is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. SMD-.5 Features 5V CMOS and TTL Compatible Fast Switching Single Event Effect (SEE) Hardened Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Ceramic Package Surface Mount Light Weight ESD Rating: Class C per MIL-STD-75, Method 2 Absolute Maximum Ratings Parameter Units I D @ V GS = -4.5V, T C = 25 C Continuous Drain Current -22* I D @ V GS = -4.5V, T C = C Continuous Drain Current -4.9 A I DM Pulsed Drain Current -88 P D @T C = 25 C Maximum Power Dissipation 57 W Linear Derating Factor.45 W/ C V GS Gate-to-Source Voltage ± V E AS Single Pulse Avalanche Energy 79 mj I AR Avalanche Current -22 A E AR Repetitive Avalanche Energy 5.7 mj dv/dt Peak Diode Recovery dv/dt -2.3 V/ns T J Operating Junction and -55 to + 5 T STG Storage Temperature Range C Pckg. Mounting Surface Temp. 3 (for 5s) Weight. (Typical) g * Current is limited by package For Footnotes refer to the page 2. 26--4

Electrical Characteristics @ Tj = 25 C (Unless Otherwise Specified) IRHLNJ79734, 2N7624U3 Parameter Min. Typ. Max. Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage -6 V V GS = V, I D = -25µA BV DSS / T J Breakdown Voltage Temp. Coefficient -.55 V/ C Reference to 25 C, I D = -.ma Static Drain-to-Source On-State R DS(on).72 V GS = -4.5V, I D = -4.9A Resistance V GS(th) Gate Threshold Voltage -. -2. V V DS = V GS, I D = -25µA V GS(th) / T J Gate Threshold Voltage Coefficient 3.5 mv/ C Gfs Forward Transconductance 6 S V DS = -V, I D = -4.9A I DSS Zero Gate Voltage Drain Current -. V DS = -48V, V GS = V µa -5 V DS = -48V,V GS = V,T J =25 C I GSS Gate-to-Source Leakage Forward - V GS = -V na Gate-to-Source Leakage Reverse V GS = V Q G Total Gate Charge 36 I D = -22A Q GS Gate-to-Source Charge nc V DS = -3V Q GD Gate-to-Drain ( Miller ) Charge 8 V GS = -4.5V t d(on) Turn-On Delay Time 32 V DD = -3V tr Rise Time 25 I D = -22A ns t d(off) Turn-Off Delay Time R G = 7.5 t f Fall Time 2 V GS = -5.V Ls +L D Total Inductance 4. nh Measured from the center of drain pad to center of source pad C iss Input Capacitance 226 V GS = V C oss Output Capacitance 583 pf V DS = -25V C rss Reverse Transfer Capacitance 9 ƒ =.MHz R G Gate Resistance 2 ƒ =.MHz,open drain Source-Drain Diode Ratings and Characteristics Parameter Min. Typ. Max. Units Test Conditions I S Continuous Source Current (Body Diode) -22* I SM Pulsed Source Current (Body Diode) -88 A V SD Diode Forward Voltage -5. V T J = 25 C,I S = -22A, V GS = V t rr Reverse Recovery Time ns T J = 25 C,I F = -22A, Q rr Reverse Recovery Charge 32 nc V DD -5V, di/dt = -A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) * Current is limited by package Thermal Resistance Parameter Min. Typ. Max. Units R JC Junction-to-Case 2.2 C/W Footnotes: Repetitive Rating; Pulse width limited by maximum junction temperature. V DD = -25V, starting T J = 25 C, L =.32mH, Peak I L = -22A, V GS = -V I SD -22A, di/dt -35A/µs, V DD -6V, T J 5 C Pulse width 3 µs; Duty Cycle 2% Total Dose Irradiation with V GS Bias. - volt V GS applied and V DS = during irradiation per MIL-STD-75, Method 9, condition A. Total Dose Irradiation with V DS Bias. -48 volt V DS applied and V GS = during irradiation per MlL-STD-75, Method 9, condition A. 2 26--4

Table. Electrical Characteristics @ Tj = 25 C, Post Total Dose Irradiation Parameter IRHLNJ79734, 2N7624U3 Radiation Characteristics IR HiRel Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR Hirel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Up to 3 krads (Si) Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage -6 V V GS = V, I D = -25µA V GS(th) Gate Threshold Voltage -. -2. V V DS = V GS, I D = -25µA I GSS Gate-to-Source Leakage Forward - na V GS = -V I GSS Gate-to-Source Leakage Reverse na V GS = V I DSS Zero Gate Voltage Drain Current -. µa V DS = -48V, V GS = V R DS(on) R DS(on) Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (SMD-.5) Min. Max..76 V GS = -4.5V, I D = -4.9A.72 V GS = -4.5V, I D = -4.9A V SD Diode Forward Voltage -5. V V GS = V, I D = -22A Part numbers IRHLNJ79734 and IRHLNJ79334 IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area LET (MeV/(mg/cm 2 )) Energy (MeV) Range (µm) V DS (V) @VGS=V @VGS=2V @VGS= 4V @VGS= 5V @VGS= 6V @VGS= 7V 38 ± 5% 3 ± 7.5% 38 ± 7.5% -6-6 -6-6 -6-4 62 ± 5% 355 ± 7.5% 33 ± 7.5% -6-6 -6-6 85 ± 5% 38 ± 7.5% 29 ± 7.5% -6-6 -6 Bias VDS (V) -7-6 -5-4 -3-2 - 2 3 4 5 6 7 Bias VGS (V) LET=38 ± 5% LET=62 ± 5% LET=85 ± 5% For Footnotes, refer to the page 2. Fig a. Typical Single Event Effect, Safe Operating Area 3 26--4

-I D, Drain-to-Source Current (A) -I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) -I D, Drain-to-Source Current (A) IRHLNJ79734, 2N7624U3 VGS TOP -V -5.V -4.5V -4.V -3.5V -3.V -2.5V BOTTOM -2.3V -2.3V VGS TOP -V -5.V -4.5V -4.V -3.V -2.7V -2.5V BOTTOM -2.3V -2.3V 2 s PULSE WIDTH Tj = 25 C. -V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 2 s PULSE WIDTH Tj = 5 C. 2. -V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics I D = -22A T J = 5 C.5 T J = 25 C..5 V DS = -25V 6 s PULSE WIDTH V GS = -4.5V 2 2.5 3 3.5 4 4.5 5. -6-4 -2 2 4 6 8 2 4 6 -V GS, Gate-to-Source Voltage (V) T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature R DS(on), Drain-to -Source On Resistance (m ) 6 4 2 8 6 4 2 T J = 5 C T J = 25 C I D = -22A 2 4 6 8 2 R DS (on), Drain-to -Source On Resistance ( m ) 4 3 2 9 8 7 6 5 4 3 T J = 5 C T J = 25 C Vgs = -4.5V 2 3 4 5 6 7 8 -V GS, Gate -to -Source Voltage (V) -I D, Drain Current (A) Fig 5. Typical On-Resistance Vs Gate Voltage Fig 6. Typical On-Resistance Vs Drain Current 4 26--4

C, Capacitance (pf) -I SD, Reverse Drain Current (A) -I D, Drain Current (A) -V GS, Gate-to-Source Voltage (V) -V (BR)DSS, Drain-to-Source Breakdown Voltage (V) -V GS(th) Gate threshold Voltage (V) 75 7 I D = -.ma 2.5 2. IRHLNJ79734, 2N7624U3 65 6.5..5 I D = -5µA I D = -25µA I D = -.ma I D = -5mA 55-6 -4-2 2 4 6 8 2 4 6 T J, Temperature ( C ) Fig 7. Typical Drain-to-Source Breakdown Voltage Vs Temperature 36 32 28 V GS = V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd. -6-4 -2 2 4 6 8 2 4 6 T J, Temperature ( C ) Fig 8. Typical Threshold Voltage Vs Temperature 2 I D = -22A V DS = -48V VDS = -3V VDS = -2V 24 2 6 2 C iss C oss 8 6 4 8 4 C rss -V DS, Drain-to-Source Voltage (V) Fig 9. Typical Capacitance Vs. Drain-to-Source Voltage 2 25 FOR TEST CIRCUIT SEE FIGURE 7 2 3 4 5 6 7 8 Q G, Total Gate Charge (nc) Fig. Typical Gate Charge Vs. Gate-to-Source Voltage LIMITED BY PACKAGE T J = 5 C 2 5 T J = 25 C 5. V GS = V 2 3 4 5 6 -V SD, Source-to-Drain Voltage (V) 25 5 75 25 5 T C, Case Temperature ( C) Fig. Typical Source-to-Drain Diode Forward Voltage Fig 2. Maximum Drain Current Vs. Case Temperature 5 26--4

-I D, Drain-to-Source Current (A) E AS, Single Pulse Avalanche Energy (mj) IRHLNJ79734, 2N7624U3 OPERATION IN THIS AREA LIMITED BY R DS (on) 4 2 I D TOP -9.8A -3.9A BOTTOM -22A. Tc = 25 C Tj = 5 C Single Pulse s ms ms DC -V DS, Drain-to-Source Voltage (V) 8 6 4 2 25 5 75 25 5 Starting T J, Junction Temperature ( C) Fig 3. Maximum Safe Operating Area Fig 4. Maximum Avalanche Energy Vs. Drain Current D =.5 Thermal Response ( Z thjc ).2...5 SINGLE PULSE.2 ( THERMAL RESPONSE ). Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc. E-5.... t, Rectangular Pulse Duration (sec) Fig 5. Maximum Effective Transient Thermal Impedance, Junction-to-Case 6 26--4

IRHLNJ79734, 2N7624U3 Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms Fig 7a. Basic Gate Charge Waveform Fig 7b. Gate Charge Test Circuit Fig 8a. Switching Time Test Circuit Fig 8b. Switching Time Waveforms 7 26--4

IRHLNJ79734, 2N7624U3 Case Outline and Dimensions SMD-.5 IR HiRel Headquarters: N. Sepulveda Blvd., El Segundo, California 9245, USA Tel: (3) 252-75 IR HiRel Leominster: 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 IR HiRel San Jose: 252 Junction Avenue, San Jose, California 9534, USA Tel: (48) 434-5 Data and specifications subject to change without notice. 8 26--4

IRHLNJ79734, 2N7624U3 IMPORTANT NOTICE The information given in this document shall be in no event regarded as guarantee of conditions or characteristic. The data contained herein is a characterization of the component based on internal standards and is intended to demonstrate and provide guidance for typical part performance. It will require further evaluation, qualification and analysis to determine suitability in the application environment to confirm compliance to your system requirements. With respect to any example hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind including without limitation warranties on non- infringement of intellectual property rights and any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s product and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of any customer s technical departments to evaluate the suitability of the product for the intended applications and the completeness of the product information given in this document with respect to applications. For further information on the product, technology, delivery terms and conditions and prices, please contact your local sales representative or go to (www.infineon.com/hirel). WARNING Due to technical requirements products may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies office. 9 26--4