Description Demonstration Circuit 9A features the LTC 69, a Low Phase Noise, Triple Output Clock Distribution Divider/ Driver. There are four options of the DC9A, one for each version of the LTC69. Table summarizes the available DC9A options. The DC9A LVPECL outputs are AC-coupled Ω transmission lines making them suitable for driving Ω impedance instruments. The LVDS/CMOS outputs of the DC9A are terminated with a Ω differential resistor and are DC-coupled. All differential input and outputs have DEMO MANUAL DC9A LTC69 Low Phase Noise, Triple Output Clock Distribution Divider/Driver." spaced SMA connectors. The LTC69 s EZSync function is made available via a turret and an SMA connector. A DC9 USB serial controller board is used for SPI communication with the LTC69, controlled by the supplied LTC69_GUI software. Design files for this circuit board are available at http://www.linear.com/demo/dc9a L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and EZSync is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Ribbon cable connection to DC9.V DC Supply, banana jack & turret, banana jack & turret OUT Outputs, SMA LTC69 / / LVPECL, AC coupled LTC69 LVDS/CMOS, DC coupled IN Inputs, SMA AC coupled OUT Outputs, SMA LTC69 / LVPECL, AC coupled LTC69 / LVDS/CMOS, DC coupled OUT Outputs, SMA LTC69 LVPECL, AC coupled EZSync TM SYNC Input, SMA & turret Temperature monitoring diode, turret OUTxSEL Inputs, Headers For LVPECL OUTPUTS: H=IBIAS ON; L=IBIAS OFF LTC69 / / LVDS/CMOS, DC coupled For LVDS/CMOS OUTPUTS: H=LVDS; L=CMOS Figure. DC9A Connections dc9af
DEMO MANUAL DC9A Quick Start Procedure The DC9A is easy to set up to evaluate the performance of the LTC69. Follow the procedure below. The DC9 and LTC69_GUI application are required to control the DC9A through a personal computer (PC). DC9 Configuration Place the DC9 jumpers in the following positions (refer to Figure ): JP: EE Must be in the EN position. JP: ISO ON must be selected. JP: SW ON must be selected. JP6: VCCIO.V or V must be selected. This sets the SPI port to.v or V operation,.v operation is recommended. Connect the DC9 to one of your computer s USB ports with the included USB cable. LTC69_GUI Installation The LTC69_GUI software is used to communicate with the LTC69. It uses the DC9 to translate between USB and SPI-compatible serial communications formats. The following are the LTC69_GUI system requirements: Windows Operating System: Windows XP, Windows Server, Windows Vista, Windows 7 Microsoft.NET. SP or later Windows Installer. or later Linear Technology s DC9 hardware Figure. DC9 Jumper and Connector Locations dc9af
DEMO MANUAL DC9A Quick Start Procedure Download the LTC69_GUI setup file at: www.linear.com/ltc69_gui. Run the LTC69_GUI setup file and follow the instructions given on the screen. The setup file will verify and/or install Microsoft.NET and install the LTC69_GUI. DC9A Configuration. Connect the and.v-.v, turrets to a power supply and apply power (see Figure and the Typical DC9A Requirements and Characteristics table).. Connect the DC9 to the DC9A with the provided ribbon cable.. Run the LTC69_GUI application.. From the LTC69_GUI, click File -> Load Settings and point to the LTC69.69set file.. From the LTC69_GUI, select the Read All button. This will update the GUI to display the correct part number and associated output types. 6. Connect a low phase-noise (or jitter) single-ended or differential signal to IN+ (J8) and/or IN- (J9). Refer to the LTC69 data sheet for acceptable input frequencies and amplitudes. 7. From the LTC69_GUI, update Fin to the frequency of the input signal in step 6. This will update the LTC69_GUI with the correct output frequencies. 8. Refer to the Typical DC9A Requirements and Characteristics table for desired OUTxSEL level. Set JP, JP and JP accordingly. 9. Connect desired output (OUT, OUT, OUT) to a test instrument or other demo board to evaluate performance. [The LVDS/CMOS outputs are DC-coupled, please make sure the levels do not exceed the test equipment input levels].. To synchronize outputs provide a ms or greater high pulse to the SYNC SMA to take advantage of the EZSync function. Be sure to power down or terminate any unused RF output with Ω, or poor spurious performance may result. Figure. LTC69_GUI Screenshot dc9af
DEMO MANUAL DC9A Quick Start Procedure Troubleshooting If the board is not functioning as expected, follow the instructions below:. Verify that you are able to communicate with the DC9A. The bottom status line in LTC69_GUI should read LTC69 and Comm Enabled.. Verify that.v-.v turret has the correct voltage. (see the Typical DC9A Requirements and Characteristics table).. Ensure JP, JP, and JP are set to desired position.. If the output type is LVPECL and the output is AC-coupled, OUTxSEL must be high for proper signal swing. DC9A Reconfiguration The DC9A allows for a variety of input and output configurations. The following covers the hardware reconfiguration of the DC9A. LVPECL Output Options The DC9A LVPECL outputs are AC-coupled and require internal biasing (OUTxSEL=H) with the default termination network. The DC9A provides pull-down, series and a differential termination resistor options to accommodate the other LVPECL termination networks described in the data sheet. LVDS/CMOS Output Options The LVDS/CMOS outputs are DC-coupled and have an on board differential Ω resistor termination by default. The DC9A provides pull-down, series and a differential termination resistor options to accommodate the other LVDS/ CMOS termination networks described in the data sheet.. If the output type is LVDS, the outputs must be AC-coupled into single-ended, Ω input test equipment. Additionally, the unconnected output must be AC-coupled into a Ω load to ground to provide a balanced output load. If the LVCSx bit is low, the signal amplitude at the instrument will be approximately half of the data sheet value due to the existing Ω termination on the demo board. 6. If the output is CMOS, a Ω series resistor must be included to limit the output current when connecting to the Ω input on test equipment. The signal swing at the instrument is then approximately percent of the data sheet value. Contact the factory for further troubleshooting. Input Options The inputs have a Ω termination resistor to and are AC-coupled by default. The DC9A provides pull-down, pull-up and a differential termination resistor options to accommodate the other input termination networks described in the data sheet. Clock Follower Input Network When using the DC9A as a clock follower, EZSync requires the LTC69 inputs to be taken to a low state while the SYNC pin is high. To meet this requirement, the DC9A must be modified to support DC-coupling. Refer to the EZSync Function section and to the data sheet for more details on using the LTC69 as a clock follower. EZSync Function Apply a ms or greater high pulse to the SYNC SMA connector to take advantage of the EZSync function. Refer to the LTC69 data sheet for SYNC timing and level requirements. Assembly Options Table. DC9A Assembly Options ASSEMBLY VERSION U PART NUMBER OUT+/ OUT+/ OUT+/ DC9A-A LTC69IUFF- LVPECL LVPECL LVPECL DC9A-B LTC69IUFF- LVPECL LVPECL LVDS/CMOS DC9A-C LTC69IUFF- LVPECL LVDS/CMOS LVDS/CMOS DC9A-D LTC69IUFF- LVDS/CMOS LVDS/CMOS LVDS/CMOS dc9af
DEMO MANUAL DC9A Typical DC9A Requirements and Characteristics PARAMETER INPUT OR OUTPUT PHYSICAL LOCATION DETAILS.V Power Supply Input J and J Banana Jacks, or.v-.v and Turrets Low-Noise and Spur-Free.V, ma Capable Power Supply; Typically DC9 Consumes ~ma; Powers LTC69, U, U, and U OUT+, OUT Two Outputs J and J SMA Connectors* Refer to Figure or Table for Output Type OUT+, OUT Two Outputs J and J SMA Connectors* If LVPECL: AC-Coupled OUT+, OUT Two Outputs J and J6 SMA Connectors* If LVDS/CMOS: DC-Coupled Refer to LTC69 Data Sheet for Output Levels for LVPECL, or LVDS/CMOS Option OUTSEL Input JP -Pin Headers If LVPECL: OUTSEL Input JP -Pin Headers OUTxSEL=H: IBIAS=ON, for Default LVPECL BOM OUTSEL Input JP -Pin Headers OUTxSEL=L: IBIAS=OFF, Must Install External Pull-Down Resistor, Refer to schematic If LVDS/CMOS: OUTxSEL=H: LVDS, Default LVDS/CMOS BOM OUTxSEL=L: CMOS, Remove Ω Differential Termination, Refer to Schematic TEMP Input/Output Turret Temperature Monitoring Diode; Force Current Measure TEMP Input Turret Voltage, Refer to Data Sheet SYNC Input J7 SMA Connector and Turret EZSync, V to.v Control Signal, Refer to the Data Sheet IN+, IN Input J8 and J9 SMA Connectors Input Signal Pins *Any unused RF output must be powered down or terminated with Ω, or poor spurious performance may result. PCB Layout Top Layer dc9af
DEMO MANUAL DC9A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 7 C-C, C, C, C-C, C8, C9 CAP., X7R,.µF, V, %, AVX, ZCKATA C CAP., X7R,.µF, 6V, %, 6 AVX, 6YCKATA 9 C, C7-C, C-C7 CAP., X7R,.µF, 6.V, %, MURATA, GRMR7JKAD C6 CAP., TANT, µf V, 8 AVX, TPSB6KR 6 E9, E, E TURRET,.6" MILL-MAX, 8---8---7-7 E, E TURRET,.9" MILL-MAX, ---8---7-8 JP, JP, JP JMP, PINS mm CTRS. SAMTEC, TMM---L-S 9 8 J-J6, J8, J9 CONN., SMA Ω EDGE-LAUNCH EMERSON, -7-8 J7 CONN, SMA STRAIGHT CONNEX, J, J JACK, BANANA KEYSTONE, 7- J CONN., HEADER POS mm VERT GOLD MOLEX, 878-6 R, R, R7, R9, R, R RES., CHIP, Ω, % NIC, NRCZTRF R, R, R8, R, R, R-R7, R9 RES., CHIP, R8, R RES., CHIP, 9.9Ω, /6W, %, NIC, NRCF9R9TRF 6 R, R, R7-R9 RES., CHIP, k, /6W, %, NIC, NRCFTRF 7 R, R, R RES., CHIP,.99k, /6W, %, NIC, NRCF99TRF 8 R6 RES., CHIP, Ω, 6 NIC, NRC6ZTRF 9 R7-R9, R-R RES., CHIP, 6 R, R, R6, R RES., CHIP, Ω, /6W, %, NIC, NRCJTRF U, U I.C., DUAL BUFFER, SC7-6 FAIRCHILD SEMI., NC7WZ7P6X U I.C., DUAL TRANSCEIVER, SOT6 NXP, 7LVCTGW U I.C., EEPROM KBIT KHZ 8TSSOP MICROCHIP, LC-I /ST SHUNTS SHOWN ON ASSY DWG SHUNT, mm CTRS. SAMTEC, SN-BK-G DC9A-A Required Circuit Components GENERAL BOM R, R6, R RES., CHIP, 6 Z, Z, Z, Z, Z, Z6 CAP., X7R,.µF 6V, %, AVX, YCKATA U I.C., QFN6UFF-X7 LINEAR TECH., LTC69IUFF-#PBF 6 dc9af
DEMO MANUAL DC9A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC9A-B Required Circuit Components GENERAL BOM R, R6 RES., CHIP, R RES., CHIP, Ω /6W, %, NIC, NRCJTRF Z-Z CAP., X7R,.µF 6V, %, AVX, YCKATA Z, Z6 RES., CHIP, Ω, NIC, NRCZTRF 6 U I.C., QFN6UFF-X7 LINEAR TECH., LTC69IUFF-#PBF DC9A-C Required Circuit Components GENERAL BOM R RES., CHIP, R6, R RES., CHIP, Ω /6W, %, NIC, NRCJTRF Z-Z CAP., X7R,.µF 6V, %, AVX, YCKATA Z, Z, Z, Z6 RES., CHIP, Ω, NIC, NRCZTRF 6 U I.C., QFN6UFF-X7 LINEAR TECH., LTC69IUFF-#PBF DC9A-D Required Circuit Components GENERAL BOM R, R6, R RES., CHIP, Ω /6W, %, NIC, NRCJTRF 6 Z, Z, Z, Z, Z, Z6 RES., CHIP, Ω, NIC, NRCZTRF U I.C., QFN6UFF-X7 LINEAR TECH., LTC69IUFF-#PBF dc9af 7
DEMO MANUAL DC9A Schematic Diagram REVISION HISTORY DESCRIPTION APPROVED DATE J PRODUCTION MICHEL A. --.V -.V E.V -.V + C6 C C C7 C8 C9 C C C C6 C7 C8 C9 C C C C C C C8 C9 uf uf.uf.uf.uf.uf.uf.uf.uf.uf.uf V 6 E 8 D D ECO REV J R 6 R J CS Z * OUTSEL OUT+ SDO E9 R R SYNC 6 R J7 * R J SYNC Z * OUT- SMA R U SCLK 9 SCLK QFN6UFF-X7 * OUT R7 J C C SDI SDI OUT+ Z * OUT+ D OUT- SYNC OUT 9 R8 8 R6 J8 R7 C R A OUT K * A OUT+ 7 R9 J IN+ Z 6 * R8 IN OUT- OUT- 9.9 6 OUT R 7 R6 IN+ OUT 8 IN- OUT+ R J 9 J9 R9 C OUT- Z * OUT+ IN- IN OUT R R 9.9 R B * R J6 B A TEMP E Z6 * OUT- 6 7 TEMP OUTSEL OUTSEL D 8 SDO 7 CS 6 A OUTSEL R E NOTE: UNLESS OTHERWISE SPECIFIED. ALL RESISTORS ARE IN OHMS, ALL CAPACITORS ARE IN MICROFARADS, 6 McCarthy Blvd. APPROVALS Milpitas, CA 9 A A ASSY U R R6 Z-Z Z-Z Z-Z6 * LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A Phone: (8)-9 www.linear.com CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; R TECHNOLOGY Fax: (8)-7 HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. KIM T. LTC Confidential-For Customer Use Only VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL -A LTC69IUFF- OPEN OPEN OPEN APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APP ENG. MICHEL A. TITLE: SCHEMATIC CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT -B LTC69IUFF- LOW PHASE NOISE, TRIPLE OUTPUT CLOCK OPEN OPEN OHM OHM PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. DISTRIBUTION DIVIDER/ DRIVER -C OPEN OHM OHM OHM OHM SIZE IC NO. REV. LTC69IUFF-/-/-/- OHM OHM OHM OHM OHM OHM LTC69IUFF- -D LTC69IUFF- R9 6 R7 6 CUSTOMER NOTICE OUTSEL THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE H L OUTSEL OUTSEL OUTSEL OUTSEL R R8 JP JP 6 6 H L H L N/A DATE: OUTSEL OUTSEL JP OUTSEL DEMO CIRCUIT 9A //, : AM SHEET OF 8 dc9af
DEMO MANUAL DC9A Schematic Diagram DC9 SPI INTERFACE D D J HDX7-79-MOLEX DIG CS SCLK SDI SDO R K U NC7WZ7P6X 6 VCC C R R CS SCLK V CS 6 SCK/SCL MOSI/SDA 7 MISO U NC7WZ7P6X 6 R6 SDI EEVCC EESDA 9 EESCL C C EE AUX U LC-I /ST C B B R9 K R R8 K ARRAY EEPROM SCL SDA WP 8 VCC 8 6 7 A A A WP R.99K R.99K EE R.99K R6 6 C7 VCC U 7LVCTGW 6 VCC(A) VCC(B) DIR C C6 R7 K SDO NOTE: EEPROM FOR BOARD IDENTIFICATION CUSTOMER NOTICE APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; TECHNOLOGY Fax: (8)-7 HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. KIM T. LTC Confidential-For Customer Use Only VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APP ENG. MICHEL A. TITLE: SCHEMATIC A A CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT LOW PHASE NOISE, TRIPLE OUTPUT CLOCK PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. DISTRIBUTION DIVIDER/ DRIVER THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE SIZE N/A DATE: 6 McCarthy Blvd. Milpitas, CA 9 Phone: (8)-9 LTC69IUFF-/-/-/- DEMO CIRCUIT 9A www.linear.com IC NO. REV. //, : AM SHEET OF Note: The buffers shown on sheet of of the schematic are used to protect the LTC69 when connected to the DC9 before the LTC69 is powered up. There is no need for such circuitry if the SPI bus is not active before powering up the LTC69. The EEPROM is for identification and is not needed to program the LTC69. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dc9af 9
DEMO MANUAL DC9A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 6 McCarthy Blvd. Milpitas, CA 9 Copyright, Linear Technology Corporation LT PRINTED IN USA Linear Technology Corporation 6 McCarthy Blvd., Milpitas, CA 9-77 (8) -9 FAX: (8) -7 www.linear.com LINEAR TECHNOLOGY CORPORATION dc9af