TN0345 Technical article

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Transcription:

Technical article Dual high side switches in smart power technology Introduction This article presents a dual high side switchable to drive any type of load (resistive,inductive and capacitive) with one side connected to the ground. The device uses STMicroelectronics VIPower technology, a proprietary smart power technology that allows integration of the control part and the power stage on the same chip. The device, the VNI2140J, integrates on-chip two 45 V Power MOSFETs channels (80 mω typical R DS(on) at 25 C) together with logic, driver, protection, and diagnostic. The VNI2140J is housed in the tiny Jedec standard PSSO-12 lead power package. May 2012 Doc ID 023223 Rev 1 1/9 www.st.com

VNI2140J block diagram TN0345 1 VNI2140J block diagram The block diagram in Figure 1 shows that each channel is fully protected. Junction overtemperature protection - thermally independent for each channel, current limitation (>1 A, typically 1.6 A at 25 C), and an inductive clamp (typically 50 V) are built-in on silicon. Figure 1. VNI2140J block diagram Input 1 Input 2 Diag 1 Diag 2 LOGIC Case temp. detection Undervoltage detection Clamp power Current limiter Open load OFF & short to Vcc Same structure for all channels Junction temp. detection Vcc clamp Vcc GND Output 1 Output 2 AM12628V1 Thanks to current limitation and thermal protection, each channel is self-protected against load shortcircuit and overcurrent. Due to the clamping chain at ~ 50 V, a demagnetization circuitry is realized; the device is able to manage very large inductive loads, discharging the inductive energy quickly without the need for an external freewheeling diode. Undervoltage protection prevents abnormal operations with very low supply voltages, while loss of ground protection initiates a switch-off of the power stages as soon as the ground references are lost for any reason; thus preventing the destruction of the device. The junction shutdown temperature for each channel has a typical value of 175 C; it protects the channel against a generic overload. The case overtemperature protection has a double thermal protection integrated on-chip, to avoid high temperature on the PCB where the part is assembled. The input blocks of the device are TTL/CMOS compatible; they are designed in order to minimize input switching times, and to allow the direct connection of an optocoupler with a dark current of 10 µa maximum. The channels are switched ON with a minimum level input voltage > 2.20 V. Open drain status pins are able to drive directly a light emitting diode (LED); they give indications of both junction overtemperature shutdown and open load in OFF state or short to Vcc. 2/9 Doc ID 023223 Rev 1

Open load detection in OFF state 2 Open load detection in OFF state In order to detect the open load fault in OFF state, a pull-up resistor must be connected between the Vcc line and the output pin (see Figure 2). In normal conditions, the current flows through the network comprised of the pull-up resistor and the load. The voltage across the load is less than the minimum open load voltage; so the diagnostic pin is kept at a high level. When an open load event occurs, the voltage on the output pin rises to a value higher than the maximum open load voltage and the diagnostic pin goes low level, thus signaling the open load. Figure 2. Open load detection in OFF state network AM12629V1 Doc ID 023223 Rev 1 3/9

Application tests TN0345 3 Application tests Figure 3 shows a typical application circuit of the device VNI2140J; it represents the output stage of a programmable logic controller designed for industrial automation or process control. In order to protect the device in high-side configuration from the harsh industrial conditions of power supply lines, optocouplers diodes are typically used to separate the application control circuits from the power supply, the inputs and in the diagnostic pins. A Transil diode protects the high side switch (HSS) against both positive and negative surge pulses to make the device compliant with IEC 61000-4-5. Figure 3. Typical application schematic An electrolytic capacitor must be placed on the bus line (Vcc) in order to filter bus inductance effect making the supply voltage stable and avoiding under voltage shutdown. The size of the electrolytic capacitor is selected based on the slope of the output current, the impedance of the complex power supply cables, as well as the maximum allowed voltage drop across the device. A low ESR capacitor is suggested, as close as possible to the HSS, in order to filter the power supply line for electromagnetic compatibility concerns. In our example, a 47 µf capacitor has been selected. To comply with IEC 61000-4-6 (current injection test), a 10 nf capacitor is added to the output pins. The toughest loads to be driven in a factory automation/process control are the inductive ones; it is common to drive a 1.15 H nominal load. The associated energy to manage such inductive loads is appreciable, carrying out a sensible power dissipation and a very high junction temperature. 4/9 Doc ID 023223 Rev 1

Behavior with shorted load 4 Behavior with shorted load Overcurrent and short circuit of the load to ground are the harshest events we must face during the digital output operation. Under these demanding circumstances, output stages must survive the dissipation of all the associated energy. Additionally, the loads, connected to the output stages, must be protected from the peak of current that could reach unexpected values. In order to safely manage very high peaks of currents during shortcircuit of outputs to ground, a current limitation block is integrated on-chip. As a result, only a current spike for a short time is allowed: just the time needed to intervene the current limitation circuitry, thus trimming the maximum output current to an internally set value (typically 1.6 A). It is the same during a hard overload. Internally limited output current is not enough; however, in fact, if shortcircuit or over-load duration lasts throughout the time, the power dissipated into the device as well as into the load becomes important, thus causing overheating enough to destroy the device and/or the load involved. For that reason, thermal sensors have been built-in on-chip thus switching OFF the over-loaded channels as soon as junction temperature reaches an internally set value (>150 C). Doc ID 023223 Rev 1 5/9

Behavior with capacitive load TN0345 5 Behavior with capacitive load The VNI2140J can also drive a capacitive load without problems; it is able to drive capacitors with very high capacitance. In Figure 4, waveforms are reported driving a 4 mf/50 V capacitor. Due to the high capacitance, the output current during capacitor charge is in current limitation, so that we do not see the real charging current but the limitation current internally set in the VNI2140J. When the capacitor is almost completely charged, the current goes below the internally set current limiting. Figure 4. Waveforms with capacitive load 4mF/50V (yellow Vout, blu Vin, green Iout and red Vdiag) 6/9 Doc ID 023223 Rev 1

Conclusion 6 Conclusion A smart monolithic dual high side switch has been presented. The new intelligent power switch (IPS) provides improved accuracy to minimize energy losses and prevent system errors when faults occur. These advantages are achieved using ST s latest generation VIPower technology, which allows a lower over-load current limit to maintain stable power conditions while the system is recovering. By providing an integrated solution for two output channels, the VNI2140J also simplifies design, enhances reliability, and saves PCBoard space. This new two-channel IC is an important addition to ST s VIPower portfolio of industrial IPS, which already includes single-, quad-, and octal-channel devices. 7 References 1. VNI2140J Dual high side smart power solid state relay, datasheet, www.st.com. 2. G. Di Stefano, M. Marchese, A single switch quad high side switches with minimized power dissipation, PCIM Nurnberg November 2008 Doc ID 023223 Rev 1 7/9

Revision history TN0345 8 Revision history Table 1. Document revision history Date Revision Changes 24-May-2012 1 Initial release. 8/9 Doc ID 023223 Rev 1

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