Problems on Differential and OP-AMP circuits

Similar documents
Operational Amplifiers. Boylestad Chapter 10

Chapter 10: Operational Amplifiers

Common mode rejection ratio

sketch a simplified small-signal equivalent circuit of a differential amplifier

Applied Electronics II

Unit 5 Waveguides P a g e 1

Operational Amplifiers

Chapter 9: Operational Amplifiers

Lecture-3 Amplitude Modulation: Single Side Band (SSB) Modulation

Physics 303 Fall Module 4: The Operational Amplifier

UNIT - 1 OPERATIONAL AMPLIFIER FUNDAMENTALS

OPERATIONAL AMPLIFIER PREPARED BY, PROF. CHIRAG H. RAVAL ASSISTANT PROFESSOR NIRMA UNIVRSITY

Linear IC s and applications

5.3 Sum and Difference Identities

Chapter 14 Operational Amplifiers

C H A P T E R 02. Operational Amplifiers

GATE SOLVED PAPER - IN

Quad ground sense operational amplifier

Objective: To study and verify the functionality of a) PN junction diode in forward bias. Sl.No. Name Quantity Name Quantity 1 Diode

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

UNIT I. Operational Amplifiers

OPTI-502 Optical Design and Instrumentation I John E. Greivenkamp Homework Set 5 Fall, 2018

Solid State Devices & Circuits. 18. Advanced Techniques

Combination Notch and Bandpass Filter

1) Consider the circuit shown in figure below. Compute the output waveform for an input of 5kHz

ClassABampDesign. Do not design for an edge. Class B push pull stage. Vdd = - Vee. For Vin < Vbe (Ri + Rin2) / Rin2

ECEN 325 Lab 5: Operational Amplifiers Part III

Section 6 Chapter 2: Operational Amplifiers

Introduction to Operational Amplifiers

I B. VCE =const. 25mV I C. V out = I C R C = β I B R C = βr C βr e

EEE225: Analogue and Digital Electronics

Quad Ground Sense Operational Amplifier. The CO324 is monolithic IC with four built-in operational amplifiers featuring internal phase compensation.

Electronic Circuits Laboratory EE462G Lab #8. BJT Common Emitter Amplifier

Roll No. B.Tech. SEM I (CS-11, 12; ME-11, 12, 13, & 14) MID SEMESTER EXAMINATION, ELECTRONICS ENGINEERING (EEC-101)

Homework Assignment 03

Type Ordering Code Package TAE 4453 G Q67000-A2152 P-DSO-14-1 (SMD) TAF 4453 G Q67000-A2213 P-DSO-14-1 (SMD)

Precision Rectifier Circuits

UNIT- IV ELECTRONICS

CHARACTERIZATION OF OP-AMP

HOME ASSIGNMENT. Figure.Q3

6. The Operational Amplifier

CHAPTER-6. OP-AMP A. 2 B. 3 C. 4 D. 1

Experiments #6. Differential Amplifier

Chapter 2. Operational Amplifiers

Gechstudentszone.wordpress.com

I1 19u 5V R11 1MEG IDC Q7 Q2N3904 Q2N3904. Figure 3.1 A scaled down 741 op amp used in this lab

Electronic Circuits II - Revision

Directional Derivative, Gradient and Level Set

Analog Electronics. Lecture Pearson Education. Upper Saddle River, NJ, All rights reserved.

Objectives The purpose of this lab is build and analyze Differential amplifiers based on NMOS transistors (or NPN transistors).

EXPERIMENT NO -9 TRANSITOR COMMON -BASE CONFIGURATION CHARACTERISTICS

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

ENGR 201 Homework, Fall 2018

IMAGE ILLUMINATION (4F 2 OR 4F 2 +1?)

Q1. Explain the Astable Operation of multivibrator using 555 Timer IC.

OP07C PRECISION OPERATIONAL AMPLIFIERS

EXPERIMENT 10: Power Amplifiers

EE LINEAR INTEGRATED CIRCUITS & APPLICATIONS

Operational Amplifier as A Black Box

BJT Amplifier. Superposition principle (linear amplifier)

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

Chapter 9: Operational Amplifiers

Assume availability of the following components to DESIGN and DRAW the circuits of the op. amp. applications listed below:

Current Mirrors. Basic BJT Current Mirror. Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror.

ELT 215 Operational Amplifiers (LECTURE) Chapter 5

Physical Limitations of Op Amps

About the Tutorial. Audience. Prerequisites. Copyright & Disclaimer. Linear Integrated Circuits Applications

Dimensions in inches (mm) .268 (6.81).255 (6.48) .390 (9.91).379 (9.63) .045 (1.14).030 (.76) 4 Typ. Figure 1. Typical application circuit.

11. Chapter: Amplitude stabilization of the harmonic oscillator

ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

When you have completed this exercise, you will be able to relate the gain and bandwidth of an op amp

Unit 6 Operational Amplifiers Chapter 5 (Sedra and Smith)

Bipolar Junction Transistors

PHYS225 Lecture 10. Electronic Circuits

Hello, and welcome to the TI Precision Labs video series discussing comparator applications. The comparator s job is to compare two analog input

Operational Amplifiers

Center for Academic Excellence. Area and Perimeter

v 0 = A (v + - v - ) (1)

Lecture #2 Operational Amplifiers

Operational Amplifiers

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 02139

PHYS 536 The Golden Rules of Op Amps. Characteristics of an Ideal Op Amp

Assignment 11. 1) Using the LM741 op-amp IC a circuit is designed as shown, then find the output waveform for an input of 5kHz

Emitter Coupled Differential Amplifier

or Op Amps for short

Laboratory Exercise 2. DC characteristics of Bipolar Junction Transistors (BJT)

ECE4902 C Lab 7

FEEDBACK AMPLIFIER. Learning Objectives. A feedback amplifier is one in which a fraction of the amplifier output is fed back to the input circuit

EE 368 Electronics Lab. Experiment 10 Operational Amplifier Applications (2)

Electronics Fundamentals BIPOLAR TRANSISTORS. Construction, circuit symbols and biasing examples for NPN and PNP junction transistors.

THE UNIVERSITY OF HONG KONG. Department of Electrical and Electrical Engineering

Abstract 1. INTRODUCTION

Homework Assignment 07

Linear electronic. Lecture No. 1

Chapter 7 Building Blocks of Integrated Circuit Amplifiers: Part D: Advanced Current Mirrors

Instrumentation Amplifiers Filters Integrators Differentiators Frequency-Gain Relation Non-Linear Op-Amp Applications DC Imperfections

Università degli Studi di Roma Tor Vergata Dipartimento di Ingegneria Elettronica. Analogue Electronics. Paolo Colantonio A.A.

Introduction to Op Amps

Push-Pull Amplifiers

Transcription:

Problems on Difrential and OPAMP circuits. Find te efctive and efctive for te amplifr sown below and find its id and A d, A. Given: is 00. c c L Q Vo Vo Q 0K B 0K B 00K ma 00 ma 00K esistance L connects V o and V o. In difrential mode, V o and V o ave equal magnitudes but opposite polarits. Tus midpoint of L is at 0 or ground. Tus a resistance L / exists between eac output and ground. Hence in difrential alf circuit, will be in parallel wit L / Similarly, / exists between emitters and te ground. Te alf circuits are: c c L/ Q Vo 5K Q Vo 0K B / 0K B 00K ma 00 00K ma Difrential Mode Half ircuit VT = = 500 Om ma id of transistor = ( )( 00K 00om) id = 0K ' id (Answer 7.8 K) ( 5K) A = d ( ) (00K 00 Om) answer 6.7 A = ( ) 00K Answer :0. OMMON MOD HALF IUIT. Design a Difrential amplifr to amplify an input difrential signal of 0. V to give a difrential output of 4V. To ensure linearity, it is required to limit te B junction signal voltage to 5mV, and difrential input resistance must

be 80K. If te typical transistor as a β ( ) of 00, give circuit configuration and values of components. Wat will be te transistor specification required? 4 Difrential gain is to be = 0 0. For te input difrential voltage of 0. V, alf circuit input is V d / = 0.V or 00 mv. As B junction voltage for signal is to be only 5 mv, It is necessary to add an emitter resistor to drop te remaining 95 mv. Te alf circuit is ten a wit. Now, magnitude of difrential gain = = 0 (twoended ( ) o/p) And Input difrential resistance = 80K. terefore alf circuit input resistance = 40K Tus ( ) = 40K 00 From tis = 0 giving = 4K 40K B junction drop is I b, and drop across is ( )I b 5 5 Tis gives = or = ( ) 95 0 95 ( 5 0) Ten = = 0.58 95 Using tis in [ ( ) ] = 40K, we get.58 = 40K Or = 90 Ten = 90 (0.58) = K Finally = V T / I, ence I = 00(.05)/000 =.5 ma, So, Te transistors sould ave = 00, = K, at I =.5 ma Te current source used for te emitter coupling will ten be for I = 5 ma 4K c 4K c Q Vo Vo Q = 00 =K 90 5 ma 90. Using a 5V power supply design a PNP current source to supply 0. ma. Assume tat te transistor as a ig β, V B is 0.7 at I = ma. Wat is te maximum load resistance to wic tis source may be connected? V B = 0.7 at I = ma. Ten at I = 0. ma, V B = 0.7V T ln(/0.)=0.66v Ten = (50.66)/0. =.7 K Now V out sould not exceed 4.V ten Lmax = 4./0. =.5 K

4. Find te ratio of I o to I ref for te following circuit: Iref Io Q I( /) I I / I I Q Q Q4 From te figure, V B = V B = V B4. Hence I 4 = say I I And current from of Q to junction of QB, QB and Q4B =. Tus I (/) Ten I B (/) And Io I = = ref I IB I ( ).5 Ten Io/Iref = 5. Let I B B B be te Input Bias currents at te input terminals of an OP AMP sown below. Sow tat if = te output voltage becomes V o = 0 wen bot inputs are grounded. Also sow tat if te two bias currents are not equal and teir difrence is I io ten V o io. Here V = I a) Ten urrent troug urrent in Tus Vo B = I I IB As IB B B, Vo B Now if = B B B IB I (IB ) = B ()., substituting in above eqn, Vo = 0

b)let te offset current be I io Iio Iio Ten IB B and IB B Substituting in (), we get V o io 6. Determine te expression for te input resistance of an inverting OPAMP if its open loop gain is finite V i I i V V o Ii' Vo = AV = V Ii' Hence V = A Ii' Now i V i A ' Ten / Ii = i = A 7. Find te voltage gain of te following circuit V a V b I i I i I i 5I i V i I i V o Ii = Ten 0 Va i = = Tus Va = 0 Va Ten current troug st vertical resistor = Te current into te middle resistor is te Ii Ten Vb = Va (Ii) = = i Ten second vertical resistor carrs a current Tus current in te tird resistor is I i Ii = 5Ii Hence voltage is V o = 5Ii Ii Ii = (8Ii) = 8 = 8

Vo ten Gain = 8 V i 8. A difrentiator uses ideal opamp wit =, =0.0uF. At wat frequency will input and output sine waves ave equal amplitudes? Let V i =A sin wt. d Ten Vo = = Awcos( wt) dt We want Aw = A Ten w = or w = / =.59 KHz. V V 0V g Vg Vo V V Vo 9. For te circuit sown above sow tat = At te input we ave a virtual sort. urrent in eac =. urrent in first = since op amp draws no current. Ten Voltage across first = V =. Voltage at top end of g = Similarly voltage at bottom end of g = Hence voltage across g = urrent in g = urrent in second I g = g V d urrent in te grounded on te bottom of te circuit is also as given above. Hence Vo = Vg = g g Hence Vo = g g g

Vo 0. In te circuit sown find te gain. If output of eac amplifr saturates at ± 4V, specify te largest sinewave output you can obtain (peak to peak). 5K Vo 5K Vo Vo Vo 5 Vo 5 Here = =.5 and = =.5. 0 0 Vo (Vo Vo) Hence = = Now wen V omax = 4 V and V omin = 4V ten V o = 8V wen V omin = 4 V and V omax = 4V ten V o = 8V Tus V o as a peak to peak variation 56V. An OPAMP is connected for gain 00 wit a M edback resistor. a)if input bias current is 00nA, wat is te output wit te input grounded? b)if input offset voltage is mv and input bias current is as in (a) above, wat is te output? c)bias current is compensated by a resistance in sers wit NI input. Wat is te required value for tis resistor? d)wit bias compensation as above, wat is te largest D voltage at te output for offset current equal to onetent of bias current? Here M/ = 00 ence = 0.K a)v o = 00 na x M = 00 mv b)v o =mvx00 00 mv = 00 mv c) ompensating resistor = in parallel wit or 0.K M = d) V o due to offset current alone io = 0 mv, and wit input offset voltage and offset current it is mvx00 0mV = 0mV. Wat is te igest frequency of a 0V PtoP triangle wave wic will be reproduced witout distortion by an OP AMP aving a slew rate of 0V/uS? For a sine wave f te same frequency wat is te maximum amplitude of te output signal possible witout distortion? Slope of triangle wave = 0V/(T/) Tis sould equal te slew rate at most. Tus 40/T = 0uS (given) Hence T = 4uS, and f = /T = 50 KHz For te sine wave of 50KHz, maximum slope is wa = π 50 0 A Tis is equal to slew rate at maximum A Tus π 50x0 A = 0x0 6, so tat A = 6.7 V

Sow tat te circuit given below is a full wave rectifr if = Vp D V' D Vo wen V i is ve, V is ve, D conducts, D is off, virtual sort wit 0V exists at bot op amps now V p = V = V I current entering te input of second opamp = V i / V / =. V i / / Terefore current in = ( V i / / ) Ten V o = ( V i / / ) If = ten V o = V i / and V o is ve. Wen V i is ve, V is ve, D conducts, D is OFF, and virtual ground exists at inputs of bot op amps Hence V = 0 Ten V i / is te current toug and Tus V o = (V i / ) = V i / But V i is negative, so V o is positive. Tus for bot negative and positive cycles, output is V i / sowing full wave rectification. 4. For te circuit sown, find te expression for V o in terms of V and V I i i i I V Vo V Vo ere I =V / and I = (V V ) / tus I I V o = I V. And I = (V o V )/ I I, and V V 0 Successive substitutions using te above equations may be made to give V o in terms of V, V, and. 5. Sow tat for te circuit sown in fig. n / Iin = Z

Z n Iin Vout input current I in =V in V o /Z. However, a virtual sort exists at input Te voltage at te junction of is V o / Hence one input is at V o / Hence V in =V o / (virtual sort) Tus I in = (V in V in )/Z = V in /Z ence n / Iin = Z