The ultimate lock-in performance: sub-ppm resolution

Similar documents
High resolution measurements The differential approach

Lock-In Amplifiers SR510 and SR530 Analog lock-in amplifiers

Experiment 7: Frequency Modulation and Phase Locked Loops Fall 2009

Introduction to Analog Interfacing. ECE/CS 5780/6780: Embedded System Design. Various Op Amps. Ideal Op Amps

( ) D. An information signal x( t) = 5cos( 1000πt) LSSB modulates a carrier with amplitude A c

APPLICATION NOTE #1. Phase NoiseTheory and Measurement 1 INTRODUCTION

Analog to Digital in a Few Simple. Steps. A Guide to Designing with SAR ADCs. Senior Applications Engineer Texas Instruments Inc

Variable-Gain High Speed Current Amplifier

Analog ó Digital Conversion Sampled Data Acquisition Systems Discrete Sampling and Nyquist Digital to Analog Conversion Analog to Digital Conversion

Analog and Telecommunication Electronics

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing

Analog and Telecommunication Electronics

ATLCE - B5 07/03/2016. Analog and Telecommunication Electronics 2016 DDC 1. Politecnico di Torino - ICT School. Lesson B5: multipliers and mixers

SIGNAL RECOVERY. Model 7265 DSP Lock-in Amplifier

Software Programmable Gain Amplifier AD526

Code No: R Set No. 1

A Physical Sine-to-Square Converter Noise Model

High Speed Communication Circuits and Systems Lecture 10 Mixers

Dual FET-Input, Low Distortion OPERATIONAL AMPLIFIER

ECEN 5014, Spring 2013 Special Topics: Active Microwave Circuits and MMICs Zoya Popovic, University of Colorado, Boulder

ENGR-4300 Spring 2008 Test 4. Name SOLUTION. Section 1(MR 8:00) 2(TF 2:00) 3(MR 6:00) (circle one) Question I (24 points) Question II (16 points)

SENSITIVITY IMPROVEMENT IN PHASE NOISE MEASUREMENT

SILICON DESIGNS, INC Model 1010 DIGITAL ACCELEROMETER

LS404 HIGH PERFORMANCE QUAD OPERATIONAL AMPLIFIER

Experiment 8 Frequency Response

SDG2122X SDG2082X SDG2042X

A technique for noise measurement optimization with spectrum analyzers

ADXL311. Ultracompact ±2g Dual-Axis Accelerometer FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS GENERAL DESCRIPTION

Telecommunication Electronics

1. Motivation. 2. Periodic non-gaussian noise

Application Report. Art Kay... High-Performance Linear Products

Philadelphia University Faculty of Engineering Communication and Electronics Engineering. Amplifier Circuits-III

Model LIA100. Lock-in Amplifier

AWG-GS bit 2.5GS/s Arbitrary Waveform Generator

Analog and Telecommunication Electronics

5520A. Multi-Product Calibrator. Extended Specifications 2005

Variable-Gain High Speed Current Amplifier

B.Tech II Year II Semester (R13) Supplementary Examinations May/June 2017 ANALOG COMMUNICATION SYSTEMS (Electronics and Communication Engineering)

OBSOLETE. Low Cost 2 g/ 10 g Dual Axis imems Accelerometers with Digital Output ADXL202/ADXL210 REV. B A IN 2 =

5500A. Multi-Product Calibrator. Extended Specifications 2005

1 MSPS, 12-Bit Impedance Converter, Network Analyzer AD5933

f o Fig ECE 6440 Frequency Synthesizers P.E. Allen Frequency Magnitude Spectral impurity Frequency Fig010-03

Analog and Telecommunication Electronics

Amplifiers. Department of Computer Science and Engineering

Measuring of small AC signals using lock-in amplifiers. Narrow band selective amplifiers + amplitude detector. Lock-in amplifiers

A Low 1/f Noise CMOS Low-Dropout Regulator with Current-Mode Feedback Buffer Amplifier

James Lunsford HW2 2/7/2017 ECEN 607

PXIe Contents. Required Software CALIBRATION PROCEDURE

EE247 Lecture 23. Advanced calibration techniques. Compensating inter-stage amplifier non-linearity Calibration via parallel & slow ADC

Introduction. sig. ref. sig

Direct Digital Synthesis Primer

NTE4016B & NTE4016BT Integrated Circuit CMOS, Quad Analog Switch/Quad Multiplexer

Noise and Interference, the Lock-In Amplifier, (and the IV-meetkast) ( )

Datasheet RS Pro Arbitrary Waveform Generator 40MHz RS Stock Number : ENGLISH

Maxim > Design Support > Technical Documents > Application Notes > Energy Measurement & Metering > APP 5292

FSK DEMODULATOR / TONE DECODER

5520A. Multi-Product Calibrator. Extended Specifications

Isolated High Level Voltage Output 7B22 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM

Working with ADCs, OAs and the MSP430

Telecommunication Electronics

Analog and Telecommunication Electronics

Low Distortion, Precision, Wide Bandwidth Op Amp AD9617

Calsytech, # 38 North Mada Street Nandambakkam, Chennai, Tamil Nadu. Discipline Electro-Technical Calibration Issue Date

Module 4 Unit 4 Feedback in Amplifiers

Low Cost Instrumentation Amplifier AD622

A simple time domain approach to noise analysis of switched capacitor circuits

ISOBE5600. Data sheet. Isolated Probe Systems. - ISOBE5600 Isolation system - ISOBE5600 Transient recorder. Features and Benefits

AVS / DVS and Margining Circuits for Vishay Power ICs SiC40X Series SMPS Regulators

EXPERIMENT 7 NEGATIVE FEEDBACK and APPLICATIONS

Low Power Carbon Nanotube Chemical Sensor System

Transient Current Measurement for Advance Materials & Devices

Low frequency noise measurements in direct detection radiometers

NI PXI-4461 Specifications

1 nv/ Hz Low Noise Instrumentation Amplifier AD8429

Summary Last Lecture

20 GHz Low Power QVCO and De-skew Techniques in 0.13µm Digital CMOS. Masum Hossain & Tony Chan Carusone University of Toronto

Techniques for Extending Real-Time Oscilloscope Bandwidth

Traceability for Oscilloscopes and Oscilloscope Calibrators

Pulse Code Modulation (PCM)

Figure 4.1 Vector representation of magnetic field.

Oversampled ADC and PGA Combine to Provide 127-dB Dynamic Range

Analog and Telecommunication Electronics

8558A 8 1/2 Digit Multimeter

Homework Assignment 01

Appendix B. Design Implementation Description For The Digital Frequency Demodulator

The Design and Construction of a DDS based Waveform Generator

National Instruments Flex II ADC Technology The Flexible Resolution Technology inside the NI PXI-5922 Digitizer

Instantaneous frequency Up to now, we have defined the frequency as the speed of rotation of a phasor (constant frequency phasor) φ( t) = A exp

Dynamically Reconfigurable Sensor Electronics Concept, Architecture, First Measurement Results, and Perspective

Dual, Ultralow Distortion, Ultralow Noise Op Amp AD8599

Tutorial on RF (Receiver Fundamentals) Frank Ludwig DESY

FFT Spectrum Analyzer

Advances in RF and Microwave Measurement Technology

FLASH rf gun. beam generated within the (1.3 GHz) RF gun by a laser. filling time: typical 55 μs. flat top time: up to 800 μs

Chapter 7. Introduction. Analog Signal and Discrete Time Series. Sampling, Digital Devices, and Data Acquisition

High Speed Voltage Feedback Op Amps

Single, 500MHz Voltage Feedback Amplifier

Isolated, Linearized Thermocouple Input 7B47 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM

Measuring the Speed of Light

Isolated, Thermocouple Input 7B37 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM

Transcription:

Electrical characterisation o nanoscale samples & biochemical interaces: methods and electronic instrumentation The ultimate lock-in perormance: sub-ppm resolution Giorgio Ferrari Dipartimento di elettronica, inormazione e bioingegneria Politecnico di Milano Milano, November 3 06 OUTLOOK o the LESSON Limits o standard LIA and o dierential approach Ratiometric technique ELIA: Enhanced Lock-In Ampliier

Resolution limits o LIAs out in LIA = MHz LIA Output Spectral analysis (see previous lesson) Zurich Instruments, HFLI Resolution = Noise / Signal Output spectral density [V/Hz] 00µ 0µ µ 00n = 0 V Eq. input noise o the input channel 0 00 k 0k 00k Frequency [Hz] Resolution [ppm] k 00 0 00m khz BW (ideal) 0 Hz BW (ideal) m 0m 00m Signal amplitude [V] 3 Resolution limits o LIAs out in LIA = MHz LIA Output Spectral analysis (see previous lesson) Zurich Instruments, HFLI Resolution = Noise / Signal Output spectral density [V/Hz] 00µ 0µ µ 00n = V = 300 mv = 00 mv = 30 mv = 0 V 0 00 k 0k 00k Frequency [Hz] Resolution [ppm] k 00 0 00m khz BW (ideal) khz BW 0 Hz BW (ideal) 0 Hz BW m 0m 00m Signal amplitude [V] 40 4

A common limit or high-speed LIA Model Maximum requency [MHz] Signal amplitude [V] Measurement requency [MHz] Relative resolution [ppm] Custom LIA [46] 0. 0., 0.3, 0.0, 0.05 SR830 0. 0., 0.3, 0.0, 0.05 MCL-540 0.5.4 0..3 SR865 0.3 0.5 45 Custom LIA [4] 0 0.03, 0., 0.3, 0., 9 HFLI 50 0.03, 0., 0.3, 0.,, 0 39 5 Drawbacks o the dierential approach Generation o the reerence path Well-matched dierential sensor Circuit with a reerence component Calibration Spectroscopy (requency, temperature, bias, ) is diicult Custom solutions are commonly required: no plug & measure 6 3

How to improve the resolution? The limiting actor is the gain luctuations given by: stimulus source, ampliiers, Dierential approach: Δ I S << S (Re S) Out noise,di << Out noise Ratiometric approach: independent o G+G(t)! Additional bonus: no matching constraint! i Re = (cable connecting the output to the input): 7 Analog implementation cosω A s cos(ω s t) C F M A s cos(ω s t) C x A s cos(ω s t) M + G Independent o A s! Integrator stage or ampliication and iltering 8 4

Analog implementation: problems sin(ω s t) In-phase & in-quadrature components: A A Analog multiplier noise C F A s cos(ω s t) cos(ω s t) en 9 / noise o the multiplier is important! Digital implementation A STIM, A = A STIM T V OUT LIA STIM G DAC [ + n DAC (t)] DAC G [ + n (t)] G [ + n (t)] F P G A Two digital LIAs to calculate A, A STIM 0 5

Digital implementation: single A STIM, A = A STIM T V OUT LIA STIM G DAC [ + n DAC (t)] DAC G [ + n (t)] SW F P G A Reconstruction o the s and LIAs to calculate A, A STIM Single Fast selection o the input (SW) Digital implementation: single A STIM, A = A STIM T V OUT LIA STIM G DAC [ + n DAC (t)] DA C G [ + n (t)] AD C SW F P G A Reconstruction o the s and LIAs to calculate A, A STIM gain time 6

Digital implementation: single A STIM, A = A STIM T V OUT LIA STIM s =/T sw G DAC [ + n DAC (t)] DA C G [ + n (t)] AD C SW F P G A Reconstruction o the s and LIAs to calculate A, A STIM gain digital reconstruction gain gain time STIM digital reconstruction 3 T sw time time Digital implementation: single A STIM, A = A STIM T V OUT LIA STIM =/T sw G DAC [ + n DAC (t)] DA C G [ + n (t)] AD C SW F P G A Reconstruction o the s and LIAs to calculate A, A STIM gain T sw<< T luctuations digital reconstruction gain gain time STIM digital reconstruction 4 T sw time time 7

From a single to two s Disadvantages o the single solution: sw has to be high in order to avoid aliasing eects! Ex.: max =0MHz, sampling =50MS/s = sw = 00MS/s ppm switching transients in less than 0ns! Can we reduce the switching requency? Gain luctuations are important in the s ms time scale Slow switching o TWO s or continuous acquisition 5 Enhanced-LIA (ELIA) V OUT ELIA DAC cos DDS Digital processing D U T STIM SW t t Reconstructed s Amplitude extraction OUT SW t Amplitude extraction Digital ratiometric approach khz switching requency Reconstruction and demodulation 6 8

ELIA: time domain analysis Gain o the acquired s.05 Gain o the reconstructed s.05 0.95 0.95 0.9 0.9 0.85 0.85 0.8 0 0 0 30 40 Time 0.95 Same mean gain! 0.8 0 0 0 30 40 Time.05 0.9 0.85 0.95 0.9 0.85 7 0.8 0 0 0 30 40 Enhanced Time Lock-in Ampliier - G. Ferrari 0.8 0 0 0 30 40 Time ELIA: detailed analysis reconstructed in the digital domain s s time T sw / Analytical expression: 0 0 s 8 9

ELIA: requency domain s cos j π 0 0 sw 3 sw -3 sw - sw -3 sw - sw 0 0 sw 3 sw j 3π j π j 3π j 3π j π j π j 3π - c* 0 c* - c* 0 c* 9 ELIA: requency domain s cos j π 0 0 sw 3 sw -3 sw - sw -3 sw - sw 0 0 sw 3 sw : j 3π j π j 3π 4 j 3π j π j π j 3π 0 0 - sw 0 + sw 0

ELIA: demodulated s : 4 + 0 + sw, - sw 0 +sw : 4 - sw 0 + sw ELIA: demodulated s : 4 + 0 ± sw, - sw 0 +sw and STIM have the same luctuations i: SW > c* +BW avoid harmonics: : ( + k) SW 0 (k=0,,, ) 4 - sw 0 + sw

ELIA: HW implementation OUT 50 Ω 0.85 pf kω - + THS300 3 kω 300 Ω SWITCH 3 kω - OPA690 + 3 kω kω kω 50 Ω 50 Ω 30 pf 30 pf 0 kω DAC THS567A kω SWITCH THS700 - Preamp PGA + SWITCH 374 Ω 5 pf 47 pf ŌPA690 + 3 Ω 540 nh 5 Ω 3 Ω 540 nh 58 pf - AD839 + 5 Ω ADG75 V REF ADS554 IN 3 THS700 - Preamp PGA + SWITCH 374 Ω 5 pf 47 pf ŌPA690 + 3 Ω 3 Ω 540 nh 540 nh 58 pf - AD839 + 5 Ω 5 Ω V REF ADS554 ELIA: irmware implementation Switches network DAC Adder m 8 STIM T SW cos m 7 m 6 m 5 DDS sin Delay 0 n 8 n 7 n 6 n 5 m 4 m 3 STIM Digital architecture Switches control n 4 n 3 m m n n -sin cos cos x jy jy x Amp. OUT Amp. STIM 4

ELIA prototype FPGA: Xilinx Spartan 6 (Opal Kelly module) &DAC: 80MS/s Maximum AC requency: 0MHz Output: 50V 0V Input range: ±00mV - ±0V 5 Operating modes: Two channels LIA ELIA Switching transients 500m 400m Amplitude [V] 300m 00m 00m 0-00m reconstructed reconstructed STIM -00m 0.0 00.0n 00.0n 300.0n 400.0n T s =.5 ns Time [s] 6 3

Experimental validation 7 Switching requency Output noise (ppm) single channel mode ELIA resolution vs sw (BW = Hz) Noise spectral density [ppm/hz] 0 0. ELIA single channel * c 0 00 k 0k Frequency [Hz] Resolution [ppm] 0 ELIA 0 00 k 0k Switching requency [Hz] sw must be > c * ( no gain luctuation during T Sw ) 8 4

Assessment o the resol. capabilities kω 48 MΩ T=0 s V OUT LIA 5 ppm modulation o the input voltage 0. V OUT Normalized resistance [0 ppm/div] Detection o tiny 5 ppm variations Zurich HFLI (39 ppm) ELIA single channel (9 ppm) ELIA (0.6 ppm) ilter BW = Hz 0 0 0 30 40 50 60 70 80 90 00 Time [s] Noise spectral density [ppmz] 00.0 0.0.0 0. 60 5 Zurich HFLI ELIA single channel ELIA 0m 00m 0 00 k Frequency [Hz] 9 High resolution spectroscopy Resolution [ppm] 30 kω 400 pf k 00 0 V OUT LIA module [db] -6 - Zurich Inst. HFLI ELIA single Channel ELIA 0 TF module TF phase 00 k 0k 00k M 0M Frequency [Hz] Antialiasing 00 k 0k 00k M 0M ilter? Frequency [Hz] 0-0 -0-30 -40 phase [Degree] Resolution is insensitive to phase and module o V in! 5

Comparison Model Maximum requency [MHz] Signal amplitude [V] Measurement requency [MHz] Relative resolution [ppm] Custom LIA [7] 0. 0., 0.3, 0.0, 0.05 SR830 (Stanord Research Systems) MCL-540 (SynkTek) SR865 (Stanord Research Systems) 0. 0., 0.3, 0.0, 0.05 0.5.4 0..3 0.3 0.5 45 Custom LIA [] 0 0.03, 0., 0.3, 0., 9 HFLI (Zurich Instruments) Enhanced-LIA (Section 5) 50 0.03, 0., 0.3, 0.,, 0 39 0 0., 0.3, 0.000-6 6-0 0.6- -3.5 3 Summary Gain luctuations reduced by a ratiometric approach Two s or continuous acquisition Inputs switched every ms Sub-ppm resolution up to 6MHz No external components Plug & measure No calibration Acknowledgements: G. Gervasoni Patent pending G. Gervasoni, M. Carminati, G. Ferrari, Lock-In Amplier Architectures or Sub-Ppm Resolution Measurements, in Advanced Interacing Techniques or Sensors, Springer, in press 3 6