SUMMARY/DIALOGUE 2 PRESHAPE PIXEL OVERVIEW 3 BRIEF OPERATING INSTRUCTIONS 3 PRESHAPE PIXEL SIMULATION: EXAMPLE OPERATION 4 PRESHAPE PIXEL SIMULATION:

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SUMMARY/DIALOGUE 2 PRESHAPE PIXEL OVERVIEW 3 BRIEF OPERATING INSTRUCTIONS 3 PRESHAPE PIXEL SIMULATION: EXAMPLE OPERATION 4 PRESHAPE PIXEL SIMULATION: SMALL SIGNALS AROUND THRESHOLD 5 PRESHAPE PIXEL SIMULATION: TYPICAL SIGNALS 400E- 4000E- 6 PRESHAPE PIXEL SIMULATION: LARGE SIGNALS 4000E- 20000E- 7 PRESHAPE PIXEL SIMULATION: OVERFLOW (PREAMP GAIN VS HISTORY) 8 PRESHAPE PIXEL SIMULATION: IMPROVING OVERFLOW? 9 PRESHAPE PIXEL SIMULATION: POWER CONSUMPTION 10 PRESHAPE PIXEL SIMULATION: NOISE ANALYSIS 11 PRESHAPE PIXEL SIMULATION: NOISE VS INPUT CAPACITANCE 13 PRESHAPE PIXEL SIMULATION: PERFORMANCE VS BIAS CURRENT 14 PRESHAPE PIXEL SIMULATION: MATCHING/MANUFACTURING RISKS 16 PRESHAPE PIXEL SIMULATION: TRANSIENT NOISE 22 PRESHAPE PIXEL SIMULATION: MISMATCH 23 PIXEL LAYOUT PLACEMENT 25

Summary/Dialogue The new pixel circuit is characterised with a similar set of simulations as before. The relaxed timing specification has allowed a simplification of the individual amplifiers used in the pixel these use less transistors, hence small improvements in power consumption and noise were seen from the outset. A particular snapshot of the design is presented which represents an optimised performance for signal-to-noise ratio. Some of the optimisation (trade-off) graphs are included in the manufacturing risks section to allow the reader to explore other circuit configurations (what-if s). This circuit achieves around 25 electrons noise in its present form, thus offering more favourable signal-to-noise performance than before. In the case of no deep P-well, the peak MIP charge of 400e- would yield a signal-tonoise ratio of ~16, whilst the typical edge charge of 250e- a ratio of 10. In the case of a deep P-well, the signal-to-noise ratio will certainly exceed the specification with device-simulation figures for the charge collected in this topology the circuit may be further optimised. In order to achieve the low noise value the signal timing has been compromised: The hit signal is likely to be active for between 150ns and 1us, during which time the pixel will be unable to detect another event. Edge-mode logic will need to be implemented in the logic to ensure that these longer hit pulses are stored as a single hit rather than several consecutive hits. The total charge capacity of the pixel is ~20,000 electrons (defined as equivalent to 50% loss of charge). There is little that can be done to address this limitation, since feedback introduces noise. Once final values are known for the minimum charge to be detected, the gain of the preamplifier can be reduced (larger Cfb), within SNR spec to maximise the charge capacity, although this is unlikely to yield significant improvements on the figures already seen. The central NWELL region remains consistent with device simulations provided the pmos comparator stage is located at the control logic. If deep P-implant is available, then this comparator could be moved into the pixel (reducing slightly the dead area occupied by the logic) with no impact on charge collection.

Preshape Pixel Overview Rst Rfb Cpre Cfb --ns Preamp Cin --ns Rin Shaper Vth+ Vth- Brief Operating Instructions The preamp must be reset prior to the bunch train. Subsequent hits are seen as steps on the preamplifier output; so there is a maximum charge that can be collected during a bunch train. Decreasing Cpre would improve the signal magnitude Shaping time (and therefore noise) is defined by the four shaper components Rin, Cin, Rfb and Cfb. The differential comparator removes baseline variations in the analog circuits and a differential threshold input. The differential comparator uses only NMOS devices, and must be paired with a pmos comparator stage to realise the logic hit signal. The location of this pmos comparator can be either in-pixel or at the column logic depending on the availabliilty of deep P implant / other design choices.

PreShape Pixel simulation: Example Operation Circuit stimulus/scenario Basic operation of the pixel circuits is demonstrated: The threshold is set to equivalent 200e- level. Input signals of 250e-, 500e-, 750e- and 1000e- are demonstrated. Results waveforms 35mV Preamp output Shaper output 300ns 150ns 650ns Logic hitb signal Above: Pixel waveforms after the various stages, from charge hit to logic hit decision (active low).

PreShape Pixel simulation: Small signals around threshold The threshold is set at 30mV, which is the signal magnitude seen for 200 electrons, which corresponds to numele=50 in the plots below. The input signal (per diode) is swept from 20 to 150 electrons. The signal magnitude is plotted to check linearity and variation between corners. Where the circuit registers a hit the length of time the hit signal is active is plotted. Above: Signal magnitude (left) and Hit-Flag duration (right) are plotted for different imput signals. Note the number of electrons on the horizontal scale represents the charge collected on each diode, and should be multiplied by 4 to determine the total input charge. This sweep increments in steps of size 14 (~50e- total input charge) so this is the resolution to which the threshold is verified. There seems to be consistency between the corners at the threshold, although there also seems to be some offset given it was set at the numele=50 level. TO DO: FINE SWEEP TO CHECK THRESHOLD ACCURACY & OFFSET (MISMATCH SECTION COMPARATOR)

PreShape Pixel simulation: Typical signals 400e- 4000e- The threshold is set at 30mV, which is the signal magnitude seen for 200 electrons. The input signal (per diode) is swept from 400 to 4000 electrons. The signal magnitude is plotted to check linearity and variation between corners. The length of time the hit signal is active is plotted. Above: Signal magnitude (left) and hit-flag duration (right) for typical signals in the range 100-1000 electrons per diode. The non-linearity in the signal magnitude for the maximum input size represents the saturation of the shaper. Note the number of electrons on the horizontal scale represents the charge collected on each diode, and should be multiplied by 4 to determine the total input charge. A conversion factor of ~150uV/electron applies in this linear range of the shaper: (eg numele=400, total input charge = 1600e- * 150uV = 240mV signal mag.)

PreShape Pixel simulation: Large signals 4000e- 20000e- The threshold is set at 30mV, which is the signal magnitude seen for 200 electrons. The input signal (per diode) is swept from 4000 to 20,000 electrons. The signal magnitude is plotted to check linearity and variation between corners. The length of time the hit signal is active is plotted. Above: Signal magnitude (left) and hit-flag duration (right) for large signals in the range 1000 to 5000 electrons per diode. Below: shaper output saturation for these large signals, giving rise to long hit flag pulses. Note the number of electrons on the horizontal scale represents the charge collected on each diode, and should be multiplied by 4 to determine the total input charge. A near-linear conversion factor of ~60uV/electron applies in the saturation range of the shaper, but the pulse distortion generates lengthy hit flag pulses.

PreShape Pixel simulation: Overflow (preamp gain vs history) The preamplifier is reset prior to the bunch train, and integrates charge until the next reset (be that after the full bunch train or periodic during bunch train). The integration of charge moves the operating point of the amplifier away from its optimum so gain is compromised. A 400e- MIP hit is simulated before and after a very large charge deposit. The signal magnitude of the secondary MIP hit is plotted after different size events to illustrate the performance of the pixel as it moves from operation to saturation region. 10,000e- 22,000e- Above: The signal magnitude (left) for 400e- plotted against the total charge already collected by each diode (multiply by 4 to read the total charge collected). For reference (right), the system gain after the large event is plotted in uv per electron. Notice that the preamplifier gain reduces as more charge is collected: The point at which the pixel is said to be saturated is a matter of debate: Sensitivity to minimum MIP hits (250e-) in the corners of pixels will be lost first (after ~10,000e-). Beyond this point the pixel will effectively shrink in area for MIP detection. The signal from 400e- (equivalent to a MIP collected at the centre of the pixel) is reduced to approx half that signal (equivalent to a MIP collected at the corner of the pixel) after ~22,000e-. Beyond this point a 400e- hit to the pixel will not trigger a hit regardless of strike location, although sensitivity to larger signals is still possible.

PreShape Pixel simulation: Improving Overflow? The overflow problem could be solved by adding constant/adaptive feedback current that acts to reset the diodes at the input to the preamplifier after a hit in some finite time. Unfortunately adding a resistor or biased transistor to implement this feedback introduces noise at the input of the analog signal chain and can also reduce the magnitude of the signal. The circuit is modified to include a transistor in the feedback of the preamplifier: This transistor is biased with a low DC voltage, which effectively modulates the leakage current through that transistor of order pa to na. 10,000e- 20,000e- Above: The test from the previous section is repeated (a 400e- hit is analysed occurring after a very large event of size numele1 * 4); Signal-to-noise ratio is now plotted rather than absolute signal magnitude. The pink trace corresponds to the original circumstances before the reset transistor was added. The vfb=0.5 case clearly shows the extension to the maximum input signal that can be achieved before saturation effects occur, but the noise contribution from the feedback device is significant.

PreShape Pixel simulation: Power consumption Preamp Shaper Comparator (in-pixel) Comparator (off-pixel) 1.8v 1.8v 1.8v 1.8v 1.5uA 1.0uA 1.0uA 0.75uA 2.7uW 1.8uW 1.8uW 1.4uW Total power consumption = 7.7uW Logic comparator current Above: Transient currents in the pixel that flow in parallel from VDD to GND during normal and large hit events.

PreShape Pixel simulation: Noise Analysis Circuit stimulus/scenario Standard noise analysis is shown to illustrate the dominant noise sources in the circuit. Noise is measured between the input and output nodes of the shaper (which form the differential signal input to the comparator). For the purposes of the noise analysis a 10T-ohm resistor replaces the switched reset to the preamplifier. Results /I405/M43 id 0.00299189 74.24 /I405/M5 id 0.000813187 5.48 /I405/M43 fn 0.000771543 4.94 /I405/M49 id 0.000724952 4.36 /I405/M47 id 0.00054769 2.49 /I408/M110 id 0.000498613 2.06 /I405/M34 id 0.000279073 0.65 /I405/M46 id 0.000247946 0.51 /I405/M49 fn 0.000210173 0.37 /I405/M5 fn 0.000193922 0.31 /I408/M39 id 0.000169262 0.24 /I405/M47 fn 9.7002e-05 0.08 /I405/M44 id 9.45093e-05 0.07 Integrated Noise Summary (in V) Sorted By Noise Contributors Total Output Noise = 0.00347239 Total Input Referred Noise = 0.326359 The above noise summary info is for noise data The dominant noise source is the preamplifier input transistor, M43. The noise spectrum peaks at 1Mhz due to the filtering effect of the shaper components.

The method of measuring the noise at the shaper output with respect to the shaper input is verified by repeating noise simulations for each node with respect to ground. Total Output Noise = 0.00355302 Total Output Noise = 0.00109895 Shaper output : gnd Shaper input : gnd Total noise = sum of noise powers = 0.0037 Whilst this does not match exactly the error is small and therefore of low concern. A repeat of noise simulations will be re-run with Eldo simulator to double-check these results. The operating point of the circuit moves after a large amount of charge has been integrated at the preamplifier output. To check noise performance in these conditions an ideal voltage source was added to the preamplifier feedback path to provide a 0.65v offset to approximately model the preamplifier in near-saturation. Total Output Noise = 0.00270402 The total noise actually drops in these circumstances, due to the reduction in current in the input transistor, but of course gain reduction would deteriorate the signal also.

PreShape Pixel simulation: Noise Vs Input Capacitance Circuit stimulus/scenario Noise in the charge preamplifier is strongly dependant on the input capacitance. In these simulations, the circuit is first disconnected from the diodes; a single (ideal) capacitor is placed at the input and noise analyses run at a range of values. This is repeated with four diodes connected of sizes 0.9, 1.8 and 3.6 microns dimension to match the sizes selected for the device physics simulations. Noise is measured at the shaper output / input to comparator, and referred back to the input into electrons by the corresponding signal gain. Results waveforms Above: Noise (equivalent electrons) versus parasitic capacitance on the diode node. The value of 8fF for 1.8um diodes refers to the conditions used in all other simulations in this document.

PreShape Pixel simulation: Performance vs Bias Current Circuit stimulus/scenario The current in the preamplifier is adjusted; key performance parameters are plotted. The input signal is 400 electrons. Results waveforms <23enoise 1.5uA The parameter iprebias1 is mirrored into the preamplifier circuit by a factor of 0.01, hence the central point at 150 is the chosen operating point (1.5uA) for the simulations & results in this document. This current setting can be traded (during test) for performance: Noise, signal and speed all improve for more power in this stage.

Circuit stimulus/scenario The current in the shaper is adjusted; key performance parameters are plotted. The input signal is 400 electrons. Results waveforms <23enoise 1uA The parameter ishaperbias1 is mirrored into the shaper circuit by a factor of 0.01, hence the point at 100 is the chosen operating point (1.0uA) for the simulations & results in this document.

PreShape Pixel simulation: Matching/Manufacturing Risks Circuit stimulus/scenario Each passive component in the preamp and shaper circuit is varied individually to check the dominance of their value on the signal pulse and other key parameters These components affect shaping time and therefore the noise and the response time of the circuit (time-over-threshold). Results waveforms Summary table below; each parameter is illustrated fully with parametric simulation results on the pages that follow. In each case the ±20% band is indicated to illustrate the design risk of each parameter. Preamp Cpre 4fF Matching of small capacitance will be poor, and effect on signal is significant: High risk Shaper Matching may be improved using two 8fF devices in series 450fF Large area capacitance should match reasonably well Cin Shaper Rin Shaper Cfb Shaper Rfb 100K 20fF 4M Medium risk Dominance on circuit performance is minimal. Consider reducing to 20-50K for slight improvement in performance? * Low risk Moderate size will help with matching Medium risk Large device (long track of high resistance poly) so matching should be reasonable: Medium risk * Should Rin and Rfb be of the same type (hi-resitance poly) or can a different resistor be used? The small Rin value requires a near-minimum-size device in hi-poly resistor, resulting in poor matching.

60mV 900ns 450ns ±20% 25e- 4fF Above: The capacitor cpre is adjusted to show the relationship between signal magnitude and noise. This preamplifier feedback directly affects signal magnitude, hence longer pulses are achieved with smaller values. The selected operating point is indicated.

60mV 900ns 450ns ±20% 25e- 4MΩ Above: The resistor rfb is adjusted to show the relationship between circuit speed and noise. The selected operating point is indicated.

60mV ±20% 25e- 20fF Above: The capacitor cfb is adjusted to show the relationship between circuit speed and noise. The selected operating point is indicated.

60mV 900ns 450ns ±20% 100kΩ Above: The resistor rin is adjusted to show the relationship between circuit speed and noise. The selected operating point is indicated.

60mV 900ns 450ns ±20% 25e- 450fF Above: The capacitor cin is adjusted to show the relationship between circuit speed and noise. The selected operating point is indicated.

PreShape Pixel simulation: Transient Noise Circuit stimulus/scenario Results waveforms TO FOLLOW (IN PROGRESS)

PreShape Pixel simulation: Mismatch Circuit stimulus/scenario Monte-Carlo simulation varies component parameters according to statistical models: Typical process corner; 1MIP (400e-) input signal. Results waveforms Initial monte-carlo plot (above) illustrates variations between and within process corners. However, the technique of taking the input and the output of the shaper as the differential signal input to the comparator all but eliminates all these effects as shown below:

Above: Monte carlo simulations in SS, TT and FF process corners. Plotting the differential signal (at either terminal of the shaper circuit) demonstrates very good matching performance. Above: Histogram data for the key performance criteria ( 400e-ToT; 2000e-Tot; e- noise) for 50 runs in the TT corner.

Pixel Layout Placement The plot below is a quick placement of all the pixel components in a 50 micron pixel boundary to check that they will fit. The large capacitors and resistors will dominate the pixel area, but there is sufficient space for careful placement. The central NWELL measures approx 3um by 4um. The pixel boundary is offset in this example for ease of layout, the pixel and diode pitch is unaffected when these cells are tiled. Note that this layout excludes the pmos part of the comparator in the pixel, since it is assumed this can be located at the column logic. Incorporating this circuit also adds a further 5um by 9um, so location of this circuit will depend on availability of deep P implant.

Items Outstanding Mismatch simulations of comparator essential for good threshold discrimination! (Analog circuit performs well but initial simulations suggest there may be offset issues with the present comparator design TBC) Review by collaboration feedback on spec violations may tailor final optimisation of circuit. Noise to be confirmed with Eldo (in progress; RT) Edge-detecting logic must be added to the controller such that many multiple hits are not stored! This should be (de)selectable for ASIC1 for testing.