DATASHEET ISL225 Single Push Button Controlled Potentiometer (XDCP ) Low Noise, Low Power, 32 Taps, Push Button Controlled Potentiometer FN78 Rev 2. The Intersil ISL225 is a three-terminal digitally-controlled potentiometer (XDCP) implemented by a resistor array composed of 3 resistive elements and a wiper switching network. The ISL225 features a push button control, a shutdown mode, as well as an industry-leading UTQFN package. The push button control has individual and inputs for adjusting the wiper. To eliminate redundancy, the wiper position will automatically increment or decrement if one of these inputs is held longer than one second. Forcing both and low for more than two seconds activates shutdown mode. Shutdown mode disconnects the top of the resistor chain and moves the wiper to the lowest position, minimizing power consumption. The three terminals accessing the resistor chain naturally configure the ISL225 as a voltage divider. A rheostat is easily formed by floating an end terminal or connecting it to the wiper. V CC (SUPPLY VOLTAGE) CONTROL BLOCK V SS (GROUND) O 2 UTQFN 9 8 3 (Top View) 7 V SS 4 V SS O 2 3 4 NC 5 NC SOIC (Top View) 8 7 5 V CC V CC Features Solid-State Non-Volatile Potentiometer Push Button Controlled Single or Auto Increment/Decrement - Fast Mode after s Button Press AUTOSTORE of Last Wiper Position or Manual Store of Wiper Position Shutdown Mode 32 Wiper Tap Points - Middle Scale Wiper Position on Power-Up Low Power CMOS - to 5.5V - Terminal Voltage, to V CC - Standby Current, 3µA Max R TOTAL Value = k 5k High reliability - Endurance:,, data changes per bit per register - Register data retention: 5 years @ T +55 C Packages - 8 Ld SOIC - Ld UTQFN (2.mmx.mm) Pb-Free (RoHS Compliant) Applications Volume Control LED/LCD Brightness Control Contrast Control Programming Bias Voltages Ladder Networks FN78 Rev 2. Page of 3
Ordering Information PART NUMBER PART MARKING R TOTAL (k ) TEMP. RANGE( C) PACKAGE (Pb-Free) ISL225WFB8Z* (Note ) 225 WFBZ -4 to +25 8 Ld SOIC M8.5 ISL225UFB8Z* (Note ) (No longer available, recommended replacement:isl225wfruz-tk) 225 UFBZ 5-4 to +25 8 Ld SOIC M8.5 PKG. DWG. # ISL225WFRUZ-TK (Note 2) GD -4 to +25 Ld UTQFN Tape and Reel L.2.x.A ISL225UFRUZ-TK (Note 2) (No longer available, recommended replacement:isl225wfruz-tk) GC 5-4 to +25 Ld UTQFN Tape and Reel L.2.x.A *Add -TK suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTES:. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and % matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-2. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-2. Pinouts V SS O 2 3 4 ISL225 (8 LD SOIC) TOP VIEW 8 7 5 V CC V SS ISL225 ( LD UTQFN) TOP VIEW O 2 3 4 NC 5 9 8 7 V CC NC Pin Descriptions SOIC PIN UTQFN PIN SYMBOL BRIEF DESCRIPTION The is a falling-edge triggered input with internal pull-up. Toggling will move the wiper close to terminal. 2 2 The is a falling-edge triggered input with internal pull-up. Toggling will move the wiper close to terminal. 3 3 The and pins of the ISL225 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of and references the relative position of the terminal in relation to wiper movement direction selected by the / input. 4 4 V SS Ground 5 The pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. 7 The and pins of the ISL225 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of and references the relative position of the terminal in relation to wiper movement direction selected by the / input. 7 8 Active low AUTOSTORE enable input or Manual Store active low input. 8 9 V CC Supply Voltage. - 5, NC No connection. FN78 Rev 2. Page 2 of 3
Block Diagrams V CC (SUPPLY VOLTAGE) 5-BIT UP/DOWN COUNTER 3 3 CONTROL AND MEMORY 5-BIT NONVOLATILE MEMORY STORE AND CONTROL RECALL CIRCUITRY 29 28 ONE OF THIRTY TWO DECODER 2 TRANSFER GATES RESISTOR ARRAY V SS (GROUND) GENERAL DETAILED FN78 Rev 2. Page 3 of 3
Absolute Maximum Ratings Storage temperature........................-5 C to +5 C Voltage at and Pin with Respect to GND -.3V to V CC +.3V V CC........................................ -.3V to +V Voltage at any DCP Pin with Respect to GND........-.3V to V CC I W (s).......................................... ±ma Latchup......................... Class II, Level A @ +25 C ESD Rating Human Body Model.................................4kV Machine Model....................................3V Thermal Information Thermal Resistance (Typical) JA ( C/W) JC ( C/W) 8 Lead SOIC (Note 3)............. 25 N/A Lead UTQFN (Notes 3, 4)........ 5 48.3 Maximum Junction Temperature (Plastic Package)........ +5 C Pb-free Reflow Profile.........................see link below http://www.intersil.com/pbfree/pb-freereflow.asp Recommended Operating Conditions Temperature Range (Extended Industrial)........-4 C to +25 C V CC........................................ 2.7V to 5.5V Power Rating......................................5mW Wiper Current....................................±3.mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 4. JC is for the location in the center of the exposed metal pad on the package underside. Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS MIN (Note 8) TYP (Note 5) MAX (Note 8) UNIT R TOTAL to Resistance W option k U option 5 k to Resistance Tolerance -2 +2 % End-to-End Temperature Coefficient W option ±8 ppm/ C (Note ) U option ±25 ppm/ C (Note ) R W Wiper Resistance V CC = 3.3V, wiper current I = V CC /R TOTAL 3 4 V, V V and V Terminal Voltages V and V to GND V CC V Noise on Wiper Terminal From Hz to MHz -8 dbv C H /C L /C W (Note 7) Potentiometer Capacitance //25 pf I LkgDCP Leakage on DCP Pins Voltage at pin from GND to V CC.5.4 µa VOLTAGE DIVIDER MODE (V @ R L ; V CC @ ; measured at unloaded) INL (Note ) DNL (Note 9) ZSerror (Note 7) FSerror (Note 8) TC V (Note ) Integral Non-Linearity - LSB (Note ) Differential Non-Linearity Monotonic over all tap positions -.5.5 LSB (Note ) Zero-Scale Error W option. 2 LSB U option. (Note ) Full-Scale Error W option -2 -. LSB U option - -. (Note ) Ratiometric Temperature Coefficient Wiper from 5 hex to F hex for W and U option ±25 ppm/ C f CUTOFF 3dB Cut-Off Frequency Wiper at the middle scale, W option 5 khz Wiper at the middle scale, U option 75 khz RESISTOR MODE (Measurements between and with not connected, or between and with not connected) RINL (Note 5) RDNL (Note 4) Integral Non-Linearity DCP register set between hex and F hex; monotonic over all tap positions; W option DCP register set between hex and F hex; monotonic over all tap positions; U option -.5.5 MI (Note 2) - MI (Note 2) Differential Non-Linearity W and U option -.5.5 MI (Note 2) FN78 Rev 2. Page 4 of 3
Potentiometer Specifications Roffset (Note 3) Over recommended operating conditions, unless otherwise specified. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN (Note 8) TYP (Note 5) MAX (Note 8) Offset W option 2 MI (Note 2) U option.5 MI (Note 2) DC Electrical Specifications Over recommended operating conditions unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS I CC V CC Active Current, perform wiper move operation MIN (Note 8) TYP (Note 5) MAX (Note 8) UNIT UNIT 5 µa I CC V CC Current During Store Operation, perform non-volatile store operation 2 ma I SB Standby Current. 3 µa I Lkg, Input Leakage Current V IN = V SS to V CC -2 +2 µa V IH, Input HIGH Voltage V CC x.7 V V IL, input LOW Voltage V CC x. V C IN (Note 7), Input Capacitance V CC = 3.3V, T A = +25 C, f = MHz pf Rpull_up (Note 7) Pull-Up Resistor for and M EEPROM SPECIFICATIONS EEPROM Endurance,, Cycles EEPROM Retention Temperature 55 C 5 Years FN78 Rev 2. Page 5 of 3
AC Electrical Specifications Slow Mode Timing Over recommended operating conditions unless otherwise specified. SYMBOL PARAMETER MIN (Note 8) TYP (Note 5) MAX (Note 8) UNIT t GAP Time Between Two Separate Push Button Events 2 ms t DB Debounce Time 5 28 ms t S SLOW Wiper Change on a Slow Mode 25 39 ms t S FAST Wiper Change on a Fast Mode 25 5 78 ms t stdn (Note 7) Time to Enter Shutdown Mode (keep and LOW) 2 s t Power-Up to Wiper Stable 5 µs t R VCC V CC Power-Up Rate.2 5 V/ms NOTES: 5. Typical values are for T A = +25 C and 3.3V supply voltage.. LSB: [V() 3 V() ]/3. V() 3 and V() are voltage on pin for the DCP register set to F hex and hex respectively. LSB is the incremental voltage when changing from one tap to an adjacent tap. 7. ZS error = V() /LSB. 8. FS error = [V() 3 V CC ]/LSB. 9. DNL = [V() i V() i- ]/LSB -, for i = to 3; i is the DCP register setting.. INL = [V() i i LSB V()]/LSB for i = to 3 Max V. i Min V i TC for i = 5 to 3 decimal, T = -4 C to +25 C. Max( ) is the maximum value of the wiper V --------------------------------------------------------------------------------------------- = -------------------- Max V i + Min V i 2 +5 C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range. 2. MI = 3 /3. MI is a minimum increment. 3 and are the measured resistances for the DCP register set to F hex and hex respectively. 3. Roffset = /MI, when measuring between and. Roffset = 3 /MI, when measuring between and. 4. RDNL = ( i i- )/MI, for i = to 3. 5. RINL = [ i (MI i) ]/MI, for i = to 3.. Max Ri Min Ri for i = 5 to 3, T = -4 C to +25 C. Max( ) is the maximum value of the resistance and Min ( ) is the TC R = --------------------------------------------------------------- -------------------- Max Ri + Min Ri 2 +5 C minimum value of the resistance over the temperature range. 7. Limits should be considered typical and are not production tested. 8. Parameters with MIN and/or MAX limits are % tested at +25 C, unless otherwise specified. Temperature limits established by characterization and are not production tested. t DB t GAP MI * V W *MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. FN78 Rev 2. Page of 3
Fast Mode Timing t DB t S FAST t S SLOW V W MI * * MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. Shutdown Mode Timing s t DB 2s SHUTDOWN MODE V W AUTOSTORE Mode Timing T DB 25ms 2s 2ms MEMORY WRITE CYCLE (HIGH) (LOW) WIPER POSITION N N + N + 2 FN78 Rev 2. Page 7 of 3
Typical Performance Curves WIPER RESISTANCE ( ) 4 2 8 4 2 +25 C +25 C -4 C I CC (µa) 3. 2.5 2..5..5 5 5 2 25 3 FIGURE. WIPER RESISTANCE vs TAP POSITION [ I() = V CC /R TOTAL ] FOR k (W) -4-5 35 85 TEMPERATURE ( C) FIGURE 2. STANDBY I CC vs TEMPERATURE DNL (LSB)..5. -.5 -. 5 5 2 25 3 FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR k (W) INL (LSB).3.2.. -. -.2 -.3 5 5 2 25 3 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR k (W). ZERO SCALE ERROR (LSB).5.4.3.2. FULL SCALE ERROR (LSB) -. -.2 -.3 -.4-4 -5 35 85 TEMPERATURE ( C) FIGURE 5. ZS ERROR vs TEMPERATURE -.5-4 -5 35 85 TEMPERATURE ( C) FIGURE. FS ERROR vs TEMPERATURE FN78 Rev 2. Page 8 of 3
Typical Performance Curves (Continued).2.8.. RDNL (LSB). -. RINL (LSB).4.2 -.2 5 5 2 25 3 FIGURE 7. DNL vs TAP POSITION IN EOSTAT MODE FOR k (W). 5 5 2 25 3 FIGURE 8. INL vs TAP POSITION IN EOSTAT MODE FOR k (W) R TOTAL CHANGE (%).2.. -. 5k -.2-4 -5 35 85 TEMPERATURE ( C) FIGURE 9. END TO END R TOTAL % CHANGE vs TEMPERATURE k TCv (ppm/ C) 4 k 35 3 25 2 5 5k 5 5 5 2 25 3 FIGURE. TC FOR VOLTAGE DIVIDER MODE IN ppm 3 INT SINEWAVE 25 TCr (ppm/ C) 2 5 5 5k k 3dB CUT-OFF = 5kHz MIDSCALE OUTT 5 5 2 25 3 FIGURE. TC FOR EOSTAT MODE IN ppm FIGURE 2. FREQUENCY RESPONSE (5kHz) FN78 Rev 2. Page 9 of 3
Power-Up and Down Requirements There are no restrictions on the power-up or power-down conditions of V CC and the voltages applied to the potentiometer pins provided that V CC is always more positive than or equal to V and V, i.e., V CC V, V. The V CC ramp rate specification is always in effect. Pin Descriptions and The and pins of the ISL225 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is V SS and the maximum is V CC. The terminology of and references the relative position of the terminal in relation to wiper movement direction. The pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. The debounced input is used to increment the wiper position. An on-chip pull-up holds the input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent higher tap position. The debounced input is used to decrement the wiper position. An on-chip pull-up holds the input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent lower tap position. The debounced (AUTOSTORE enable) pin can be in one of two states:. AUTOSTORE is enabled if is held LOW during power up. 2. AUTOSTORE is disabled if is held HIGH during powerup. A LOW to HIGH transition will initiate a manual store operation. This is for the user who wishes to connect a push button switch to this pin. For every valid push, the ISL225 will store the current wiper position to the EEPROM. Device Operation There are three sections of the ISL225: the input control, counter and decode section; the EEPROM memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch, connecting a point on the resistor array to the wiper output. Under the proper conditions, the contents of the counter can be stored in EEPROM memory and retained for future use. The resistor array is comprised of 3 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The ISL225 is designed to interface directly to two push button switches for effectively moving the wiper up or down. The and inputs increment or decrement a 5-bit counter respectively. The output of this counter is decoded to select one of the thirty-two wiper positions along the resistive array. The wiper increment input, and the wiper decrement input, are both connected to an internal pull-up so that they normally remain HIGH. When pulled LOW by an external push button switch or a logic LOW level input, the wiper will be switched to the next adjacent tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if or remain LOW for less than 5ms, typical. Each of the buttons can be pushed either once for a single increment/decrement or continuously for a multiple increments/decrements. The number of increments/decrements of the wiper position depends on how long the button is being pushed. When making a continuous push, after the first second, the increment/decrement speed increases. For the first second, the device will be in the slow scan mode. Then, if the button is held for longer than second, the device will go into the fast scan mode. As soon as the button is released, the ISL225 will return to a standby condition. If two or more buttons are pressed simultaneously, all commands are ignored upon release of ALL buttons, except Shutdown Mode condition. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. AUTOSTORE The value of the counter is stored in EEPROM memory after 2 seconds of no activity on or inputs while is enabled (held LOW). When power is restored, the content of the memory is recalled and the counter resets to the last value stored. If AUTOSTORE is to be implemented, is typically hard wired to V SS. If is held HIGH during power-up and then taken LOW, the wiper will not respond to the or inputs until is brought HIGH and held HIGH. Manual (Push Button) Store When is not enabled (held HIGH), a push button switch may be used to pull LOW for more than 5ms and released to perform a manual store of the wiper position. During memory write cycle all inputs will be ignored. Shutdown Mode The ISL225 enters into Shutdown Mode if both and inputs are kept LOW for 2 seconds. In this mode, the resistors array is totally disconnected from its pin and the wiper is moved to position closest to pin, as shown in Figure 3. Note, that and inputs must be pulled LOW within t DB FN78 Rev 2. Page of 3
time window of 5ms, see Shutdown Mode Timing on page 7. Otherwise all command will be ignored till both inputs will be released. Holding either, or input LOW for more than 5ms will exit shutdown mode and return wiper to prior shutdown position. If or will be held LOW for more than 25ms, the ISL225 will start auto-increment or auto-decrement of wiper position. R TOTAL with V CC Removed The end to end resistance of the array will fluctuate once V CC is removed. FIGURE 3. DCP CONNECTION IN SHUTDOWN MODE Revision History About Intersil The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE FN78. - Ordering Information Table on page 2. - Added About Intersil Verbiage. - Updated POD L.2.X.A to latest revision changes are as follow: Updated to new POD format by removing table listing dimensions and moving dimensions onto drawing. Added Typical Recommended Land Pattern. Removed package option. - Updated POD M8.5 to latest revision changes are as follow: Changed Note "982" to "994" Changed in Typical Recommended Land Pattern the following: 2.4(.95) to 2.2(.87).7 (.3) to.(.23).2 to 5.2(.25) Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern. 7//9 FN78. Added reliability information on page under Features and EEPROM Specifications in DC Electrical Spec Table. 3/24/8 FN78. Initial Release to web Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. Copyright Intersil Americas LLC 28-25. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN78 Rev 2. Page of 3
Package Outline Drawing L.2.x.A LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/ B 2. 8. PIN INDEX AREA A PIN # ID 8..5 MIN. 4. MIN. 4X.2 MIN.. 5.8. 2X TOP VIEW 9 X.5 BOTTOM VIEW X.4 X.2 4. M M C C A B ( X.2) (.5 MIN) PACKAGE OUTLINE MAX..55 SEE DETAIL "X" (X.) (. MIN.). C C SEATING PLANE.8 C (2.) (.8) SIDE VIEW (.3) C. 25 REF (X.5 ) (2.5) TYPICAL RECOMMENDED LAND PATTERN -.5 DETAIL "X" NOTES:. 2. 3. 4. 5.. 7. 8. Dimensioning and tolerancing conform to ASME Y4.5M-994. All Dimensions are in millimeters. Angles are in degrees. Dimensions in ( ) for Reference Only. Unless otherwise specified, tolerance : Decimal ±.5 Lead width dimension applies to the metallized terminal and is measured between.5mm and.3mm from the terminal tip. Maximum package warpage is.5mm. Maximum allowable burrs is.7mm in all directions. Same as JEDEC MO-255UABD except: No lead-pull-back, MIN. Package thickness =.45 not.5mm Lead Length dim. =.45mm max. not.42mm. The configuration of the pin # identifier is optional, but must be located within the zone indicated. The pin # identifier may be either a mold or mark feature. FN78 Rev 2. Page 2 of 3
Package Outline Drawing M8.5 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, /2 DETAIL "A".27 (.5).4 (.) INDEX AREA 4. (.57) 3.8 (.5).2 (.244) 5.8 (.228).5 (.2).25 (.) x 45 2 3 TOP VIEW 8 SIDE VIEW B.25 (.).9 (.8) 2.2 (.87) SEATING PLANE 8 5. (.97) 4.8 (.89).75 (.9).35 (.53) 2 7. (.23).27 (.5) 3 -C-.27 (.5).5(.2).33(.3).25(.).(.4) 4 5 5.2(.25) SIDE VIEW A TYPICAL RECOMMENDED LAND PATTERN NOTES:. Dimensioning and tolerancing per ANSI Y4.5M-994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.5mm (. inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.25mm (. inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only.. The lead width as measured.3mm (.4 inch) or greater above the seating plane, shall not exceed a maximum value of.mm (.24 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-2-AA ISSUE C. FN78 Rev 2. Page 3 of 3