www.sii-ic.com MINI ANALOG SERIES FOR AUTOMOTIVE 15 C OPERATION CMOS OPERATIONAL AMPLIFIER SII Semiconductor Corporation, 14 The mini-analog series is a group of ICs that incorporate a general purpose analog circuit in a small package. The is a CMOS type operational amplifier that has a phase compensation circuit, and operates at a low voltage with low current consumption. The is a dual operational amplifier (with circuits). Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to SII Semiconductor Corporation is indispensable. Features Low input offset voltage: VIO = 6. mv max. (Ta = 4 C to 15 C) Operation power supply voltage range: VDD =.7 V to 5.5 V Low current consumption (Per circuit): IDD = 1. μa typ. No external parts required for internal phase compensation Operation temperature range: Ta = 4 C to 15 C Lead-free (Sn 1%), halogen-free AEC-Q1 qualified *1 *1. Contact our sales office for details. Applications Current sensing Signal amplification Buffer Active filter Package TMSOP-8 1
Block Diagram VDD IN1() IN1() OUT1 IN() IN() OUT VSS Figure 1
AEC-Q1 Qualified This IC supports AEC-Q1 for the operation temperature grade 1. Contact our sales office for details of AEC-Q1 reliability specification. Product Name Structure Refer to "1. Product name" regarding the contents of product name, ". Package" regarding the package drawings and "3. Product name list" regarding the product type. 1. Product name B A - K8T U *1. Refer to the tape drawing. Environmental code U: Lead-free (Sn 1%), halogen-free Product name abbreviation and IC packing specifications *1 K8T: TMSOP-8, Tape Operation temperature A: Ta = 4 C to 15 C Number of circuits B:. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel TMSOP-8 FM8-A-P-SD FM8-A-C-SD FM8-A-R-SD 3. Product name list Table Product Name BA-K8TU TMSOP-8 Package 3
Pin Configuration 1. TMSOP-8 1 3 4 Top view Figure 8 7 6 5 Table 3 Pin No. Symbol Description 1 OUT1 Output pin 1 IN1() Inverted input pin 1 3 IN1() Non-inverted input pin 1 4 VSS GND pin 5 IN() Non-inverted input pin 6 IN() Inverted input pin 7 OUT Output pin 8 VDD Positive power supply pin 4
Absolute Maximum Ratings Table 4 (Ta = 5 C unless otherwise specified) Parameter Symbol Absolute Maximum Rating Unit Power supply voltage VDD VSS.3 to VSS 7. V Input voltage VIN(), VIN(-) VSS.3 to VSS 7. V Output voltage VOUT VSS.3 to VDD.3 V Differential input voltage VIND ±7. V Output pin current ISOURCE. ma ISINK. ma Operating ambient temperature Topr 4 to 15 C Storage temperature Tstg 55 to 15 C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Thermal Resistance Value Table 5 Item Symbol Condition Min. Typ. Max. Unit Board 1 16 C/W Junction-to-ambient thermal resistance *1 θja TMSOP-8 Board 133 C/W *1. Test environment: compliance with JEDEC STANDARD JESD51-A Remark Refer to " Thermal Characteristics" for details of power dissipation and test board. 5
Electrical Characteristics DC Electrical Characteristics Operation power supply voltage range Table 6 (VDD = 5. V, Ta = 5 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit VDD.7 5. 5.5 V Current consumption ( circuits) IDD VCMR = VOUT = VDD /..5 ma 5 Input offset voltage Input offset voltage drift VCMR = VDD /, Ta = 4 C to 15 C ΔVIO VCMR = VDD /, ΔTa Ta = 4 C to 15 C VIO 6. ±3. 6. mv 1 ±3 μv/ C 1 Input offset current IIO 1 pa Input bias current IBIAS 1 pa Common-mode input voltage range Voltage gain (open loop) Maximum output swing voltage Common-mode input signal rejection ratio Power supply voltage rejection ratio VCMR.1 3.8 V AVOL VOH VOL VOUT = VSS.5 V to VDD.5 V VCMR = VDD /, RL = 1. MΩ RL = 1. MΩ, Ta = 4 C to 15 C RL = 1. MΩ, Ta = 4 C to 15 C 88 11 db 8 4.9 V 3.1 V 4 CMRR VCMR = VSS.1 V to VDD 1. V 7 85 db PSRR VDD =.7 V to 5.5 V 7 9 db 1 Source current ISOURCE VOUT = VDD.1 V 5. ma 6 Sink current ISINK VOUT =.1 V 5. ma 7 Table 7 AC Electrical Characteristics (VDD = 5. V, Ta = 5 C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Slew rate SR RL = 1. MΩ, CL = 15 pf (Refer to Figure 11). V/μs Gain-bandwidth product GBP CL = pf 3. MHz 6
Test Circuits (Per Circuit) 1. Power supply voltage rejection ratio, input offset voltage Power supply voltage rejection ratio (PSRR) R S R F V OUT The power supply voltage rejection ratio (PSRR) can be calculated by the following expression, with VOUT measured at each VDD. Test conditions: VDD =.7 V: VDD = VDD1, VOUT = VOUT1, R S VDD = 5.5 V: VDD = VDD, VOUT = VOUT V CMR = / R F PSRR = log VOUT1 VDD1 VDD1 VDD VOUT VDD RF RS RS Figure 3 Test Circuit 1 Input offset voltage (VIO) VIO = VOUT VDD RS RF RS. Common-mode input signal rejection ratio, common-mode input voltage range Common-mode input signal rejection ratio (CMRR) R S R F V OUT The common-mode input signal rejection ratio (CMRR) can be calculated by the following expression, with VOUT measured at each VIN. Test conditions: VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1, R S VIN = VCMR Min.: VIN = VIN, VOUT = VOUT R F V IN / CMRR = log VIN1 VIN VOUT1 VOUT RF RS RS Figure 4 Test Circuit Common-mode input voltage range (VCMR) The common mode input voltage range (VCMR) is the range of VIN in which the common mode input signal rejection ratio (CMRR) is satisfied when VIN is varied. 7
3. Maximum output swing voltage (VOH) Maximum output swing voltage (VOH) V OH Test conditions VIN1 = VDD.1 V VIN = VDD.1 V RL = 1 MΩ R L V IN1 V IN / Figure 5 Test Circuit 3 4. Maximum output swing voltage (VOL) / Maximum output swing voltage (VOL) R L V OL Test conditions: VIN1 = VDD.1 V VIN = VDD.1 V RL = 1 MΩ V IN1 V IN Figure 6 Test Circuit 4 5. Current consumption Current consumption (IDD) A V CMR = / Figure 7 Test Circuit 5 8
6. Source current Source current (ISOURCE) A Test conditions: VOUT = VDD.1 V VIN1 = VDD.1 V VIN = VDD.1 V V IN1 V IN V OUT 7. Sink current Figure 8 Test Circuit 6 V OUT Sink current (ISINK) A Test conditions: VOUT = VSS.1 V VIN1 = VDD.1 V VIN = VDD.1 V V IN1 V IN Figure 9 Test Circuit 7 9
8. Voltage gain R S R S R F R F N D.U.T 1 MΩ V CMR = / / Figure 1 Test Circuit 8 NULL V SSN V M V OUT Voltage gain (open loop) (AVOL) The voltage gain (AVOL) can be calculated by the following expression, with VOUT measured at each VM. Test conditions: VM = VDD.5 V: VM = VM1, VOUT = VOUT1, VM =.5 V: VM = VM, VOUT = VOUT AVOL = log VM1 VM VOUT1 VOUT RF RS RS 9. Slew rate (SR) Measured by the voltage follower circuit. t R = t F = ns ( V to V CMR Max. ) IN() = V CMR Max. IN() = V V OUT (= IN()) V OUT (= IN()) t THL t TLH V CMR Max. V CMR Max..9 V CMR Max..1 SR = SR = VCMR Max..8 ttlh VCMR Max..8 tthl Figure 11 1
Precautions Do not apply an electrostatic discharge to this IC that exceeds performance ratings of the built-in electrostatic protection circuit. SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. Use this IC with the output current of ma or less. This IC operates stably even directly connecting a load capacitance of 1 pf or less to the output pin, as seen in Figure 1. When using a load capacitance of 1 pf or larger, set a resistor of 47 Ω or more as seen in Figure 13. In case of connecting a filter for noise prevention, and using a load capacitance of 1 pf or more, also set a resistor of 47 Ω or more as seen in Figure 14. V IN V IN V OUT Load capacitance 1 pf or less V SS Figure 1 V IN V OUT V IN 47 Ω or more V SS Load capacitance Figure 13 Filter V IN V OUT 47 Ω or more V IN Load capacitance V SS Caution Figure 14 The above connection diagram and constant will not guarantee successful operation. Perform through evaluation using the actual application to set the constant. 11
Characteristics (Typical Data) 1. Current consumption (IDD) ( circuits) vs. Power supply voltage (VDD).4 VSS = V, VCMR = VOUT = VDD /. IDD [ma] 1.6 1..8 Ta = 4C Ta = 5C Ta = 15C.4. 3 4 VDD [V] 5 6. Voltage gain (AVOL) vs. Frequency (f) AVOL [db] 14 1 1 8 6 4.1 VDD =.7 V, VSS = V Ta = 4C Ta = 5C Ta = 15C 1 1 1 1k 1k 1k 1M 1M f [Hz] AVOL [db] 14 1 1 8 6 4.1 Ta = 5C Ta = 15C VDD = 5. V, VSS = V Ta = 4C 1 1 1 1k 1k 1k 1M 1M f [Hz] 3. Output current 3. 1 Source current (ISOURCE) vs. Power supply voltage (VDD) ISOURCE [ma] 14 1 1 8 6 4 VOUT = VDD.1 V, VSS = V 3 Ta = 4C 4 VDD [V] Ta = 5C Ta = 15C 3. Sink current (ISINK) vs. Power supply voltage (VDD) 5 6 1 VOUT =.1 V, VSS = V ISINK [ma] 8 6 4 Ta = 4C Ta = 5C Ta = 15C 3 4 VDD [V] 5 6 1
3. 3 Output voltage (VOUT) vs. Source current (ISOURCE) VOUT [V] 3..5. 1.5 1. Ta = 15C VDD =.7 V, VSS = V Ta = 4C Ta = 5C VOUT [V] 6. 5. 4. 3.. VDD = 5. V, VSS = V Ta = 4C Ta = 15C Ta = 5C.5. 4 6 ISOURCE [ma] 8 1 1.. 4 6 ISOURCE [ma] 8 1 3. 4 Output voltage (VOUT) vs. Sink current (ISINK) 3. VDD =.7 V, VSS = V 6. VDD = 5. V, VSS = V VOUT [V].5. 1.5 1..5. Ta = 15C Ta = 5C Ta = 4C 4 6 8 1 ISINK [ma] VOUT [V] 5. 4. 3.. 1.. Ta = 4C Ta = 15C Ta = 5C 4 6 8 ISINK [ma] 1 4. Input bias current (IBIAS) vs. Temperature (Ta) IBIAS[nA] VDD = 5. V, VSS = V, VCMR = VDD / 6 5 4 3 1 4 5 5 5 75 1 15 Ta [ C] 13
Thermal Characteristics 1. TMSOP-8 1. Tj = 15C max. Power dissipation (PD) [W].8.6.4. Board.94 W Board 1.78 W 5 1 15 Ambient temperature (Ta) [C] Figure 15 Power Dissipation of Package (When Mounted on Board) 1. 1 Board 1 76. mm Table 8 Figure 16 114.3 mm Item Thermal resistance value (θja) 16 C/W Specification Size 114.3 mm 76. mm t1.6 mm Material FR-4 Number of copper foil layer 1 Land pattern and wiring for testing: t.7 mm Copper foil layer 3 4 74. mm 74. mm t.7 mm Thermal via 1. Board 76. mm Table 9 Figure 17 114.3 mm Item Thermal resistance value (θja) 133 C/W Specification Size 114.3 mm 76. mm t1.6 mm Material FR-4 Number of copper foil layer 4 1 Land pattern and wiring for testing: t.7 mm 74. mm 74. mm t.35 mm Copper foil layer 3 74. mm 74. mm t.35 mm 4 74. mm 74. mm t.7 mm Thermal via 14
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