NBXBA019, NBXHBA019, NBXSBA019. V, 15 MHz / 50 MHz LVPECL Clock Oscillator The single and dual frequency crystal oscillator (XO) is designed to meet today s requirements for. V LVPECL clock generation applications. The device uses a high Q fundamental crystal and Phase Lock Loop (PLL) multiplier to provide selectable 15 MHz or 50 MHz, ultra low jitter and phase noise LVPECL differential output. This device is a member of ON Semiconductor s PureEdge clock family that provides accurate and precision clock solutions. Available in 5 mm x 7 mm SM (CLCC) package on 1 mm tape and reel in quantities of 1000. Features LVPECL ifferential Output Uses High Q Fundamental Mode Crystal and PLL Multiplier Ultra Low Jitter and Phase Noise 0. ps (1 khz 0 MHz) Selectable Output Frequency 15 MHz (default) / 50 MHz Hermetically Sealed Ceramic SM Package RoHS Compliant Operating Range. V ±10% Total Frequency Stability 50 PPM This is a Pb Free evice Applications Ethernet, Gigabit Ethernet Infiniband Base Stations V 5 PIN CLCC LN SUFFIX CASE 88AB NBXSBA019 50 AAWLYYWWG ORERING INFORMATION evice Package Shipping NBXBA019LN1TAG MARKING IAGRAMS 15/50 = Output Frequency (MHz) AA = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb Free Package NBXSBA019LN1TAG NBXBA019 15/50 AAWLYYWWG NBXHBA019 15 AAWLYYWWG 1000/ 1000/ Crystal PLL Clock Multiplier NBXHBA019LN1TAG* NBXBA019LNHTAG 1000/ 100/ 1 OE FSEL/NC* GN Figure 1. Simplified Logic iagram *NBXSBA019 and NBXHBA019 only NBXSBA019LNHTAG NBXHBA019LNHTAG* For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BR8011/. * Please contact sales office for availability 100/ 100/ Semiconductor Components Industries, LLC, 009 October, 009 Rev. 1 Publication Order Number: NBXBA019/
OE 1 V OE 1 V FSEL 5 NC 5 GN GN NBXBA019 NBXSBA019/NBXHBA019 Figure. Pin Connections (Top View) Table 1. PIN ESCRIPTION Pin No. Symbol I/O escription 1 ÁÁÁÁ OE ÁÁÁÁÁ LVTTL/LVCMOS Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. Control Input See OE pin description Table. ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁ FSEL/ LVTTL/LVCMOS Output Frequency Select Pin. Pin will default to logic HIGH when left open. See Output ÁÁÁÁÁÁÁÁ NC* ÁÁÁÁÁ Control Input ÁÁÁÁÁÁÁÁ Frequency Select pin description Table. Á ÁÁÁÁÁÁÁÁ GN Power Supply Ground 0 V Á LVPECL Output Á ÁÁÁÁÁÁÁÁ Non Inverted Clock Output. Typically loaded with 50 receiver termination resistor to ÁÁÁÁÁÁÁÁ V TT = V V. ÁÁÁÁÁ 5 ÁÁÁÁ ÁÁÁÁÁ LVPECL OutputÁÁÁÁÁÁÁÁ Inverted Clock Output. Typically loaded with 50 receiver termination resistor to V TT = V V. ÁÁÁÁÁ Power Supply Positive power supply voltage. Voltage should not exceed. V ±10%. V *NBXSBA019 and NBXHBA019 only. Table. OUTPUT ENABLE TRI STATE FUNCTION OE Pin Output Pins Open Active HIGH Level Active LOW Level High Z Table. OUTPUT FREQUENCY SELECT FSEL Pin Open (pin will float high) Output Frequency (MHz) 15 HIGH Level 15 LOW Level 50 Table. ATTRIBUTES Characteristic Input efault State Resistor ES Protection Human Body Model Machine Model Value 170 k kv 00 V Meets or Exceeds JEEC Standard EIA/JES78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AN800/. Table 5. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition Rating Units V Positive Power Supply GN = 0 V. V I out LVPECL Output Current Continuous Surge T A Operating Temperature Range 0 to +85 C T stg Storage Temperature Range 55 to +10 C T sol Wave Solder See Figure 0 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 5 50 ma
Table. C CHARACTERISTICS (V =. V ± 10%, GN = 0 V, T A = 0 C to +85 C) (Note ) Symbol Characteristic Conditions Min. Typ. Max. Units I Power Supply Current 78 100 ma V IH OE and FSEL Input HIGH Voltage 000 V mv V IL OE and FSEL Input LOW Voltage GN 00 800 mv I IH Input HIGH Current OE FSEL I IL Input LOW Current OE FSEL V OH V OL Output HIGH Voltage Output LOW Voltage V =. V V =. V V 1195 105 V 195 155 V 95 55 V 1700 V OUTPP Output Voltage Amplitude 0 mv NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously.. Measurement taken with outputs terminated with 50 ohm to V V. See Figure 5. Table 7. AC CHARACTERISTICS (V =. V ± 10%, GN = 0 V, T A = 0 C to +85 C) (Note ) Symbol Characteristic Conditions Min. Typ. Max. Units f OUT Output Clock Frequency FSEL = HIGH 15 MHz FSEL = LOW 50 f Frequency Stability NBXBA019/NBXSBA019/NBXHBA019 (Note ) ±50 ppm NOISE Phase Noise Performance 100 Hz of Carrier 11/ 105 dbc/hz f out = 15 MHz/50 MHz (See Figures and ) 1 khz of Carrier 1/ 11 dbc/hz 10 khz of Carrier 11/ 1 dbc/hz 100 khz of Carrier 11/ 1 dbc/hz 1 MHz of Carrier 19/ 1 dbc/hz 10 MHz of Carrier 11/ 158 dbc/hz t jit ( ) RMS Phase Jitter 1 khz to 0 MHz 0. 0.9 ps t jitter Cycle to Cycle, RMS 1000 Cycles 1 8 ps Cycle to Cycle, Peak to Peak 1000 Cycles 7 0 ps Period, RMS 10,000 Cycles 0. ps Period, Peak to Peak 10,000 Cycles 5 0 ps t OE/O Output Enable/isable Time 00 ns t UTY_CYCLE Output Clock uty Cycle (Measured at Cross Point) A A mv mv 8 50 5 % t R Output Rise Time (0% and 80%) 50 00 ps t F Output Fall Time (80% and 0%) 50 00 ps t start Start up Time 1 5 ms Aging 1 st Year ppm Every Year After 1 st 1 ppm NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously.. Measurement taken with outputs terminated with 50 ohm to V V. See Figure 5.. Parameter guarantees 10 years of aging. Includes initial stability at 5 C, shock, vibration, and first year aging.
Figure. Typical Phase Noise Plot at 15 MHz Figure. Typical Phase Noise Plot at 50 MHz
Table 8. RELIABILITY COMPLIANCE Parameter Standard Method Shock MIL ST 8, Method 00, Condition B Solderability MIL ST 8, Method 00 Vibration MIL ST 8, Method 007, Condition A Solvent Resistance MIL ST 0, Method 15 Thermal Shock Environment MIL ST 8, Method 1011, Condition A Moisture Level Sensitivity Environment MSL1 0 C per IPC/JEEC J ST 00 ÁÁÁÁÁ NBXxxxxxx river evice Z o = 50 Z o = 50 Receiver evice 50 50 V TT V TT = V.0 V Figure 5. Typical Termination for Output river and evice Evaluation (See Application Note AN800/ Termination of ECL Logic evices.) Temperature ( C) 0 17 temp. 0 C 0 0 sec. max. peak C/sec. max. C/sec. max. 175 150 pre heat ramp up cooling reflow Time 0 180 sec. 0 150 sec. Figure. Recommended Reflow Soldering Profile 5
PACKAGE IMENSIONS PIN CLCC, 7x5,.5P CASE 88AB 01 ISSUE C X 0.15 C 1 A B NOTES: 1. IMENSIONING AN TOLERANCING PER ASME Y1.5M, 199.. CONTROLLING IMENSION: MILLIMETERS. TERMINAL 1 INICATOR 0.10 C A1 E A TOP VIEW SIE VIEW H E1 A A E C SEATING PLANE MILLIMETERS IM MIN NOM MAX A 1.70 1.80 1.90 A1 0.70 REF A 0. REF A 0.08 0.10 0.1 b 1.0 1.0 1.50 7.00 BSC 1.17.0...81.9 5.08 BSC E 5.00 BSC E1.7.0. E.5.80.95 E.9 BSC e.5 BSC H 1.80 REF L 1.17 1.7 1.7 R 0.70 REF SOLERING FOOTPRINT* 1 e R E X 1.50 5.0 0.10 C A B 0.05 C X b 5 BOTTOM VIEW X L.5 PITCH X 1.50 IMENSION: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. PureEdge is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Literature istribution Center for ON Semiconductor P.O. Box 51, enver, Colorado 8017 USA Phone: 0 75 175 or 800 80 Toll Free USA/Canada Fax: 0 75 17 or 800 87 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800 8 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 1 790 910 Japan Customer Focus Center Phone: 81 577 850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NBXBA019/