OPTICALLY ISOLATED ERROR AMPLIFIER FOD2711 DESCRIPTION FEATURES APPLICATIONS PIN DEFINITIONS 9/6/02

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DESCRIPTION The Optically Isolated Amplifier consists of the popular RC4A precision programmable shunt reference and an optocoupler. The optocoupler is a gallium arsenide (GaAs) light emitting diode optically coupled to a silicon phototransistor. The reference voltage tolerance is %. The current transfer ratio (CTR) ranges from 00% to 00%. It is primarily intended for use as the error amplifier/reference voltage/optocoupler function in isolated ac to dc power supplies and dc/dc converters. When using the, power supply designers can reduce the component count and save space in tightly packaged designs. The tight tolerance reference eliminates the need for adjustments in many applications. The device comes in a -pin dip white package. FEATURES Optocoupler, precision reference and error amplifier in single package.40v ± % reference CTR 00% to 00%,000V RMS isolation UL approval E9000, Volume CSA approval 9 VDE approval 40004 BSI approval 0, 0 FUNCTIONAL BLOCK DIAGRAM NC C E LED FB COMP APPLICATIONS NC 4 GND Power supplies regulation DC to DC converters PIN DEFINITIONS Pin Number Pin Name Pin function description NC Not connected C Phototransistor Collector E Phototransistor Emitter 4 NC Not connected GND Ground COMP Error Amplifier Compensation. This pin is the output of the error amplifier. * FB Voltage Feedback. This pin is the inverting input to the error amplifier LED Anode LED. This pin is the input to the light emitting diode. * The compensation network must be attached between pins and. Page of 4

TYPICAL APPLICATION V FAN40 PWM Control V O R R ABSOLUTE MAXIMUM RATINGS (T A = C Unless otherwise specified.) Parameter Symbol Value Units Storage Temperature T STG - to + C Operating Temperature T OPR -40 to + C Lead Solder Temperature T SOL 0 for 0 sec. C Input Voltage V LED. V Input DC Current I LED 0 ma Collector-Emitter Voltage V CEO 0 V Emitter-Collector Voltage V ECO V Collector Current I C 0 ma Input Power Dissipation (note ) PD 4 mw Transistor Power Dissipation (note ) PD mw Total Power Dissipation (note ) PD 4 mw Notes. Derate linearly from C at a rate of.4 mw/ C. Derate linearly from C at a rate of.4 mw/ C.. Derate linearly from C at a rate of.4 mw/ C. 4. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside these ratings. Page of 4

ELECTRICAL CHARACTERISTICS (T A = C Unless otherwise specified.) INPUT CHARACTERISTICS Parameter Test Conditions Symbol Min Typ** Max Unit LED forward voltage (I LED = 0 ma, V COMP = V FB )(Fig.) V F. V Reference voltage (-40 to + C) (V COMP = V FB, I LED = 0 ma (Fig.)..9 V REF ( C)..40. V Deviation of V REF over temperature - See Note (T A = -40 to + C) V REF (DEV) 4 mv Ratio of Vref variation to the output of the error amplifier (I LED = 0 ma, V COMP = V REF to V) (Fig.) V REF / V COMP -. -. mv/v Feedback input current (I LED = 0 ma, R = 0 kω) (Fig.) I REF 0. 0. µa Deviation of I REF over temperature - See Note (T A = -40 to + C) I REF (DEV) 0. 0. µa Minimum drive current (V COMP = V FB ) (Fig.) I LED (MIN) 0 µa Off-state error amplifier current (V LED =. V, V FB = 0) (Fig.4) I (OFF) 0.00 0. µa Error amplifier output impedance - See Note (V COMP = V FB, I LED = 0. ma to ma, f< khz) Z OUT 0. Ohm. The deviation parameters V REF(DEV) and I REF(DEV) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. The average full-range temperature coefficient of the reference input voltage, V REF, is defined as: { V REF( DEV) /V REF ( T A = C) } 0 V REF ( ppm/ C) = ---------------------------------------------------------------------------------------------------- T A where T A is the rated operating free-air temperature range of the device.. The dynamic impedance is defined as Z OUT = V COMP / I LED. When the device is operating with two external resistors (see Figure ), the total dynamic impedance of the circuit is given by: Z OUT, TOT = V ------- Z I OUT + R ------- R Page of 4

OUTPUT CHARACTERISTICS (T A = C Unless otherwise specified.) Parameter Test Conditions Symbol Min Typ Max Unit Collector dark current (V CE = 0 V) (Fig. ) I CEO 0 na Emitter-collector voltage breakdown (I E = 00 µa) BV ECO V Collector-emitter voltage breakdown (I C =.0mA) BV CEO 0 V TRANSFER CHARACTERISTICS (T A = C Unless otherwise specified.) Parameter Test Conditions Symbol Min Typ Max Unit Current transfer ratio Collector-emitter saturation voltage (I LED = 0 ma, V COMP = V FB, V CE = V) (Fig. ) (I LED = 0 ma, V COMP = V FB, I C =. ma) (Fig. ) CTR 00 00 % V CE (SAT) 0.4 V ISOLATION CHARACTERISTICS (T A = C Unless otherwise specified.) Parameter Test Conditions Symbol Min Typ Max Unit Input-output insulation leakage current Withstand insulation voltage (RH = 4%, T A = C, t = s, V I-O = 000 VDC) (note. ) (RH <= 0%, T A = C, t = min) (note ) I I-O.0 µa V ISO 000 Vrms Resistance (input to output) V I-O = 00 VDC (note. ) R I-O 0 Ohm SWITCHING CHARACTERISTICS (T A = C Unless otherwise specified.) Parameter Test Conditions Symbol Min Typ Max Unit Bandwidth (Fig. ) B W 0 khz Common mode transient immunity at output high Common mode transient immunity at output low (I LED = 0 ma, V cm = 0 V PP RL =. kω (Fig. ) (note ) (I LED = 0 ma, V cm = 0 V PP RL =. kω (Fig. ) (note ) CMH.0 kv/µs CML.0 kv/µs Notes. Device is considered as a two terminal device: Pins,, and 4 are shorted together and Pins,, and are shorted together.. Common mode transient immunity at output high is the maximum tolerable (positive) dvcm/dt on the leading edge of the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity at output low is the maximum tolerable (negative) dvcm/dt on the trailing edge of the common pulse signal,vcm, to assure that the output will remain low. Page 4 of 4

I (LED) I (LED) V F V V R V COMP V REF R V REF FIG.. V REF, V F, I LED (min) TEST CIRCUIT FIG.. V REF/ V COMP TEST CIRCUIT I (LED) I (OFF) V I REF R V V (LED) FIG.. I REF TEST CIRCUIT FIG. 4. I (OFF) TEST CIRCUIT I CEO I (LED) I C V CE V CE V V COMP V REF FIG.. I CEO TEST CIRCUIT FIG.. CTR, V CE(sat) TEST CIRCUIT Page of 4

V CC = +V DC R L I F = 0 ma 4Ω µf V OUT + _ 0. V PP V IN 0.4V 4 Fig. Frequency Response Test Circuit V CC = +V DC I F = 0 ma (A) I F = 0 ma (B) R.kΩ V OUT + _ A B 4 _ VCM + 0V P-P Fig. CMH and CML Test Circuit Page of 4

TYPICAL PERFORMANCE CURVES Fig. 9a LED Current vs Cathode Voltage Fig. 9b LED Current vs Cathode Voltage ILED- SUPPLY CURRENT (ma) 0 0 - -0 T A = C V COMP = V FB ILED - SUPPLY CURRENT (ma) 0 00 0 0-0 -00 TA = C V COMP = V FB - -.0-0. 0.0 0..0. V COMP - CATHODE VOLTAGE (V) -0-0 V COMP - CATHODE VOLTAGE (V) Fig. 0 Reference Voltage vs Ambient Temperature Fig. Reference Current vs Ambient Temperature VREF - REFERENCE VOLTAGE (V).44 ILED = 0mA.4.40...4. IREF - REFERENCE CURRENT (na) 0 0 40 0 00 0 0 40 ILED = 0mA R = 0 kω.0-40 -0 0 0 40 0 0 00 T A - AMBIENT TEMPERATURE ( C) 0-40 -0 0 0 40 0 0 00 T A - AMBIENT TEMPERATURE ( C) Fig. Off-State Current vs Ambient Temperature 000 V CC =.V IOFF - OFF-STATE CURRENT (NA) 00 0 0. -40-0 0 0 40 0 0 00 T A - AMBIENT TEMPERATURE ( C) Page of 4

Fig. Forward Current vs Forward Voltage Fig. 4 Dark Current vs Ambient Temperature 0 0000 V CE = 0V IF - FORWARD CURRENT (ma) 0 0 C C 0 C ICEO - DARK CURRENT (na) 000 00 0 0.9.0....4 0. -40-0 0 0 40 0 0 00 V F - FORWARD VOLTAGE (V) T A - AMBIENT TEMPERATURE ( C) Fig. Collector Current vs Ambient Temperature Fig. Current Transfer Ratio vs LED Current IC - COLLECTOR CURRENT (ma) 0 0 V CE = V I LED = 0mA I LED = 0mA 0 I LED = ma I LED = ma 0 0 0 0 0 40 0 0 0 0 90 00 (IC/IF) - CURRENT TRANSFER RATIO (%) V CE = V 40 0 0 C 00 C 0 0 C 0 40 0 0 0 0 40 4 0 T A - AMBIENT TEMPERATURE ( C) I LED - FORWARD CURRENT (ma) Fig. Saturation Voltage vs Ambient Temperature 0. VCE(SAT) - SATURATION VOLTAGE (V) 0.4 0. 0.0 0. 0. 0.4 0. 0.0-40 -0 0 0 40 0 0 00 T A - AMBIENT TEMPERATURE ( C) Page of 4

IC - COLLECTOR CURRENT (ma) Fig. Collector Current vs Collector Voltage T A = 0 C 0 I LED = 0mA 0 I LED = 0mA 0 I LED = ma I LED = ma 0 0 4 9 0 VCE - COLLECTOR-EMITTER VOLTAGE (V) DELTA VREF / DELTA VCOMP ( mv/v) Fig. 9 Rate of Change Vref to Vcomp vs Temperature -0. -0.4-0. -0. -.0 -. -.4 -. -0-40 -0 0 0 40 0 0 00 0 TEMPERATURE - C Fig. 0 Voltage Gain vs Frequency VCC = 0 V IF = 0 ma 0 VOLTAGE GAIN - DB - -0 RL=kΩ RL=00Ω - RL=00Ω 0. 0 00 000 FREQUENCY - KHZ Page 9 of 4

The The is an optically isolated error amplifier. It incorporates three of the most common elements necessary to make an isolated power supply, a reference voltage, an error amplifier, and an optocoupler. It is functionally equivalent to the popular RC4A shunt voltage regulator plus the CNYF- optocoupler. Powering the Secondary Side The LED pin in the powers the secondary side, and in particular provides the current to run the LED. The actual structure of the dictates the minimum voltage that can be applied to the LED pin: The error amplifier output has a minimum of the reference voltage, and the LED is in series with that. Minimum voltage applied to the LED pin is thus.4v +.V =.4V. This voltage can be generated either directly from the output of the converter, or else from a slaved secondary winding. The secondary winding will not affect regulation, as the input to the FB pin may still be taken from the output winding. The LED pin needs to be fed through a current limiting resistor. The value of the resistor sets the amount of current through the LED, and thus must be carefully selected in conjunction with the selection of the primary side resistor. Feedback Output voltage of a converter is determined by selecting a resistor divider from the regulated output to the FB pin. The attempts to regulate its FB pin to the reference voltage,.4v. The ratio of the two resistors should thus be: R TOP ------------------------- = R BOTTOM V OUT -------------- V REF The absolute value of the top resistor is set by the input offset current of 0.µA. To achieve % accuracy, the resistance of R TOP should be: V OUT.4 ------------------------------- > 0 µa R TOP Compensation The compensation pin of the provides the opportunity for the designer to design the frequency response of the converter. A compensation network may be placed between the COMP pin and the FB pin. In typical low-bandwidth systems, a 0.µF capacitor may be used. For converters with more stringent requirements, a network should be designed based on measurements of the system s loop. An excellent reference for this process may be found in Practical Design of Power Supplies by Ron Lenk, IEEE Press, 99. Secondary Ground The GND pin should be connected to the secondary ground of the converter. No Connect Pins The NC pins have no internal connection. They should not have any connection to the secondary side, as this may compromise the isolation structure. Photo-Transistor The Photo-transistor is the output of the. In a normal configuration the collector will be attached to a pull-up resistor and the emitter grounded. There is no base connection necessary. The value of the pull-up resistor, and the current limiting resistor feeding the LED, must be carefully selected to account for voltage range accepted by the PWM IC, and for the variation in current transfer ratio (CTR) of the opto-isolator itself. Example: The voltage feeding the LED pins is +V, the voltage feeding the collector pull-up is +0V, and the PWM IC is the Fairchild KAH00, which has a V reference. If we select a 0KΩ resistor for the LED, the maximum current the LED can see is (V-.4V) /0KΩ = 9µA. The CTR of the opto-isolator is a minimum of 00%, and so the minimum collector current of the photo-transistor when the diode is full on is also 9µA. The collector resistor must thus be such that: 0V V ----------------------------------- < 9µA or R R COLLECTOR >.4KΩ; COLLECTOR select 0KΩ to allow some margin. Page 0 of 4

Package Dimensions (Through Hole) Package Dimensions (0.4"Lead Spacing) PIN ID. 4 PIN ID. 4 0.0 (.) 0.0 (.) 0.0 (.) 0.0 (.) 0.90 (9.9) 0.0 (9.40) SEATING PLANE 0.00 (.0) 0.40 (.) 0.00 (.) 0.04 (.4) 0.4 (.90) 0.0 (.0) 0.00 (0.) MIN SEATING PLANE 0.00 (.0) 0.40 (.) 0.90 (9.9) 0.0 (9.40) 0.00 (.) 0.04 (.4) 0.004 (0.0) MIN 0.0 (0.) 0.0 (0.4) 0.00 (.4) TYP 0.0 (0.40) 0.00 (0.0) MAX 0.00 (.) TYP 0.0 (0.) 0.0 (0.4) 0.00 (.4) TYP 0.4 (.90) 0.0 (.0) 0.0 (0.40) 0.00 (0.0) 0 to 0.400 (0.) TYP Package Dimensions (Surface Mount) - Pin Dip 4 0.90 (9.9) 0.0 (9.40) PIN ID. 0.00 (.) 0.0 (.) 0.0 (.) 0.00 (.) 0.00 (.) 0.04 (.4) 0.00 (0.) MIN 0.00 (.) TYP 0.0 (0.4) 0.00 (0.0) 0.4 (0.4) 0.9 (.49) 0.00 (.4) 0.00 (0.) 0.0 (0.) 0.0 (0.4) 0.00 (.4) TYP Lead Coplanarity : 0.004 (0.0) MAX 0.04 [.4] 0. (.00) MIN 0.40 (0.0) MIN NOTE All dimensions are in inches (millimeters) Page of 4

ORDERING INFORMATION Example: X Y X Packaging Option T: 0.4 Lead Spacing S: Surface Mount Lead Bend SR: Surface Mount Tape and Reel (000 per reel) Y V: VDE tested Carrier Tape Specifications ("R" Taping Orientation) K 0 t P 0 P D 0 E W B 0 A 0 W F d User Direction of Feed P D Description Symbol Dimension in mm Tape Width W.0 ± 0. Tape Thickness t 0.0 ± 0.0 Sprocket Hole Pitch P 0 4.0 ± 0. Sprocket Hole Diameter D 0. ± 0.0 Sprocket Hole Location E. ± 0.0 F. ± 0. Pocket Location P 4.0 ± 0. Pocket Pitch P.0 ± 0. A 0 0.0 ±0.0 Pocket Dimensions B 0 0.0 ±0.0 K 0 4.90 ±0.0 Cover Tape Width W. ± 0. Cover Tape Thickness d 0. max Max. Component Rotation or Tilt 0 Min. Bending Radius R 0 Page of 4

Fig. Recommended IR Reflow Profile Peak reflow temperature Time of temperature higher than 4 C Number of reflows 0 C (package surface temperature) 40 seconds or less Three 00 0 s 0 0 4 Temperature ( C) 00 0 00 40 s 0 0 00 0 Time (s) 00 0 Page of 4

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Page 4 of 4