Whites, EE 320 Lecture 36 Page 1 of 11 Lecture 36: MOSFET Coon Drain (Source Follower) Aplifier. The third, and last, discrete-for MOSFET aplifier we ll consider in this course is the coon drain aplifier. This type of aplifier has the input signal fed at the gate siilar to the CS aplifier but the signal output is taken at the source terinal, as shown in Fig. 1: (Fig. 1) (Sedra and Sith, 5 th ed.) Sall-Signal Aplifier Characteristics We ll calculate the following sall-signal quantities for this MOSFET coon gate aplifier: R in, A, A o,, i, A is, and R out. To begin, we construct the sall-signal equialent circuit: 2017 Keith W. Whites
Whites, EE 320 Lecture 36 Page 2 of 11 D R sig i i g gs i g =0 + + + sig i - - R gs - S 1/g o R in R out R L r o i o (Fig. 2) Because the drain terinal is an AC ground, one end of the output resistance r o was shifted so it appears in parallel with R L. This akes the T odel particularly well suited for the CD aplifier since r o appears in series with 1 g. (Recall that we did the sae thing in Lecture 21 for the r o of the BJT coon collector aplifier.) Input resistance, R in. With ig 0, we can see directly fro this sall-signal equialent circuit that R R (1) in Partial sall-signal oltage gains, A and A o. At the output side of the sall-signal circuit with ig 0 o ggs ro (2) At the input, using oltage diision 1 g gs i (3) 1 g R r L o
Whites, EE 320 Lecture 36 Page 3 of 11 Substituting (3) into (2), gies the partial sall-signal AC oltage gain to be o ro A (7.125),(4) i ro 1 g Notice that if r o R L and 1 g then A 1 (7.126) In the case of an open circuit load ( ), the sall-signal partial oltage gain becoes ro Ao A (5) r 1 g Oerall sall-signal oltage gain,. Using oltage diision at the input to the sall-signal equialent circuit Rin i Rin Rsig sig (6) Substituting this into o i o i sig sig i sig A (7) and using (1) and (4) gies the oerall sall-signal oltage gain of this coon drain aplifier to be o R ro (8) sig R R sig R L r o 1 g Again, notice that if r o R L and 1 g, as well as R R, then sig A o
Whites, EE 320 Lecture 36 Page 4 of 11 1 (9) Consequently, this coon drain aplifier is often called the source follower aplifier. Oerall sall-signal current gain, i. Applying current diision at the output and noting that ig 0 then ro io ggs (10) ro while at the input 1 g r i o ii gs (11) R 3 R Diiding (10) by (11) gies the oerall sall-signal AC current gain to be io ro gr i (12) i r R 1 g R r i o L L o With a little anipulation, this can be expressed as g ro R i (13) 1 g ro If r o R L and g 1, then R i (14) R L which likely is quite large.
Whites, EE 320 Lecture 36 Page 5 of 11 Short-circuit sall-signal current gain, A is. The short circuit sall-signal AC current gain can be easily deterined fro (12) with 0 as A g R (15) is i R 0 L Output resistance, R out. To deterine R out fro the sallsignal circuit aboe we set sig 0 and apply a fictitious AC oltage source x at the output as shown: g gs (Fig. 3) Notice that the gate terinal has zero oltage because sig 0 and i sig 0. By definition R out i x (16) x
Whites, EE 320 Lecture 36 Page 6 of 11 We can see that with x attached, the oltage gs will not usually be zero. This eans the current in the dependent current source is also not zero. In such instances, we would norally need to analyze this circuit to find the oltage x in ters of i x, and then apply (16) to deterine the output resistance of this aplifier. Howeer, in this case both terinals of the dependent current source are grounded so it akes no contribution to the output resistance. It s as if the dependent current source can be replaced by a short circuit. So then, by inspection the output resistance is siply 1 Rout ro (17) g Suary and Coparison with the BJT CE Aplifier In suary, we find for the Coon Drain MOSFET sallsignal aplifier that it s: o A non-inerting aplifier. o Potentially ery large input resistance [see (1)]. o Sall-signal oltage gain less than one, and potentially close to one [see (8) and (9)].
Whites, EE 320 Lecture 36 Page 7 of 11 o Potentially ery large sall-signal current gain [see (13) and (14)]. o Relatiely oderate output resistance [see (17)]. Siilar to the BJT coon collector (eitter follower) aplifier we discussed in Lecture 21, the coon drain (source follower) aplifier finds use in applications that require a unitygain oltage buffering function. That is, in applications where a oltage signal source has sufficient aplitude, for exaple, but it has a large internal resistance while the signal needs to be supplied to a load with a uch saller resistance. Other applications of oltage buffering aplifiers are: The output stage of a ulti-stage aplifier chain to proide a low resistance output. To separate a filter circuit fro a subsequent aplifier circuit that loads the filter with a arying ipedance load, which will likely adersely affect the filter behaior. Exaple N36.1 Use the circuit of Fig. 4 to design a coon drain aplifier. Assue R sig 1 M 15 k, and ro 150 k. Copute R in, A o, A,, i, and R out both with and without considering r o.
Whites, EE 320 Lecture 36 Page 8 of 11 This is the sae DC biasing circuit we used in Exaple N34.1 for the design of a coon gate aplifier. Here we re going to use it as the basis for a coon drain aplifier. The DC analysis results are shown in Fig. 4: (Fig. 4) (Sedra and Sith, 5 th ed.) Using (7.42) g 2I D 20.5 1 V 2.5 1.5 OV S Based on this DC biasing, the corresponding coon drain aplifier circuit is:
Whites, EE 320 Lecture 36 Page 9 of 11 Notice the addition of the bypass capacitor on the drain terinal of the MOSFET. This was added so that R D will affect only the DC functionality of the circuit. In the AC operation, the drain terinal will be an AC ground, which fits the analysis presented in this lecture. The sall-signal equialent circuit for this aplifier is then: g gs Fro (1), Rin R 4.7 M (with and without r o ).
Whites, EE 320 Lecture 36 Page 10 of 11 1 3 Fro (17), Rout ro 150k 10 0.993 k (w/ r o ), or g 1 Rout 1 k (w/o r o ). g ro 150k V Fro (5), Ao 0.9993 3 ro 1 g 150k 1 10 V V or Ao 1 (w/o r o ). V (w/ r o ), o 15k 150k V Fro (4), A r 0.932 3 ro 1 g 15k 150k 10 V (w/ r o ), or A ro 15k V 0.938 3 R r 1 g (w/o r o ). 15k 10 V L o Fro (8), R ro 4.7M 15k 150k R Rsig ro 1 g 4.7M 1M 15k 150k 10 V R 0.768 (w/ r o ), or V R Rsig 1 g 4.7M 15k V 0. 773 (w/o r 3 o ). 4.7M 1M 15k 1 0 V Fro (13), 3
Whites, EE 320 Lecture 36 Page 11 of 11 i 3 L o 10 15k 150k 4.7M 3 g ro 0k 15k 3 g R 10 15k 4.7M i 3 1g 110 15 k 15k g R r R A 313.3 1 1 10 15k 15 A (w/ r o ), or (w/o r o ). A 293.8 A