EMIF06-HSD03F3 Datasheet production data Features Flip-Chip package (17 bumps) Figure 1. Pin configuration (bump side)

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EMI filter with integrated ESD protection for micro-sd Card Features Datasheet production data Flip-Chip package ( 17 bumps) Figure 1. Pin configuration (bump side) I1 O1 Vcc I2 O2 I3 O3 I4 O4 I5 O5 I6 O6 Figure 2. Functional schematic L = 1 nh R = 1 Ω Ix Ox C LINE = 2.5 pf V CC Very low line capacitance to compensate long PCB tracks (2.5 pf typ.) High efficiency in ESD suppression up to 18 kv (IEC 61000-4-2) Very low PCB space consumption: 1.1 x 2.4 mm Ultralow leakage current: 20 na max. Very thin package: 0.605 mm Smart pinout for easier PCB layout High reduction of parasitic elements through integration and wafer level packaging Lead-free package Complies with the following standards: IEC 61000-4-2 level 4 ±15 kv (air discharge) ±8 kv (contact discharge) Application SD3.0, UHS-1 SDR104 (208 MHz) Description The EMIF06-HSD03F3 chip is a highly integrated device designed to suppress EMI/RFI noise for interface line filtering. The EMIF06-HSD03F3 Flip-Chip packaging means the package size is equal to the die size. That is why EMIF06-HSD03F3 is a very small device. Additionally, this filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 18 kv. January 2014 DocID025248 Rev 2 1/10 This is information on a product in full production. www.st.com 10

I1 I2 I3 I4 I5 I6 O1 Vcc O2 O3 O4 O5 O6 Application diagram EMIF06-HSD03F3 1 Application diagram Figure 3. Schema Vcc Top layer Second layer DAT2 DAT3 CMD V CC CLK DAT0 DAT1 µsd card contacts face down µsd card contacts spring CPU Maximum distance = 50 mm 2/10 DocID025248 Rev 2

Characteristics 2 Characteristics Table 1. Absolute maximum ratings (T amb = 25 C) Symbol Parameter Value Unit V PP ESD discharge IEC 61000-4-2, level 4 for Ix pins: Air discharge Contact discharge ESD discharge IEC 61000-4-2, level 1 for Ox pins: Air discharge Contact discharge 18 18 10 10 kv T j Maximum junction temperature 125 C T OP Operating temperature range - 30 to + 85 C T stg Storage temperature range - 55 to +150 C Figure 4. Electrical characteristics (definitions) I I F Symbol Parameter V BR = Breakdown voltage I RM = Leakage current at V V RM = Stand-off voltage V CL = Clamping voltage I = Peak pulse current PP C line R = Dynamic resistance d R I/O = = Line capacitance RM Series resistance between input and ouptput V CLV BR V RM Slope: 1/R d I RM I PP V F V DocID025248 Rev 2 3/10

Characteristics EMIF06-HSD03F3 Table 2. Electrical characteristics (T amb = 25 C) Symbol Test conditions Min. Typ. Max. Unit V BR Data lines, I R = 1 ma 5 9 V I RM V RM = 3 V per line 20 na R I/O 1 Ω C line V line = 0 V, V osc = 30 mv, F = 1 MHz 2.5 3 pf L 1 nh Rd Dynamics resistance, t P = 100 ns IO- (positive polarity) 650 -IO (negative polarity) 320 m Ω V CC V BR I R = 1 ma 5 9 V I RM V RM = 3 V 20 na C line V line = 0 V, V osc = 30 mv, F = 1 MHz 40 pf V BR I R = 1 ma 5 9 V I RM V RM = 3 V 20 na C line V line = 0 V, V osc = 30 mv, F = 1 MHz 40 pf 4/10 DocID025248 Rev 2

Characteristics Figure 5. Attenuation versus frequency I X, O X S21(dB) 0.00-1.00-2.00-3.00-4.00-5.00-6.00-7.00-8.00-9.00 F(Hz) -10.00 100.0 k 1.0 M 10.0 M 100.0 M 1.0 G I6 I3 I2 I1 I4 I5 Figure 6. Attenuation versus frequency V CC, 0.00-7.50-15.00-22.50-30.00 S21(dB) 100.0k 1.0M 10.0M 100.0M 1.0G V CC F(Hz) Figure 7. ESD response to IEC 61000-4-2 (+8 kv contact discharge) Figure 8. ESD response to IEC 61000-4-2 (-8 kv contact discharge) 20.0 V / Div 1 109.6 V 10.0 V / Div 1 V CL: Peak clamping voltage 2 V CL :clamping voltage @ 30 ns 3 V CL :clamping voltage @ 60 ns 4 V CL :clamping voltage @ 100 ns 2-5.1 V 3-4.1 V 4-2.4 V 2 19.2 V 3 13.9 V 4 6.6 V 20 ns / Div 1-61.1 V 1 V CL: Peak clamping voltage 2 V CL :clamping voltage @ 30 ns 3 V CL :clamping voltage @ 60 ns 4 V CL :clamping voltage @ 100 ns 20 ns / Div Figure 9. Digital crosstalk I1-O2 Figure 10. Analog crosstalk versus frequency 1.0 V / Div P2:rise(C1) 1.99 ns P4: pkpk(c2) 1.28 ns P3: fall(c1) 1.93 ns P1: top(c1) 3.01 ns 10 ns / Div 0.00-10.00-20.00-30.00-40.00-50.00-60.00-70.00-80.00-90.00-100.00-110.00 XTalk(dB) 100.0 k 1.0 M 10.0 M 100.0 M 1.0 G I1-O2 I2-O3 V CC - Clk F(Hz) DocID025248 Rev 2 5/10

Characteristics EMIF06-HSD03F3 Figure 11. TLP measurement 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 I PP (A) y = 0.0961x 2 + 2.1437x - 4.7641 R 2 = 0.9935 V CL (V) Positive polarity Negative polarity Poly. (Positive polarity) Poly. (Negative polarity) t P =100ns T J initial=25 C 0 5 10 15 20 25 30 35 40 y = -0.0078x 2 + 2.1203x - 13.887 R 2 = 0.9956 6/10 DocID025248 Rev 2

Package information 3 Package information Epoxy meets UL94, V0 Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 12. Flip-Chip package dimensions 1.10 mm ± 40 µm 605 ± 60 µm 400 ± 40 µm 2.40 mm ± 40 µm 400 ± 40 µm Figure 13. Footprint recommendations Figure 14. Marking Copper pad Diameter: 220 µm recommended 260 µm maximum Dot, ST logo ECOPACK grade xx = marking z = manufacturing location yww = datecode Solder mask opening: 300 µm minimum (y = year ww = week) x Solder stencil opening: 220 µm recommended y x w z w DocID025248 Rev 2 7/10

Package information EMIF06-HSD03F3 Figure 15. Tape and reel specification Dot identifying Pin A1 location 0.20 ± 0.02 2.0 ± 0.05 4.0 ± 0.1 Ø 1.50 ± 0.1 1.75 ± 0.1 8.0 + 0.3 / - 0.1 2.4 7 ± 0.05 ST xxz yww ST xxz yww ST xxz yww 3.5 ± 0.05 0.69 ± 0.05 1.28 ± 0.05 4.0 ± 0.1 Note: More information is available in the application notes: AN2348, IPAD 400 µm Flip Chip: package description and recommendations for use AN1751, EMI filters: recommendations and measurements 8/10 DocID025248 Rev 2

Ordering information 4 Ordering information Figure 16. Ordering information scheme EMIF 06 - HSD 03 F3 EMI Filter Number of lines Application HSD = High speed SD card Version Version = 3 Package F = Flip Chip x = 3: Lead-free, pitch = 400 µm, bump = 255 µm Table 3. Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF06-HSD03F3 KK Flip Chip 3.4 mg 5000 Tape and reel (7 ) 5 Revision history Table 4. Document revision history Date Revision Changes 19-Nov-2013 1 Initial release 10-Jan-2014 2 Reduced size of package image on coverpage, corrected typographic error in Description. DocID025248 Rev 2 9/10

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