M65850P/FP. Digital Echo (Digital Delay) Description. Features. Recommended Operating Condition. System Configuration

Similar documents
Old Company Name in Catalogs and Other Documents

RKV502KJ. Variable Capacitance Diode for VHF tuner. Features. Ordering Information. Pin Arrangement. REJ03G Rev.1.

Silicon Planar Zener Diode for Bidirectional Surge Absorption

RJK0393DPA. Silicon N Channel Power MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings. REJ03G Rev.2.

Old Company Name in Catalogs and Other Documents

BCR08AM-12A. Triac. Low Power Use. Features. Outline. Applications. Maximum Ratings. REJ03G Rev.2.00 Nov 30, 2007

2SJ160, 2SJ161, 2SJ162

2SB739. Silicon PNP Epitaxial. Application. Outline. Absolute Maximum Ratings. REJ03G (Previous ADE ) Rev.2.00 Aug.10.

2SC1345. Silicon NPN Epitaxial. Application. Outline. Absolute Maximum Ratings. REJ03G (Previous ADE A) Rev.3.00 Sep.10.

2SB740. Silicon PNP Epitaxial. Application. Outline. Absolute Maximum Ratings. REJ03G (Previous ADE ) Rev.2.00 Aug.10.

2SK2568. Silicon N Channel MOS FET. Application. Features. Outline. REJ03G (Previous: ADE ) Rev.3.00 Sep 07, 2005

Old Company Name in Catalogs and Other Documents

Old Company Name in Catalogs and Other Documents

Old Company Name in Catalogs and Other Documents

BCR12CM-12LA. Triac. Medium Power Use. Features. Outline. Applications. Maximum Ratings. REJ03G Rev.3.00 Nov 30, 2007

Old Company Name in Catalogs and Other Documents

Old Company Name in Catalogs and Other Documents

2, T 1 Terminal 2. T 2 Terminal 3. Gate Terminal 4. T 2 Terminal 1 2 3

M51957A,B/M51958A,B. Voltage Detecting, System Resetting IC Series. Description. Features. Application. Recommended Operating Condition

Old Company Name in Catalogs and Other Documents

R1LV0808ASB 5SI, 7SI. 8Mb Advanced LPSRAM (1024k word x 8bit) Description. Features. Ordering information. REJ03C Rev

1SS120. Silicon Epitaxial Planar Diode for High Speed Switching. Features. Ordering Information. Pin Arrangement

BCR25RM-12LB. Triac. Medium Power Use. Features. Outline. Applications. Maximum Ratings. REJ03G Rev.1.00 Jul 10, 2008

Low-Voltage CMOS Logic HD74LV_A/RD74LVC_B Series

Old Company Name in Catalogs and Other Documents

= 25 C unless otherwise noted. A - Pulsed. (Note 1c) 0.9

Old Company Name in Catalogs and Other Documents

Old Company Name in Catalogs and Other Documents

2SK2937. Silicon N Channel MOS FET High Speed Power Switching. Features. Outline. REJ03G (Previous: ADE C) Rev.5.

Old Company Name in Catalogs and Other Documents

RJP4301APP-M0. Preliminary Datasheet. Nch IGBT for Strobe Flash. Features. Outline. Applications. Maximum Ratings. R07DS0749EJ0100 Rev.1.

Adjustment/control of industrial or home-use electronic equipment, such as VTR camera, VTR set, TV, and CRT display.

Old Company Name in Catalogs and Other Documents

Old Company Name in Catalogs and Other Documents

MT4160. N-Channel PowerTrench MOSFET. 60V, 9A, 10m. Absolute Maximum Ratings(TA =25. Thermal Characteristic. Package Marking and Ordering Information

Absolute Maximum Ratings (Tc = 25 C)

CR12LM-12B. Preliminary Datasheet. Thyristor. Medium Power Use. Features. Outline. Applications. Maximum Ratings. R07DS0213EJ0100 Rev.1.

Absolute Maximum Ratings (Ta = 25 C)

2SC2618. Preliminary Datasheet. Silicon NPN Epitaxial. Application. Outline. Absolute Maximum Ratings. R07DS0273EJ0400 Rev.4.00.

Old Company Name in Catalogs and Other Documents

2SK975. Preliminary Datasheet. Silicon N Channel MOS FET. Application. Features. Outline. Absolute Maximum Ratings

1 1. Gate 2. Source 3. Drain 4. Source. This Device is sensitive to Electro Static Discharge. An Adequate careful handling procedure is requested.

Item Symbol Ratings Unit Collector to emitter voltage V CES 600 V Gate to emitter voltage V GES ±30 V Collector current. Note1.

CR6PM-12A. Preliminary Datasheet. Thyristor. Medium Power Use. Features. Outline. Applications. Maximum Ratings

Washing machine, electric fan, air cleaner, other general purpose control applications

RJK6024DPD. Preliminary Datasheet. 600V - 0.4A - MOS FET High Speed Power Switching. Features. Outline. Absolute Maximum Ratings

RJH1CF7RDPQ-80. Preliminary Datasheet. Silicon N Channel IGBT High Speed Power Switching. Features. Outline. Absolute Maximum Ratings

1 2 3 E. Item Symbol Ratings Unit Collector to emitter voltage V CES 600 V Gate to emitter voltage V GES 30 V Collector current. Note1.

Item Symbol Value Unit Drain to source voltage V DSS 500 V Gate to source voltage V GSS 30 V Drain current I D 3 A Drain peak current. Note1.

APPLICATION NOTE. Introduction. Features. Theory of Operation. Conclusions. Typical 3.3V Performance

Item Symbol Value Unit Drain to source voltage V DSS 600 V Gate to source voltage V GSS 30 V Drain current. Note4. Note1. Note1. Note3.

10-Bit A/D Converter: Example of Settings for Conversion in Single Mode

BCR2PM-14LE. Preliminary Datasheet. Triac Low Power Use. Features. Outline. Applications. Precautions on Usage. Maximum Ratings

1. Driver Functional Principle Receiver Functional Principle... 4

1 2 3 E. Item Symbol Ratings Unit Collector to emitter voltage V CES 600 V Gate to emitter voltage V GES ±30 V Collector current Tc = 25 C I C 85 A

Type No. Access time Package R1RW0416DGE-0PI 10ns. 400-mil 44-pin plastic SOJ (44P0K) R1RW0416DGE-2PI 12 ns R1RW0416DSB-0PI 10 ns

Item Symbol Ratings Unit Collector to emitter voltage V CES 600 V Gate to emitter voltage V GES ±30 V Collector current. Note2

NPN Epitaxial Silicon RF Transistor for High-Frequency Low-Noise Amplification 3-pin super Minimold Jun 29, 2011

RJP30E3DPP-M0. Preliminary Datasheet. Silicon N Channel IGBT High Speed Power Switching. Features. Outline. Absolute Maximum Ratings

USER S MANUAL. Reference Documents. Key Features. Amplifier Configuration. Power Supplies (Figure 1) ISL2819xEVAL1Z. (Figure 2) Evaluation Board

RJK03M5DNS. Preliminary Datasheet. Silicon N Channel Power MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings

CR8PM-12B Features Outline Applications Maximum Ratings Voltage class Parameter Symbol Unit

2SB1691. Preliminary Datasheet. Silicon PNP Epitaxial Planer Low Frequency Power Amplifier. Features. Outline. Absolute Maximum Ratings

HD74LV2G66A. 2 channel Analog Switch. Description. Features. REJ03D Z (Previous ADE C (Z)) Rev.4.00 Sep

2SJ181(L), 2SJ181(S) Preliminary Datasheet. Silicon P Channel MOS FET. Description. Features. Outline. Absolute Maximum Ratings

R1RP0416D Series. 4M High Speed SRAM (256-kword 16-bit) Description. Features. Ordering Information. REJ03C Z Rev Mar.12.

QFET TM MT3206A. 60V N-Channel MOSFET ! " Absolute Maximum Ratings T C = 25 C unless otherwise noted. Thermal Characteristics

HA12134A, HA12135A, HA12136A

TABLE 1. POLYPHASE DECIMATE-BY-2.5 CLOCKS FUNCTION CIC

HD74HC4060FPEL. 14-stage Binary Counter. Description. Features. Function Table. REJ03D (Previous ADE ) Rev.2.

L1A. Freq. SS Comp GND GND GND. C5 27nF. C6 4.7nF. R3 10k. FIGURE 1. ISL97656 SEPIC SCHEMATIC FOR 3V to 12V IN TO 3.3V OUT AT 1A

Preliminary Data Sheet

RQJ0303PGDQA. Preliminary Datasheet. Silicon P Channel MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings

RJK0328DPB-01. Preliminary Datasheet. Silicon N Channel Power MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings

BCR3PM-12LA. Preliminary Datasheet. Triac. Low Power Use. Features. Outline. Applications. Maximum Ratings

Old Company Name in Catalogs and Other Documents

Unit Repetitive peak off-state voltage Note1 V DRM 800 V Non-repetitive peak off-state voltage Note1 V DSM 960 V Notes: 1. Gate open.

Item Symbol Ratings Unit Drain to Source voltage V DSS 300 V Gate to Source voltage V GSS ±30 V Drain current I D 88 A Drain peak current.

S7G2 MCUs Oscillation Stop Detection using CAC

RNA51953A, B Description Features Package Taping Abbreviation Surface Part Name Package Type Package Code Abbreviation (Quantity) Treatment

X I, X R, X I, X R. Clock 1: X R (0) C R (3)+X R (1) C R (2)+X R (2) C R (1)+X R (3)C R (0

CR02AM-8. Thyristor. Low Power Use. Features. Outline. Applications. Maximum Ratings. REJ03G Rev.1.00 Aug Planar Passivation Type

RQJ0203WGDQA. Preliminary Datasheet. Silicon P Channel MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings

RJK1054DPB. Preliminary Datasheet. 100V, 20A, 22m max. Silicon N Channel Power MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings

The NP20N10YDF is N-channel MOS Field Effect Transistor designed for high current switching applications. Part No. Lead Plating Packing Package

FIGURE 1. BASIC STABILIZED OSCILLATOR LOOP

RNA51957A, B Description Features Package Taping Abbreviation Surface Part Name Package Type Package Code Abbreviation (Quantity) Treatment

USER S MANUAL. Reference Documents. Evaluation Board Key Features ISL28133ISENSEV1Z. Current Sense Gain Equations

RJH60F7BDPQ-A0. Preliminary Datasheet. 600V - 50A - IGBT High Speed Power Switching. Features. Outline. Absolute Maximum Ratings

Introduction... 2 Optocoupler Overview... 3 Effects of System Transients... 3 Effects of EMI... 6 Conclusion... 6

Old Company Name in Catalogs and Other Documents

BCR40RM-12LB. Preliminary Datasheet. Triac Medium Power Use. Features. Outline. Applications. Maximum Ratings. R07DS0516EJ0100 Rev.1.00.

Part Number Lead Plating Packing Package UPA603CT-T1-A/AT -A : Sn-Bi, -AT : Pure Sn 3000p/Reel SC-74 (6pMM)

RMLV0808BGSB - 4S2. 8Mb Advanced LPSRAM (1024k word 8bit) Description. Features. Part Name Information. R10DS0232EJ0200 Rev

Old Company Name in Catalogs and Other Documents

RJH60D2DPP-M0. Preliminary Datasheet. 600V - 12A - IGBT Application: Inverter. Features. Outline. Absolute Maximum Ratings. R07DS0160EJ0400 Rev.4.

RJK0653DPB. Preliminary Datasheet. 60V, 45A, 4.8m max. Silicon N Channel Power MOS FET Power Switching. Features. Outline.

M62342P/FP, M62343P/FP

HD74LS191FPEL. Synchronous Up / Down 4-bit Binary Counter (single clock line) Features. REJ03D Rev.2.00 Feb

HD74LV1GW16ACME W J. Data Sheet. Dual Buffer. Description. Features. Outline and Article Indication. Function Table. R04DS0032EJ0300 Rev.3.

Transcription:

Digital Echo (Digital Delay) REJ03F0171-0201 Rev.2.01 Jan 25, 2008 Description The M65850P/FP is a CMOS IC for generating echo to be added to the voice through a Karaoke microphone. It is optimal to provide the echo effect function for Karaoke player, such as radio cassette recorders, mini audio components and television sets. Increased master clock frequency assures high-performance short delay, enabling the IC to be used for Dolby prologic surround system. Features Built-in input/output filters, A/D and D/A converters, and memory realize a delay system with only a single chip. Built-in current control type clock oscillator circuit avoids clock affection outside, thus allowing prevention of undesired radiation. Delay time = 164 ms (with master clock set at 1 MHz) (Selection of delay time in a range between 15 ms and 200 ms) Small package (14-pin DIP: PRDP0014AA-A (14P4), 16-pin SOP: PRSP0016DE-A (16P2N-A)) Built-in 20 Kbit SRAM Built-in auto reset circuit (The IC reset as power is turned on) Single power supply (5 V) Recommended Operating Condition Supply voltage range: = 3.5 to 5.5 V Rated supply voltage: = 5 V System Configuration RAM L Vocal cut HPF LPF Key control MIX BASS MIX L R HPF MIX BASS MIX R MIC1 MIC AMP MIC VOL MIX MIX MIC2 MIC AMP MIC VOL Echo M65850P/FP Echo VOL Note: Dolby is the registered trademarks of Dolby Laboratories Licensing Corporation. Page 1 of 11

Block Diagram M65850P 13 6 11 10 9 8 12 Oscillator D/A LPF2 1/2 DO1 Auto reset RESET Main control MO MI 20 kbit SRAM D1 DO0 LPF1 A/D 1 2 3 4 5 7 14 M65850FP 14 7 12 11 10 9 13 Oscillator D/A LPF2 NC 16 1/2 DO1 NC 1 Auto reset RESET Main control MO MI 20 kbit SRAM D1 DO0 LPF1 A/D 2 3 4 5 6 8 15 Page 2 of 11

Pin Arrangement M65850P M65850FP 1 14 V NC 1 16 CC NC 2 13 2 15 3 12 3 14 4 11 4 13 5 10 5 12 6 9 6 11 7 (Top view) Outline: PRDP0014AA-A (14P4) 8 7 8 10 (Top view) Outline: PRSP0016DE-A (16P2N-A) 9 Pin Description Pin No. P FP Symbol Name I/O Function 1 2 Low pass filter 1 input I To form input-side low pass filter by connecting external capacitor and resistor 2 3 Low pass filter 1 output O 3 4 Operational amplifier 1 output O 4 5 Operational amplifier 1 input I 5 6 Current control 1 ADM control of A/D converter 6 7 Current control 2 ADM control of D/A converter 7 8 8 9 Low pass filter 2 output O 9 10 Low pass filter 2 input I 10 11 Operational amplifier 2 output O 11 12 Operational amplifier 2 input I 12 13 Reference Analog reference voltage 1/2 To form A/D conversion integrator by connecting external capacitor To form input-side low pass filter by connecting external capacitor and resistor To form D/A conversion integrator by connecting external capacitor 13 14 Clock generator input I To form clock generator by connecting external resistor 14 15 Supply voltage To apply 3.5 to 5.5 V power (Rated voltage: 5 V) 1, 16 NC No connection Page 3 of 11

Absolute Maximum Ratings (Ta = 25 C, unless otherwise noted) Item Symbol Ratings Units Conditions Supply voltage 6.0 V Circuit current I CC 100 ma Power dissipation Pd 800 (P), 550 (FP) mw Operating temperature Topr 20 to 75 C Storage temperature Tstg 40 to 125 C Recommended Operating Condition Limits Item Symbol Min Typ Max Unit Conditions Supply voltage 3.5 5 5.5 V Clock frequency fck 0.8 11.0 MHz Electrical Characteristics ( = 5 V, f = 1 khz, Vi = 100 mvrms, fck = 1 MHz, Ta = 25 C, unless otherwise noted) Limits Item Symbol Min Typ Max Unit Test Conditions Circuit current I CC 5 13 25 ma No signal input Voltage gain G V 3.0 0 3.0 db R L = 47 kω Maximum output voltage Vomax 0.7 1.0 Vrms THD = 10% Total harmonic distortion THD 1.2 3.0 % 30 khz LPF Output noise voltage No 85 70 dbv DIN-AUDIO Clock frequency fck 0.85 1 1.15 MHz R C = 120 kω Page 4 of 11

Function Description 1. Delay time Td The delay time can be calculated by the equation: Td = 8N / fck (N = the number of memory bits = 20480) When fck = 1 MHz (fs = 125 khz), Td can be set at 164 ms. <Reference> The M65850P/FP adopts ADM (Adaptive Delta Modulation) system in A/D, D/A converters. The sampling frequency can be calculated by the following equation: fs = clock frequency / 8 (Hz) For clock frequency (fck ) = 1MHz, the calculated sampling frequency is : fs= 1 MHz / 8 = 125 khz 2. Clock oscillator circuit The M65850P incorporates a current control type clock oscillator circuit in it, thus providing circuit configuration just by connecting a resistor for current control to pin 13 (FP: pin 14). Fully internal clock supply prevents occurrence of undesired radiation without affecting any external circuit. The oscillator frequency is: fck = 1 MHz (R C = 120 kω) The resistor for current control can be calculated using the following equation. Rc K / Clock frequency (fck) [Ω] R C * 13 * (FP: 14) Clock oscillator circuit Clock frequency: fck K is the coefficient, and changes according to clock frequency, as shown below. ( = 5 V, Ta = 25 C) Delay Time (ms) Clock Frequency (Hz) K Value R C (Ω) 15 to 30 11.0 M to 5.5 M 0.8 10 11 7.5 k to 31 to 100 5.3 M to 1.64 M 1.0 10 11 18 k to 62 k 101 to 200 1.62 M to 800 k 1.2 10 11 75 k to 150 k Page 5 of 11

3. Input/output LPF It is necessary to change the LPF setting (signal pass band, fsig) of digital echo according to the clock frequency. (Refer to the table below) LPF1 LPF2 1 * 2 * * (FP: 2) C2 * (FP: 3) 9 * 8 * * (FP: 10) C2 * (FP: 9) R1 R2 R1 R1 R2 R1 C1 C1 1 fsig = 2π C1 C2 R1 R2 Delay Time (ms) Clock Frequency (Hz) ( = 5 V, Vi = 100mVrms, f = 1 khz, Ta = 25 C) LPF Signal Pass Band (Hz) R1 (Ω) R2 (Ω) C1 (F) C2 (F) Distortion (Reference Value) (%) 15 to 30 11.0 M to 5.5 M 7 k 3300 p 680 p 0.2% (Td = 20 ms) 31 to 100 5.3 M to 1.64 M 5 k 13 k 13 k 4700 p 1000 p 0.3% (Td = 50 ms) 101 to 200 1.62 M to 800 k 3 k 1.2% (Td = 160 ms) 4. Mute When power is turned on, the mute function works automatically to prevent noise generation. (Here, however, mute means the function which prevents noise generation after the reset time.) Power on time Reset period Mute period (about 260 ms) Mute off time When power is ON (fck = 1 MHz) Page 6 of 11

Test Conditions Item Symbol S1 S14 Remarks Circuit current I CC 2 2 No-signal time Voltage gain between input and output G V 1 1 R L = 47 kω Maximum output voltage Vomax 1 1 THD = 10% Output distortion THD 1 1 30 khz LPF Output noise voltage No 2 1 DIN-AUDIO Page 7 of 11

Test Circuit M65850P 47 μ (2) S14 A (1) 0. 47 μ 120 k 47 k 14 13 12 11 10 9 8 Vo (2) (1) 51 S1 1 2 3 4 5 6 7 0.22 μ 0.22 μ Vi M65850FP 47 μ (2) S15 A (1) 0. 47 μ 120 k 47 k 16 15 14 13 12 11 10 9 Vo NC NC (2) (1) 51 S2 Vi 1 2 3 4 5 6 7 8 0.22 μ 0.22 μ Units R: Ω C: F Page 8 of 11

Application Example 1. Echo Delay time 164 ms (Signal pass band 3 khz) M65850P OUT 47 μ 0. 47 μ 120 k 14 13 12 11 10 9 8 1 2 3 4 5 6 7 0.22 μ 0.22 μ IN 0.15 μ 50 k Feedback gain setting volume M65850FP OUT 47 μ 0. 47 μ 120 k 16 15 14 13 12 11 10 9 NC NC 1 2 3 4 5 6 7 8 0.22 μ 0.22 μ IN 0.15 μ 50 k Feedback gain setting volume Units R: Ω C: F Page 9 of 11

2. Surround Delay time 20 ms (Signal pass band 7 khz) M65850P 3300 p OUT 47 μ 0. 47 μ 11 k 0.047 μ 680 p 14 13 12 11 10 9 8 1 2 3 4 5 6 7 680 p 0.15 μ 0.15 μ IN 0.047 μ 3300 p M65850FP 3300 p OUT 47 μ 0. 47 μ 11 k 0.047 μ 16 680 p 15 14 13 12 11 10 9 NC NC 1 2 3 4 5 6 7 8 680 p 0.15 μ 0.15 μ IN 0.047 μ 3300 p Units R: Ω C: F Page 10 of 11

Package Dimensions JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-DIP14-6.3x19-2.54 PRDP0014AA-A 14P4 1.0g 14 8 *1 E e1 1 7 *2 D c NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. L A SEATING PLANE e *3 b3 bp A1 A2 Dimension in Millimeters Min Nom Max e 1 7.32 7.62 7.92 D 18.8 19.0 19.2 E 6.15 6.3 6.45 A 4.5 A 1 A 2 0.51 3.3 b p 0.4 0.5 0.6 b 3 1.4 1.5 1.8 c 0.22 0 0.27 0.34 15 e 2.29 2.54 2.79 L 3.0 Reference Symbol JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-SOP16-5.3x10.1-1.27 PRSP0016DE-A 16P2N-A 0.2g 16 9 *1 H E E F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1 8 Index mark A2 A1 A e *2 D y *3 bp c Detail F L Reference Dimension in Millimeters Symbol Min Nom Max D 10.0 10.1 10.2 E 5.2 5.3 5.4 A 2 1.8 A 1 0 0.1 0.2 A 2.1 b p 0.35 0.4 0.5 c 0.18 0.2 0.25 0 8 H E 7.5 7.8 8.1 e 1.12 1.27 1.42 y 0.1 L 0.4 0.6 0.8 Page 11 of 11

Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products. 7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above. 8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges. 10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products. Renesas shall have no liability for damages arising out of such detachment. 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas. 13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have any other inquiries. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2377-3473 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 2008. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon.7.2