Detailed Characterisation of a New Large Area CCD Manufactured on High Resistivity Silicon

Detailed Characterisation of a New Large Area CCD Manufactured on High Resistivity Silicon Mark S. Robbins *, Pritesh Mistry, Paul R. Jorden e2v technologies Ltd, 106 Waterhouse Lane, Chelmsford, Essex CM1 2QU, UK ABSTRACT e2v technologies has developed Hi-Rho devices manufactured on very high resistivity silicon. Special design features have been included that enable extremely high gate to substrate potentials to be applied without significant current leakage between back and front substrate connections. The approach taken allows the usual design rules for low noise output amplifier circuitry to be followed. Thus low noise devices very sensitive to red and near infrared wavelengths can be manufactured. This paper reports on the detailed characterisation of the large format Hi-Rho sensor designed for astronomical applications and extends the data previously reported to include detailed assessment of the CTE, spatial resolution, dark signal and cosmetic quality. The influence of the base material has also been investigated with devices manufactured on silicon from two different manufacturers. Measurements of the quantum efficiency from devices utilising a newly developed antireflection coating process are presented. Keywords: CCD, High resistivity, Hi-Rho, Red, Astronomy, PSF, depletion 1. INTRODUCTION Scientific CCDs are usually manufactured on epitaxial silicon having an epitaxial layer thickness in the order of 20 µm. For back thinned devices the substrate is removed, leaving an active thickness between 10 µm and 20 µm. Once the back surface is treated to minimise reflections, and to encourage efficient charge collection, almost ideal quantum efficiency can be achieved. However, this is only obtained for photon wavelengths around the visible band. At longer wavelengths the absorption length in silicon increases, limiting the fraction of photons absorbed. If high sensitivity imaging is required at these long wavelengths the silicon thickness can be increased. If good spatial resolution is to be maintained an electric field must be present across as much of the active silicon depth as possible. This is usually achieved by using a higher resistivity active silicon material for the thicker devices, providing a larger depletion region. This has enabled the manufacture of devices having an active thickness as high as 50 µm whilst maintaining good resolution using the usual biases and clocking levels. This thickness is around the maximum that is practical for the epitaxial silicon usually used in the manufacture of high quality CCDs. However, further increase in thickness is often necessary, especially for the imaging of photons having energies close to the silicon band gap, where the absorption length is increasing rapidly with wavelength. The use of bulk silicon, rather than epitaxial silicon, enables even thicker devices to be manufactured. Even higher resistivity material is required but the challenge remains how to provide sufficient field throughout the depth of the device to maintain resolution for the most demanding applications. e2v technologies has developed Hi-Rho devices manufactured on very high resistivity silicon. Special design features have been included that enable extremely high gate to substrate potentials to be applied without significant current leakage between back and front substrate connections. Thus over depletion and short signal electron drift times can be achieved that provide excellent spatial resolution. The approach taken allows the usual design rules for low noise output amplifier circuitry to be followed thus low noise devices very sensitive to red and near infrared wavelengths can be manufactured. This paper reports on the characterisation of the large format Hi-Rho sensor designed for astronomical applications, designated the CCD261, and extends the data reported previously 1. * mark.robbins@e2v.com; phone +44 (0)1245 493493; www.e2v.com

2. THE E2V CCD261 DEVICE The CCD261 series of image sensors are designed for high performance astronomical and scientific imaging, especially requiring exceptional red wavelength sensitivity. They are designed to be built from high-resistivity bulk silicon, having an active thickness in excess of 100 µm. They are back-thinned for maximum quantum efficiency and are combined with highly efficient anti-reflection coatings. Different size devices can be manufactured and the first device available is the CCD261-84. The device has been designed to complement the widely used CCD44-82 standard silicon astronomical sensor, which has a 2048 by 4096, 15 µm pixel format in a buttable precision package. The CCD261-84 has the same format and package design and very similar operation apart from the requirement of a back bias high voltage (BSS) for full depletion. Figure 1 illustrates the architecture of the device. B1 B2 B3 Image Section B 2048 x 2048 pixels Each 15 µm square B1 B2 B3 A1 A2 A3 Image Section A 2048 x 2056 pixels Each 15 µm square A1 A2 A3 TGA TGA OSE Register section E E1 E2 EF3 F2 F1 Register section F OSF Figure 1. The Schematic layout of the e2v CCD261 device. Primary features include - back substrate bias voltage up to -70V to ensure full depletion of the thick silicon; separate image and store clock zones (for frame-transfer operation if desired); two very low noise outputs; operation up to 1 MHz readout rate; precision 4-side buttable package design for mosaic use; high performance for scientific imaging and designed for operation at cryogenic temperatures (-110 o C nominal). Performance is comparable to that obtained from standard CCD types (e.g. CCD44-82) but with significantly improved red response. Other device formats are planned including the CCD261-88 4k by 4k Hi-Rho device.

3. EXPERIMENTAL SETUP CCD261 devices, mounted in their precision packages, were characterised outside the main clean room production facility. A flexible test system which utilises a headboard/motherboard arrangement was used for this assessment. This allows for any device type in any package format to be run but is not optimised for noise performance. The devices are mounted within a vacuum chamber and can be cooled to -120 o C using a CryoTiger. The biases and clocks are supplied using in-house developed custom electronics, providing the required flexibility. The CCD261 devices for this study were operated at a pixel rate of 500 khz through one or both output circuits. An Fe 55 x-ray source could be included within the vacuum chamber for CTE analysis. Optical input was available, enabling a demagnified test chart to be focused onto the device, with both incandescent and LED light sources available. The quantum efficiency was measured using a separate test system utilising a monochromator for the light source with the device operated as a gated photodiode. 4. TEST RESULTS 4.1 Depletion and Resolution The resistivity of the substrate determines the biases required for full depletion. Devices characterised here were manufactured on p-type material from two different manufacturers. The materials will be referred to as Material 1 and Material 2. The procurement specification for Material 1 was for a resistivity of greater than 3 kωcm and Material 2 had a specified resistivity greater than 5 kωcm. For both material types the device thickness was measured to be 150+/-5 µm, using standard optical interference techniques. The spatial resolution of the sensors was assessed using a technique routinely used in production at e2v. A narrow slit was focused onto the device and arranged at a slight angle to the direction of the columns. The response of each row represents a sample of the line spread function. The slit position as a function of row number was obtained through a linear least squares fit. This is used to combine the response from the rows by aligning the central position of the slit for each row. Thus sub pixel sampling of the line spread function can be acquired. This is equivalent to the point spread function (PSF) provided that the PSF is the same in the row and column direction. A slit image obtained for the device manufactured on Material 2 is given in Figure 2. Here the slit was illuminated with light having a wavelength of 450 nm. The attenuation length for photons of this wavelength interacting in silicon is only around half a micron, implying that most of the signal will be generated close to the input surface of the device. Figure 2b shows a broadened slit image for the device biased with a zero back substrate potential compared with that of Figure 2a where the device was biased with a back substrate potential of -100 Volts. Figure 2. Slit images used to extract the line/point spread function for devices manufactured on Material 2. In a) the back substrate bias is set to -100 Volts and in b) it is 0 Volts. The extracted point spread functions for these two cases are given in Figure 3. These are total point spread functions and include the response due to the discrete sampling of the device convolved with the response from broadening due to lateral charge diffusion within the device. This is also convolved with the non ideal PSF of the measurement system, including optical and vibrational effects. This component was assessed by extracting the point spread function from front

illuminated devices. In this case all the optically generated signal is collected from close to the buried channel therefore broadening due to diffusion should be minimal. The measurements on front illuminated devices give a system PSF having a Gaussian distribution with a standard deviation of around 4 µm. Deconvolving this and the geometric pixel response from the total response of the back illuminated devices, leaves the lateral diffusion component. The standard deviation of the total PSF and the diffusion PSF from devices manufactured on the two different materials is shown in Figure 4. Figure 3. The extracted total PSF of a device manufactured on Material 2. Two of the clock phases are held at +12 Volts during integration with the third being held at 0 Volts. The solid lines result from a fit to a Guassian distribution. Figure 4. The standard deviation of the total and the diffusion PSFs for both material types. From the PSF measurements it can be seen that the device manufactured on Material 1 depletes at a back substrate bias around -40 Volts (with two phases held at +12 Volts). The PSF width as a function of back substrate bias when the device is not fully depleted can be used to calculate the material resistivity as discussed in reference [2]. Here it was

shown that the standard deviation of the PSF due to diffusion in the undepleted silicon is simply 0.8616 multiplied by the depth of undepleted silicon. Using this relationship, and knowing the buried channel implant parameters and threshold voltages through measurements on test transistors, enables the width of the PSF to be calculated for a given material resistivity. The measured PSF width is consistent with a material resistivity of 3.1 kωcm, as shown in Figure 4. It appears that the device on Material 2 fully depletes at a back substrate bias just under 0 Volts. This implies that the material resistivity is around 9 kωcm, significantly above the minimum of 5 kωcm specified. These calculations can be an approximation only as one of the phases is held at 0 Volts during integration. This will influence the depletion depth extended from the other two phases, reducing the depth and leading to an underestimate of the material resistivity. Also no account has been made of the column isolation regions which will have a similar effect. The decrease in the PSF width at lower (more negative) back substrate biases, when the device is said to be over depleted, is caused by the reduced lateral diffusion due to the increased drift velocity of the signal electrons. For both material types, the standard deviation of the PSF due to lateral diffusion when a back substrate bias of -100 Volts is applied is around 5 µm. The influence of the un-depleted silicon on the imaging performance of the device can be seen clearly by observing the cosmic particle interactions. The CCD261 is a large area device therefore many cosmic particle interactions can be detected even for quite short integration times. As the devices are manufactured on thick silicon many of the interactions leave charge particle tracks traversing several pixels. Analysis of the cosmic particle interactions can be used as an additional measure of the device thickness and also an estimate of the depletion depth and thus resistivity. The characteristics of the charge tracks are varied but those producing straight tracks are of most interest here. For a 5 minute integration around 250 cosmic particle interactions are observed of which around 5% are useful for further analysis. Some of the population of cosmic particle interactions originates from high energy charged particles, said to be minimum ionising. Minimum ionising particles deposit a mean energy of 1.66 MeVg -1 cm 2 along their track and the interactions can be observed as signal tracks having a signal density of around 106 electrons per micron. When a device is fully depleted the track is straight and broadens very slightly as the track extends from the electrode side of the device, as shown in Figure 5a. The thickness of the device can be estimated from simple geometry once the total amount of charge in the track and the number of pixels traversed by the particle is known. Using this technique the device thickness has been measured to be around 150 +/- 20 µm, consistent with the standard measurement method. If the device is not fully depleted the portion of the track extending into the un-depleted silicon is broadened significantly. This is shown in Figure 5b. Figure 5. Minimum ionising particles traversing a device manufactured from Material 1. In a) the back substrate bias is - 100V and in b) the bias is set to 0 Volts. The ratio of the charge in the well-defined portion of track to the total amount of charge in the track gives the proportion of the total silicon depth that is depleted. This, multiplied by the silicon thickness, gives the depletion depth. A plot of the estimated effective depletion depth versus back substrate bias for Material 1 is given in Figure 6. The measurements were taken with two of the three phase image clocks held at 12 Volts during integration, holding the third phase at

0 Volts. Also shown in the figure is the calculated depletion depth for a 12 Volt gate potential and a material resistivity of 3.1 kωcm. Figure 6. The measured and calculated depletion depths as a function of back substrate bias for a device manufactured on Material 1. The measurements were made using tracks from cosmic particle interactions. This technique for estimating the depletion depth, and thus resistivity of the material, is simple and the depletion depths measured are in line with those estimated from the PSF measurements. However, there may be significant systematic uncertainties and it is likely that the depletion depth is overestimated due to signal in the diffused tail lost to the noise and non ideal charge collection efficiency from the undepleted silicon. The devices manufactured on Material 2 were almost fully depleted at a back substrate potential of 0 Volts and the experimental uncertainty in this technique for measuring the depletion depth meant that it could not be used reliably for these devices. 4.2 Dark Signal and Cosmetic Quality The mean dark signal for devices manufactured on the two different materials has been measured. Typical results are shown in Figure 7. No significant differences have been observed between the two material types and dark signal is in line with that measured on devices manufactured on standard resistivity silicon. The temperature dependence indicates that the dark signal is dominated by thermal generation from interface states (i.e. the surface dark signal from non inverted mode operation). More devices will need to be evaluated before a defect specification for production devices can be settled upon. However, it is clear that scientific quality performance is readily achievable. At a back substrate bias of -70 Volts the defect density, both column and point defects, is of the same order as conventional devices. This is an excellent result as the Hi-Rho devices are manufactured on bulk material and so do not benefit from the intrinsic gettering of impurities into the substrate of the epitaxial material used for conventional devices. There were no notable differences between devices manufactured on the two different material types. The mean dark signal increases slightly as the back substrate bias is increased. The most notable bias dependence is observed in the generation rate of the bright point defects. The back substrate bias dependence of typical bright pixel defects for a device manufactured on Material 2 is shown in Figure 8, where the behaviour of six different defective pixels are plotted. A range of dependencies are observed and it is likely that the actual bias dependence is influenced by the position, within the volume of the silicon, of the defect causing the high generation rate.

Figure 7. Mean dark signal as a function of temperature for a back substrate bias of -70 Volts. The solid line represents the equation in the figure and is typical of dark signal from e2v's non inverted mode devices. Figure 8. The generation rate of bright point defects in a device manufactured using Material 2. The temperature was minus 120 o C. 4.3 Charge Transfer Efficiency A conventional method for assessing the charge transfer efficiency (CTE) of a device is through the use of a stacked line trace. In this technique the CCD is exposed to an Fe 55 x-ray source from which the dominant emitted x-rays are due to the Mn K alpha transition giving a mean x-ray energy of 5.899 kev. When these are absorbed in the CCD they generate

a mean signal of 1600 electrons at -100 o C. Noting the signal lost from the spectral peak as a function of number of transfers the charge transfer efficiency in both the parallel and serial transfer directions can be calculated. The CCD261 has a particularly small pixel relative to the silicon depth and so split events, where the signal generated from each x-ray interaction is spread over several pixels, dominate. In this case a single spectral peak is not available for the assessment of the CTE. This is shown in the x-ray spectrum presented in Figure 9. The spectral information can be recovered somewhat by combining pixels (binning), the effects of which are also shown in the figure. Spectral performance is improved significantly by a simple split event reconstruction process where a 3x3 pixel sub array is checked for a possible x-ray event occurring at its centre (i.e if the central pixel contains the highest signal level within the sub array). If an event has occurred, all the data within the sub array is moved to the central pixel. This sub array is scanned across all the pixels in the image. The resultant spectra obtained from the reconstructed image is also shown in Figure 9. Unfortunately the original x-ray images suffered from some spurious pickup noise in the video chain electronics, giving a total noise of 18 electrons. Thus the peak from the Mn K beta transition is not clearly separate from the main Mn K alpha peak. However a stacked line trace can be generated from this data. The stacked line trace for the parallel direction is presented in Figure 10. Figure 9. Fe 55 X-ray spectra obtained from a CCD261 manufactured on Material 1 with a back substrate bias of -70 Volts and at a temperature of -120 o C. The CTE is obtained from Figure 10 by dividing the gradient of a linear fit to the peak position as a function of row number by the signal at the spectral peak in the first row. In this case the parallel CTE was calculated to be 0.9999963±0.0000003. A similar plot for the serial direction gives a CTE of 0.9999997±0.0000006. Both values refer to the CTE for the complete clock triplet. No difference in CTE values have been measured on devices manufactured on Material 2. It is possible that the act of reconstructing the split events affects the measurement of the CTE. As an indication of any significant effects, measurements were made using the 3x3 binned data, from which very similar CTE values where obtained, within the errors of the measurement. A more detailed analysis was beyond the scope of this work.

Figure 10. A stacked line trace in the parallel direction for a CCD261 manufactured on Material 1 with a back substrate bias of -70 Volts and at a temperature of -120 o C. The reconstructed x-ray image has been used. 4.4 Output Amplifier Characteristics The two output circuits are conventional 2 stage scientific type amplifiers with the second stage AC coupled, as shown schematically in Figure 11. The use of the front substrate connections meant that the usual design rules for low noise amplifiers could be employed. The amplifier is designed to achieve a low frequency noise floor of about 2 electrons after correlated double sampling. At a readout frequency of 500 khz the measured noise has been given previously as ~ 3.5 r.m.s. electrons 1, in line with expectation. The test system used for this work has not been optimised for noise so no further analysis has been undertaken. RØ1 RØ2 SW OG ØR RD TGA OD Reset Clamp C N OS Output First stage load External load Signal charge Node 0V FS BS Figure 11. A schematic of the output amplifiers.

Figure 12. Photon transfer curves for a device manufactured on Material 1. The temperature was -120 o C. The responsivity of the output amplifiers has been measured using the photon transfer method. Care was taken to use small signals only as non linearity in the variance versus mean plots were observed for large signals (above around 50 ke) despite the CTE being very good and the output linear, as confirmed by reset drain current measurements. Typical measurements are shown in Figure 12. This type of behaviour has been seen previously for conventional devices 3. Very similar curves are obtained for devices manufactured on Material 2. When operated with a 0 Volt back substrate bias the lateral signal diffusion is significantly worse for the devices manufactured on Material 1, as shown in a previous section. This implies that lateral diffusion has little influence on the non linearity of the variance versus mean plots, consistent with other observations 3. Further investigation of this interesting phenomenon was beyond the scope of this current work. Figure 13. Output circuit responsivity versus back substrate bias for a device manufactured on Material 2. The temperature was -120 o C.

Typical results for the responsivity as a function of back substrate bias are shown in Figure 13. The data plotted is for a device manufactured on Material 2. The devices manufactured on Material 1 showed very similar behaviour. Changing the back substrate bias from 0 Volts to -70 Volts increases the responsivity by around 10%. The increase is likely to be dominated by the small influence of the back bias on the output node capacitance. An increase of similar magnitude is observed by cooling the device from room temperature down to -120 o C. This is due to the change in the mobility of electrons in the channel of the output circuit FETs and is in common with conventional devices. Images collected following long integration times show that there is no significant optically generated signal from the output circuits. This is as expected from traditional high performance scientific type output circuits. 4.5 Quantum Efficiency New multi-layer anti-reflection coatings are under development at e2v and have been discussed in reference [1]. A coating referred to as Multi-2 is being offered as a standard coating on conventional devices for astronomy applications and will be the baseline option available for Hi-Rho sensors, as it provides excellent quantum efficiency over a broad spectral range. Measurements made on a 100 µm thick Hi-Rho sensor at room temperature are shown in Figure 14. The actual operating temperature of the Hi-Rho sensors is expected to be around -100 o C. This lower temperature will have the effect of increasing the attenuation length of the longer wavelength photons thus reducing the quantum efficiency at red and near infrared wavelengths. However, the good cosmetic quality of the 150 µm thick Hi-Rho devices presented here has shown that the cosmetic quality of even thicker devices should be acceptable and can be supplied for enhanced response at long wavelengths. Therefore the predicted quantum efficiency for a 200 µm thick device at an operating temperature of -100 o C is also shown in the figure. Figure 14. Measured quantum efficiency of a HiRho sensor with the new Multi-2 anti reflection coating. Also shown is the predicted effect of increasing the sensor thickness and operating the device at the normal operating temperature. 5. CONCLUSIONS Detailed characterisation of the e2v CCD261 device has shown that the new Hi-Rho devices provide excellent imaging performance for applications requiring high sensitivity at long wavelengths. The traditional scientific type output amplifiers perform as expected and with no light emission. The difference in performance between devices manufactured on the two different materials is only in the bias required to achieve full depletion. Minimal differences in the cosmetic quality between devices manufactured from the different materials have been seen in this work. For optimum sensitivity the thickness of production devices offered initially is to be standardised at 200 µm with the e2v Multi-2 antireflection coating applied.

ACKNOWLEDGEMENTS Thanks to Ray Bell and David Burt (both e2v) for valuable discussion and to Andrew Harris and Andrew Kelt (also e2v) for their work on the back thinning enhancements and the supply of the QE data. REFERENCES [1] Jorden, P. R., Downing, M, Harris, A., Kelt, A., Mistry, P., Patel, P., Improving the red wavelength sensitivity of CCDs, Proc. SPIE 7742, 77420J (2010). [2] Holland, S.E., Goldhaber, G., Groom, D. E., Moses, W. W., Pennypacker, C. R., Perlmutter, S., Wang, N. W., Stover, R. J., and Wei, M., Development of Back-Illuminated, Fully-Depleted CCD Image Sensors for use in Astronomy and Astrophysics, Proc. 1997 IEEE Workshop on Charge-Coupled-Devices and Advanced Image Sensors, Bruges, Belgium, June 5-7, 1997. [3] Downing, M., Baade, D., Sinclaire, P., Deiries, S., Christen, F., CCD riddle: a) signal vs time: linear; b) signal vs variance: non-linear, Proc. SPIE 6276, (2006).