DEMO MANUAL DC573A LTC Bit Micropower No Latency Delta Sigma ADC DESCRIPTION BOARD PHOTO

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DESCRIPTION This demonstration board features the LTC 00, a -bit high performance ΔΣ analog-to-digital converter (ADC). The LTC00 combines exemplary DC accuracy (INL ±ppm,.μv offset, 0.ppm noise) with an easy to use SPI interface in a SO- package. DC is a member of Linear Technology s QuikEval family of demonstration boards. It is designed to allow easy evaluation of the LTC00 and may be connected directly to the target application s analog signals while using the DC90 USB serial controller board and supplied DEMO MANUAL DCA LTC00 -Bit Micropower No Latency Delta Sigma ADC software to measure performance. The exposed ground planes allow proper grounding to prototype circuitry. After evaluating with LTC s software, the digital signals can be connected to the end application s processor/controller for development of the serial interface. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and QuikEval is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. BOARD PHOTO dcaf

DEMO MANUAL DCA QUICK START PROCEDURE Connect DC to a DC90 USB serial controller using the supplied -conductor ribbon cable. Connect DC90 to host PC with a standard USB A/B cable. Run the evaluation software supplied with DC90 or downloaded from www.linear.com/software. The correct program will be loaded automatically. Click the COLLECT button to start reading the input voltage. Details on software features are documented in the control panel s help menu. Tools are available for logging data, changing reference voltage, changing the number of points in the strip chart and histogram, and changing the number of points averaged for the DVM display. dcaf

DEMO MANUAL DCA HARDWARE SETUP JUMPERS JP: Select the reference source, either external or V from the onboard LT reference (default). JP: Select the line rejection frequency, either 0Hz or 0Hz (default.) This jumper must be removed if applying an external conversion clock to the F O turret post. JP: Trigger mode, either normal (default) or externally triggered. JP: Trigger input signal. Pin is a V logic signal, pin is ground. When triggered mode is selected on JP, a rising edge starts a new conversion. CONNECTION TO DC90 SERIAL CONTROLLER J is the power and digital interface connector. Connect to DC90 serial controller with supplied -conductor ribbon cable. ANALOG CONNECTIONS Analog signal connections are made via the row of turret posts along the edge of the board. Also, if you are connecting the board to an existing circuit, the exposed ground planes along the edges of the board may be used to form a solid connection between grounds. : Ground turrets are connected directly to the PCB s ground planes. V CC : This is the supply for the ADC. Do not draw any power from this point. External power may be applied to this point after disabling the switching supply on DC90. If the DC90 serial controller is being used, the voltage must be regulated V only, as the isolation circuitry will also be powered from this supply. Refer to the DC90 quick start guide for more details. V REF : This turret is connected to the LTC00 reference pin. If the onboard reference is being used, the reference voltage may be monitored from this point. An external ground referred reference may be connected to this terminal if JP is configured for external reference. V IN : Input voltage to the LTC00. The absolute range of the input voltage is 0.V to V CC + 0.V. The range for a valid conversion is 0. V REF to. V REF. See Figure. DCa F0 Figure. LTC00 Input Range dcaf

DEMO MANUAL DCA EXPERIMENTS OFFSET Short V IN to ground. The offset is typically less than 0.ppm of V REF, with a maximum of ppm of V REF (.μv typical and 0μV max when using a V reference.) FULL SCALE Short V IN to V REF. The full-scale error is typically less than ppm, with a maximum of 0ppm of V REF (0μV typical and 0μV max when using a V reference.) RMS NOISE Short V IN to ground. The RMS noise display indicates the RMS noise based on a number of samples that can be set in the software options. With the input shorted to ground, the indicated noise is the noise of the LTC00 input. When another source is connected, the indicated noise is the total noise of the LTC00 and the source. The USB controller powers the LTC00 from an LT low noise regulator. Although this device has exceptionally low noise for a power regulator, it may still slightly elevate the noise floor of the LTC00. For lowest noise operation, the LTC00 may be powered from the onboard LT reference by cutting the indicated trace and connecting V REF to V CC as shown in Figure. DCa F0 Figure. Proper Measurement Equipment Setup dcaf

DEMO MANUAL DCA EXPERIMENTS DCa F0 Figure. Low Noise Setup dcaf

DEMO MANUAL DCA PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER C, C, C, C CAP, XR 0.μF V, 00 AVX, 00YC0MATA C CAP, XR.μF.V, 0%, 00 TAIYO YUDEN, JMKBJMGT C CAP, XR, 0μF.V, 0%, 00 TDK, C0XR0J0M C CAP, XR 0.0μF V 0%, 00 AVX, 00YC0KATA E TO E TESTPOINT, TURRET, 0.0" MILL-MAX, 0- JP, JP, JP JMP, PIN ROW 0.09CC COMM-CON, 0S-0-G SHUNTS FOR JP, JP, JP SHUNT, 0.09" CENTER COMM-CON CCIJMM-G 0 JP JMP, HDX-09 OPT 9 J HEADER, x PIN, 0.09CC MOLEX, -0 0 R, R, R RES, CHIP.99k /W %, 00 AAC, CR-99FM R RES, CHIP 00 /W %, 00 AAC, CR-0JM 0 R RES, 00 OPT R RES, CHIP 0k /W %, 00 AAC, CR-0JM U IC, LTC00CS, SO LINEAR TECHNOLOGY, LTC00CS U IC, LTACS-, SO LINEAR TECHNOLOGY, LTACS- U IC, NCSZPX, SC0-P FAIRCHILD SEMI, NCSZPX U IC, NLSZUS, US ON SEMI, NLSZUS U IC, LC0, TSSOP- MICROCHIP, LC0-I /ST dcaf

DEMO MANUAL DCA SCHEMATIC DIAGRAM U EXT D D VREF VIN E E JP VREF V VOUT VREF VIN TRIM VOUT NC NC NC VIN NC LTACS- C C TRIG IN JP OPT C 0.UF 0Hz 0Hz TRIGGERED NORMAL V+ SCK MISO CS FO E E FO E E C 0.UF C 0.0UF U VREF VIN FO SCK SDO CS LTC00CS C 0.UF CP B JP B CP Q TRIG MODE U I I0 U NLSZUS S NCSZPX Z R 00 U A0 A A VSS LC0 C 0.UF WP SCL SDA R.99K % R.99K % 9 0 9 0 J HDX-09-MOLEX CLR PR D Q JP REJECTION E C 0UF,.V 00 C.UF,.V 00 R 0K R OPT R.99K % NOTES: UNLESS OTHERWISE SPECIFIED. ALL RESISTORS ARE IN OHMS, 00. ALL CAPACITORS ARE IN MICROFARADS, 00. CONTRACT NO. DRAWN: KIM T. LTC Confidential-For Customer Use Only A A CHECKED: TITLE: SCHEMATIC. INSTALL SHUNT ON JP-JP PIN AND. APPROVED: -BIT DELTA SIGMA ADC ENGINEER: MARK T. SIZE DWG NO. REV DESIGNER: APPROVALS A DATE: 0 McCarthy Blvd. Milpitas, CA 90 Phone: (0)-900 TECHNOLOGY Fax: (0)-00 DCA- * LTC00CS Friday, March, 00 SHEET OF A Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dcaf

DEMO MANUAL DCA DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 0 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 0 McCarthy Blvd. Milpitas, CA 90 Copyright 00, Linear Technology Corporation LT 0 PRINTED IN USA Linear Technology Corporation 0 McCarthy Blvd., Milpitas, CA 90- (0) -900 FAX: (0) -00 www.linear.com LINEAR TECHNOLOGY CORPORATION 0 dcaf