TDA8943SF. 1. General description. 2. Features. 3. Applications. 4. Quick reference data. 6 W mono Bridge Tied Load (BTL) audio amplifier

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Rev. 2 7 April 2 Product specification. General description 2. Features The is a single-channel audio power amplifier with an output power of 6 W at an 8 Ω load and a 2 V supply. The circuit contains a Bridge Tied Load (BTL) amplifier with an all-npn output stage and standby/mute logic. The comes in a 9-lead single in-line (SIL) medium power package. The is printed-circuit board (PCB) compatible with all other types in the TDA894x family. One PCB footprint accommodates both the mono and the stereo products. c c Few external components Fixed gain Standby and mute mode No on/off switching plops Low standby current High supply voltage ripple rejection Outputs short-circuit protected to ground, supply and across the load Thermally protected Printed-circuit board compatible. 3. Applications 4. Quick reference data Mains fed applications (e.g. TV sound) PC audio Portable audio. Table : Quick reference data Symbol Parameter Conditions Min Typ Max Unit supply voltage 6 2 8 V I q quiescent supply current =2V; R L = - 5 22 ma I stb standby supply current - - µa

Table : 5. Ordering information Quick reference data continued Symbol Parameter Conditions Min Typ Max Unit P o output power THD = %; R L =8Ω; 5 6 - W =2V THD total harmonic distortion P o = W -.3. % G v voltage gain 3 32 33 db SVRR supply voltage ripple rejection 5 65 - db 6. Block diagram Table 2: Type number Ordering information Package Name Description Version SIL9MPF plastic single in-line medium power package SOT- with fin; 9 leads dth 2 IN IN+ 5 4 3 OUT OUT+ MODE SVR 7 6 STANDBY/ MUTE LOGIC 2 kω 2 kω SHORT CIRCUIT AND TEMPERATURE PROTECTION 8 GND MBK942 Fig. Block diagram. Product specification Rev. 2 7 April 2 2 of 2

7. Pinning information 7. Pinning handbook, halfpage OUT OUT+ IN+ 2 3 4 IN SVR MODE GND n.c. 5 6 7 8 9 MBK94 Fig 2. Pin configuration. 7.2 Pin description 8. Functional description Table 3: Pin description Symbol Pin Description OUT negative loudspeaker terminal 2 supply voltage OUT+ 3 positive loudspeaker terminal IN+ 4 positive input IN 5 negative input SVR 6 half supply voltage decoupling (ripple rejection) MODE 7 mode selection input (standby, mute, operating) GND 8 ground n.c. 9 not connected The is a mono BTL audio power amplifier capable of delivering 6 W output power to an 8 Ω load at THD = %, using a 2 V power supply and an external heatsink. The voltage gain is fixed at 32 db. With the three-level MODE input the device can be switched from standby to mute and to operating mode. The outputs are protected by an internal thermal shutdown protection mechanism and a short-circuit protection. Product specification Rev. 2 7 April 2 3 of 2

8. Input configuration The inputs can be driven symmetrical (floating) as well as asymmetrical. In the asymmetrical mode one input pin is connected via a capacitor to the signal ground which should be as close as possible to the SVR (electrolytic) capacitor ground. Note that the DC level of the input pins is half of the supply voltage, so coupling capacitors for both pins are necessary. The input cut-off frequency is: f i( cut off ) = ---------------------------- 2π( R i C i ) () For R i =45kΩ and C i = 22 nf: f i( cut off ) = ---------------------------------------------------------------- 2π( 45 3 22 9 = 6 Hz ) (2) As shown in Equation and 2, large capacitor values for the inputs are not necessary; so the switch-on delay during charging of the input capacitors, can be minimized. This results in a good low frequency response and good switch-on behaviour. Remark: To prevent HF oscillations do not leave the inputs open, connect a capacitor of at least.5 nf across the input pins close to the device. 8.2 Power amplifier The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-npn output stage, capable of delivering a peak output current of 2 A. The BTL principle offers the following advantages: Lower peak value of the supply current The ripple frequency on the supply voltage is twice the signal frequency No expensive DC-blocking capacitor Good low frequency performance. 8.2. Output power measurement The output power as a function of the supply voltage is measured on the output pins at THD = %; see Figure 8. The maximum output power is limited by the maximum supply voltage of 2 V and the maximum available output current: 2 A repetitive peak current. Product specification Rev. 2 7 April 2 4 of 2

8.2.2 Headroom Typical CD music requires at least 2 db (factor 5.85) dynamic headroom compared to the average power output for transferring the loudest parts without distortion. At =2V, R L =8Ω and P o = 4 W at THD =.% (see Figure 6), the Average Listening Level (ALL) music power without any distortion yields: P o(all) = 4 W/5.85 = 252 mw. The power dissipation can be derived from Figure on page for db respectively 2 db headroom. Table 4: Power rating as function of headroom Headroom Power output (THD =.%) Power dissipation (P) db P o = 4 W 3.8 W 2 db P o(all) = 252 mw.8 W For the average listening level a power dissipation of.8 W can be used for a heatsink calculation. 8.3 Mode selection The has three functional modes, which can be selected by applying the proper DC voltage to pin MODE. See Figure 4 and 5 for the respective DC levels, which depend on the supply voltage level. The MODE pin can be driven by a 3-state logic output stage: e.g. a microcontroller with additional components for DC-level shifting. Standby In this mode the current consumption is very low and the outputs are floating. The device is in standby mode when (.5 V) < V MODE <, or when the MODE pin is left floating (high impedance). The power consumption of the will be reduced to <.8 mw. Mute In this mode the amplifier is DC-biased but not operational (no audio output); the DC level of the input and output pins remain on half the supply voltage. This allows the input coupling and Supply Voltage Ripple Rejection (SVRR) capacitors to be charged to avoid pop-noise. The device is in mute mode when 3V<V MODE <(.5 V). Operating In this mode the amplifier is operating normally. The operating mode is activated at V MODE <.5 V. 8.3. Switch-on and switch-off To avoid audible plops during supply voltage switch-on or switch-off, the device is set to standby mode before the supply voltage is applied (switch-on) or removed (switch-off). The switch-on and switch-off time can be influenced by an RC-circuit on the MODE pin. Rapid on/off switching of the device or the MODE pin may cause click- and pop-noise. This can be prevented by proper timing of the RC-circuit on the MODE pin. Product specification Rev. 2 7 April 2 5 of 2

9. Limiting values 8.4 Supply Voltage Ripple Rejection (SVRR) The SVRR is measured with an electrolytic capacitor of µf on pin SVR at a bandwidth of Hz to 8 khz. Figure 2 on page illustrates the SVRR as function of the frequency. A larger capacitor value on the SVR pin improves the ripple rejection behaviour at the lower frequencies. 8.5 Built-in protection circuits The contains two types of protection circuits, i.e. short-circuit and thermal shutdown. 8.5. Short-circuit protection Short-circuit to ground or supply line This is detected by a so-called missing current detection circuit which measures the current in the positive supply line and the current in the ground line. A difference between both currents larger than.4 A, switches the power stage to standby mode (high impedance). Short-circuit across the load This is detected by an absolute-current measurement. An absolute-current larger than 2 A, switches the power stage to standby mode (high impedance). 8.5.2 Thermal shutdown protection The junction temperature is measured by a temperature sensor; at a junction temperature of approximately 5 C this detection circuit switches the power stage to standby mode (high impedance). Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 634). Symbol Parameter Conditions Min Max Unit supply voltage no signal.3 +25 V operating.3 +8 V V I input voltage.3 +.3 V I ORM repetitive peak output current - 2 A T stg storage temperature non-operating 55 +5 C T amb operating ambient 4 +85 C temperature P tot total power dissipation - 7 W (sc) supply voltage to guarantee short-circuit protection - 8 V Product specification Rev. 2 7 April 2 6 of 2

. Thermal characteristics Table 6: Thermal characteristics Symbol Parameter Conditions Value Unit R th(j-a) thermal resistance from junction to ambient in free air 68 K/W R th(j-mb) thermal resistance from junction to mounting base in free air 8 K/W. Static characteristics Table 7: Static characteristics =2V; T amb =25 C; R L =8Ω; V MODE =V; V i = V; measured in test circuit Figure 3; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit supply voltage operating 6 2 8 V I q quiescent supply current R L = [] - 5 22 ma I stb standby supply current V MODE = - - µa V O DC output voltage [2] - 6 - V V [3] OUT differential output voltage offset - - 2 mv V MODE mode selection input voltage operating mode -.5 V mute mode 3 -.5 V standby mode.5 - V I MODE mode selection input current < V MODE < - - 2 µa [] With a load connected at the outputs the quiescent current will increase, the maximum of this increase being equal to the differential output voltage offset ( V OUT ) divided by the load resistance (R L ). [2] The DC output voltage with respect to ground is approximately.5. [3] V OUT = V OUT+ V OUT. 3 handbook, I halfpage q (ma) 25 MGU4 28 handbook, I q halfpage (ma) 24 MGU4 2 2 6 5 2 8 5 4 4 8 2 6 2 VCC (V) 2 4 6 8 2 4 V MODE (V) Fig 3. Quiescent supply current as function of supply voltage. Fig 4. Quiescent supply current as function of mode voltage. Product specification Rev. 2 7 April 2 7 of 2

2. Dynamic characteristics Table 8: Dynamic characteristics =2V; T amb =25 C; R L =8Ω; f = khz; V MODE = V; measured in test circuit Figure 3; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit P o output power THD = % 5 6 - W THD =.5% 3 4 - W THD total harmonic distortion P o = W -.3. % G v voltage gain 3 32 33 db Z i(dif) differential input impedance 7 9 kω V n(o) noise output voltage [] - 9 2 µv SVRR supply voltage ripple rejection f ripple = khz [2] 5 65 - db f ripple = Hz [2] - 6 - db to 2 khz V o(mute) output voltage mute mode [3] - - 5 µv [] The noise output voltage is measured at the output in a frequency range from 2 Hz to 2 khz (unweighted), with a source impedance R S =Ω at the input. [2] Supply voltage ripple rejection is measured at the output, with a source impedance R S =Ω at the input. The ripple voltage is a sine wave with a frequency f ripple and an amplitude of 7 mv (RMS), which is applied to the positive supply rail. [3] Output voltage in mute mode is measured with an input voltage of V (RMS) in a bandwidth of 2 khz, so including noise. handbook, full pagewidth V o (V) MGU43 2 3 4 5 4 8 2 6 V MODE (V) 2 Fig 5. Output voltage as function of mode voltage. Product specification Rev. 2 7 April 2 8 of 2

2 handbook, halfpage THD (%) MGU38 handbook, halfpage THD (%) MGU39 R L = 6 Ω 8 Ω P o =. (W) (W) 2 2 P o (W) 2 2 3 4 f (Hz) 5 Fig 6. Total harmonic distortion as function of output power. Fig 7. No bandpass filter applied. Total harmonic distortion as function of frequency. 6 handbook, halfpage P o (W) 2 MGU44 handbook, halfpage P tot (W) 8 MGU45 8 R L = 8 Ω 6 Ω 6 R L = 8 Ω 4 6 Ω 4 2 4 8 2 6 2 (V) 5 5 VCC (V) 2 THD = %. Fig 8. Output power as function of supply voltage. Fig 9. Total power dissipation as function of supply voltage. Product specification Rev. 2 7 April 2 9 of 2

handbook, halfpage η (%) 8 MGU47 5 handbook, halfpage P (W) 4 R L = 8 Ω MGU46 6 R L = 6 Ω 8 Ω 3 4 2 6 Ω 2 2 4 6 8 Po (W) 2 4 6 8 Po (W) =2V. Fig. Efficiency as function of output power. Fig. Power dissipation as function of output power. handbook, full pagewidth MGU42 SVRR (db) 2 B 4 6 A 8 2 3 4 5 f (Hz) = 2 V; R s =Ω; V ripple = 77 mv (RMS); no bandpass filter applied. Curve A: inputs short-circuited Curve B: inputs short-circuited and connected to ground (asymmetrical application) Fig 2. Supply voltage ripple rejection as function of frequency. Product specification Rev. 2 7 April 2 of 2

3. Internal circuitry Table 9: Internal circuitry Pin Symbol Equivalent circuit 4 and 5 IN+ and IN.5 kω.5 kω 5 4 45 kω 45 kω /2 (SVR) MGU78 and 3 OUT and OUT+ Ω 4 Ω, 3 /2 MGU8 7 MODE 2 kω kω kω 7 OFF HIGH MUTE HIGH MGU79 6 SVR Standby 2 kω 6 2 kω MGU8 Product specification Rev. 2 7 April 2 of 2

4. Application information handbook, full pagewidth R s 22 nf nf + µf Symmetrical input C i IN 5 2 3 kω R s Asymmetrical input signal GND 22 nf 22 nf C i 22 nf.5 nf IN+ 4 R i 45 kω /2 R i 45 kω + + + /2 + 3 kω 3 OUT OUT+ R L 8 Ω R MODE 7 STANDBY/ MUTE LOGIC C MICROCONTROLLER C2 R signal GND SVR µf 6 2 kω /2 2 kω SHORT CIRCUIT AND TEMPERATURE PROTECTION MODE Standby Mute On C C2 8 GND MGU36 Fig 3. Application diagram. 4. Printed-circuit board (PCB) 4.. Layout and grounding For a high system performance level certain grounding techniques are essential. The input reference grounds have to be tied with their respective source grounds and must have separate tracks from the power ground tracks; this will prevent the large (output) signal currents from interfering with the small AC input signals. The small-signal ground tracks should be physically located as far as possible from the power ground tracks. Supply and output tracks should be as wide as possible for delivering maximum output power. Product specification Rev. 2 7 April 2 2 of 2

idth 54 mm 56 mm 9 22 nf + µf IN ON MUTE.5 nf 22 nf IN+ nf OUT OUT+ µf GND Fig 4. Printed-circuit board layout (single-sided); components view. 4..2 Power supply decoupling Proper supply bypassing is critical for low-noise performance and high supply voltage ripple rejection. The respective capacitor locations should be as close as possible to the device and grounded to the power ground. Proper power supply decoupling also prevents oscillations. For suppressing higher frequency transients (spikes) on the supply line a capacitor with low ESR typical nf has to be placed as close as possible to the device. For suppressing lower frequency noise and ripple signals, a large electrolytic capacitor e.g. µf or greater must be placed close to the device. The bypass capacitor on the SVR pin reduces the noise and ripple on the midrail voltage. For good THD and noise performance a low ESR capacitor is recommended. Product specification Rev. 2 7 April 2 3 of 2 MGU37

5. Test information 4.2 Thermal behaviour and heatsink calculation The measured maximum thermal resistance of the IC package, R th(j-mb) is 8 K/W. A calculation for the heatsink can be made, with the following parameters: T amb(max) =5 C = 2 V and R L =8Ω T j(max) = 5 C. R th(tot) is the total thermal resistance between the junction and the ambient including the heatsink. In the heatsink calculations the value of R th(mb-h) is ignored. At =2VandR L =8Ωthe measured worst-case sine-wave dissipation is 3.8 W; see Figure. For T j(max) = 5 C the temperature raise caused by the power dissipation is: 5 5 = C. P R th(tot) = C R th(tot) = /3.8 = 26.3 K/W R th(h-a) =R th(tot) R th(j-mb) = 26.3 8 = 8.3 K/W. The calculation above is for an application at worst-case sine-wave output signals. In practice music signals will be applied, which decreases the maximum power dissipation to approximately half of the sine-wave power dissipation (see Section 8.2.2). This allows for the use of a smaller heatsink: P R th(tot) = C R th(tot) = /.8 = 55.5 K/W R th(h-a) =R th(tot) R th(j-mb) = 55.5 8 = 37.5 K/W. To increase the lifetime of the IC, T j(max) should be reduced to 25 C. This requires a heatsink of approximately 24 K/W for music signals. 5. Quality information The General Quality Specification for Integrated Circuits, SNW-FQ-6D is applicable. 5.2 Test conditions T amb =25 C; = 2 V; f = khz; R L =8Ω; audio pass band 22 Hz to 22 khz; unless otherwise specified. Remark: In the graphs as function of frequency no bandpass filter was applied; see Figure 7 and 2. Product specification Rev. 2 7 April 2 4 of 2

6. Package outline SIL9MPF: plastic single in-line medium power package with fin; 9 leads SOT- D P D q P A 2 q q 2 A 3 A A 4 seating plane pin index E 9 L c Z e b Q b 2 b w M 5 mm scale DIMENSIONS (mm are the original dimensions) A 2 UNIT A A max. 3 b b b 2 c D () D E () Z () A 4 e L P P Q q q q 2 w max. mm 8.5 8.7 5.8.4.67.4.48 2.8 2.4 6.48 3.7 2.54 3.9 2.75 3.4.75 5. 4.4 5.9.25. 7.8 8. 5.4.4.5.4.38 2.4 2.7 6.2 3.4 2.5 3.2.55 4.9 4.2 5.7 Note. Plastic or metal protrusions of.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT- 92--7 95-2-25 Fig 5. SIL9MPF package outline. Product specification Rev. 2 7 April 2 5 of 2

7. Soldering 7. Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 9). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. 7.2 Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 26 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T stg(max) ). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 7.3 Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 3 C it may remain in contact for up to seconds. If the bit temperature is between 3 and 4 C, contact may be up to 5 seconds. 7.4 Package related soldering information Table : Suitability of through-hole mount IC packages for dipping and wave soldering methods Package Soldering method Dipping Wave DBS, DIP, HDIP, SDIP, SIL suitable suitable [] [] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. Product specification Rev. 2 7 April 2 6 of 2

8. Revision history Table : Revision history Rev Date CPCN Description 2 247 - Product specification; second version; supersedes initial version - of 4 April 999 (9397 75 4877). Modifications: Table on page : SVRR; Typ value 65 db added Ordering options removed Section 8 Functional description : Section 8. Input configuration on page 4 added. Section 8.2 Power amplifier on page 4:..., capable of delivering a peak output current of.5 A changed to 2 A. Section 8.2. Output power measurement on page 4 added Section 8.2.2 Headroom on page 5 added Section 8.3 Mode selection : Standby mode: V MODE >(.5 V) changed to (.5 V) < V MODE < ; The power consumption of the will be reduced to <.8 mw added. Mute mode: the DC level of the input and output pins remain on half the supply voltage added; 2.5 V < V MODE <(.5 V) changed to 3 V < V MODE <(.5 V) Section 8.3. Switch-on and switch-off on page 5 Section 8.4 Supply Voltage Ripple Rejection (SVRR) on page 6 added Section 8.5 Built-in protection circuits on page 6 added Table 5 on page 6: P tot value added 7 W (sc) value added 8 V Table 6 on page 7: R th(j-a) value 65 K/W changed 68 K/W R th(j-c) value changed to R th(j-mb) value 8 K/W Table 7 on page 7: V MODE - mute mode - value Min 2.5 changed to 3 V Table 8 on page 8: SVRR; Typ values 65 and 6 db added Figure 3 to 2: figures added Section 3 Internal circuitry on page : added Figure 3: figure modified Section 4. Printed-circuit board (PCB) on page 2: added Figure 4: figure added Section 4.2 Thermal behaviour and heatsink calculation on page 4: added Section 5.2 Test conditions on page 4: added 9944 - Preliminary specification; initial version. Product specification Rev. 2 7 April 2 7 of 2

9. Data sheet status Datasheet status Product status Definition [] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [] Please consult the most recently issued data sheet before initiating or completing a design. 2. Definitions 2. Disclaimers Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 634). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Life support These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 9397 75 6865 Philips Electronics N.V. 2 All rights reserved. Product specification Rev. 2 7 April 2 8 of 2

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Contents General description...................... 2 Features............................... 3 Applications............................ 4 Quick reference data..................... 5 Ordering information..................... 2 6 Block diagram.......................... 2 7 Pinning information...................... 3 7. Pinning............................... 3 7.2 Pin description......................... 3 8 Functional description................... 3 8. Input configuration...................... 4 8.2 Power amplifier......................... 4 8.2. Output power measurement............... 4 8.2.2 Headroom............................. 5 8.3 Mode selection......................... 5 8.3. Switch-on and switch-off.................. 5 8.4 Supply Voltage Ripple Rejection (SVRR)..... 6 8.5 Built-in protection circuits................. 6 8.5. Short-circuit protection................... 6 8.5.2 Thermal shutdown protection.............. 6 9 Limiting values.......................... 6 Thermal characteristics................... 7 Static characteristics..................... 7 2 Dynamic characteristics.................. 8 3 Internal circuitry........................ 4 Application information.................. 2 4. Printed-circuit board (PCB)............... 2 4.. Layout and grounding................... 2 4..2 Power supply decoupling................ 3 4.2 Thermal behaviour and heatsink calculation. 4 5 Test information........................ 4 5. Quality information..................... 4 5.2 Test conditions........................ 4 6 Package outline........................ 5 7 Soldering............................. 6 7. Introduction to soldering through-hole mount packages...................... 6 7.2 Soldering by dipping or by solder wave..... 6 7.3 Manual soldering...................... 6 7.4 Package related soldering information...... 6 8 Revision history........................ 7 9 Data sheet status....................... 8 2 Definitions............................ 8 2 Disclaimers............................ 8 Philips Electronics N.V. 2. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 7 April 2 Document order number: 9397 75 6865