NDA-310-D 4 GENERAL PURPOSE. Gain Stage or Driver Amplifiers for MWRadio/Optical Designs

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7\SLFDO$SSOLFDWLRQV Narrow and Broadband Commercial and Military Radio Designs Linear and Saturated Amplifiers 3URGXFW'HVFULSWLRQ The NDA-310-D GaInP/GaAs HBT MMIC distributed amplifier is a low-cost, high-performance solution for high frequency RF, microwave, or optical amplification needs. This 50Ω matched distributed amplifier is based on a reliable HBT proprietary MMIC design, providing unsurpassed performance for small-signal applications. Designed with an external bias resistor, the NDA-310-D provides flexibility and stability. In addition, the NDA-310-D chip was designed with an additional ground via to enable low junction temperature operation. NDA-series distributed amplifiers provide design flexibility by incorporating AGC functionality into their designs. NDA-310-D *D,Q3*D$V+%700,&',675,%87(' $03/,),(5'&72*+] Gain Stage or Driver Amplifiers for MWRadio/Optical Designs 2SWLPXP7HFKQRORJ\0DWFKLQJŠ $SSOLHG Si BJT GaAs HBT GaAs MESFET Si Bi-CMOS SiGe HBT Si CMOS á GaInP/HBT GaN HEMT 3DFNDJH6W\OH'LH )HDWXUHV Reliable, Low-Cost HBT Design 9.5dB Gain, +15.1dBm P1dB@2.0GHz High P1dB of +15.1dBm@6.0GHz and +10.8dBm@1.0GHz Fixed Gain or AGC Operation 50Ω I/O Matched for High Freq. Use 2UGHULQJ,QIRUPDWLRQ NDA-310-D GaInP/GaAs HBT MMIC Distributed Amplifier DC to 15GHz - Die Only )XQFWLRQDO%ORFN'LDJUDP RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 2709, USA Tel (336) 66 1233 Fax (336) 66 05 http://www.rfmd.com -393

Absolute Maximum Ratings Parameter Rating Unit RF Input Power +20 dbm Power Dissipation 300 mw Device Current, I CC1 8 ma Device Current, I CC2 8 ma Junction Temperature, Tj 200 C Operating Temperature -5 to +85 C Storage Temperature -65 to +150 C Exceeding any one or a combination of these limits may cause permanent damage. Parameter Specification Min. Typ. Max. Unit Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Condition V CC1 =+10V, V CC2 =+10V, V C1 =+.75V, Overall V C2 =+2.98V, I CC1 =28mA, I CC2 =2mA, Z 0 =50Ω, T A =+25 C Small Signal Power Gain, S21 8.0 9.5 db f=0.1ghz to.0ghz 1 db f=.0ghz to 6.0GHz 11.0 db f=6.0ghz to 1GHz 9.0 db f=1ghz to 1.0GHz 7.0 8.0 db f=1.0ghz to 1GHz Input and Output VSWR 2.3:1 f=0.1ghz to.0ghz 2.0:1 f=.0ghz to 1GHz 2.6:1 f=1ghz to 1GHz Bandwidth, BW 15.5 GHz BW3 (3dB) Output Power @ 1dB Compression 15.1 dbm f=2.0ghz 15.1 dbm f=6.0ghz 10.8 dbm f=1.0ghz Noise Figure, NF 5.5 db f=2.0ghz Third Order Intercept, IP3 +2 dbm f=2.0ghz Reverse Isolation, S12-1 db f=0.1ghz to 18.0GHz Output Device Voltage, V C2 2.70 2.98 3.20 V AGC Control Voltage, V C1.7 V Gain Temperature Coefficient, -015 db/ C δg T /δt MTTF versus Junction Temperature Case Temperature 85 C Junction Temperature 19 C MTTF >1,000,000 hours Thermal Resistance θ JC 28 C/W Thermal Resistance, at any temperature (in C/Watt) can be estimated by the following equation: θ JC ( C/Watt)=28[T J ( C)/19] Suggested Voltage Supply: V CC1 >.7V, V CC2 >V -39

7\SLFDO%LDV&RQILJXUDWLRQ Application notes related to biasing circuit, device footprint, and thermal considerations are available on request. I CC1 V CC1 D1, Blocking Diode V CC2 R CC2 In V C1 Q1 R CC1 C1 1 uf Q2 Simplified Schematic of Distributed Amplifier I CC2 V C2 Out Bias Resistor Selection R CC1 : For.7V<V CC1 <V R CC1 =0Ω For V<V CC1 <1V R CC1 =V CC1 -.7/28Ω R CC2 : For V<V CC2 <1V R CC1 =V CC2-2.98/2Ω Typical Bias Parameters for V CC1 =V CC2 =10V: V CC1 (V) V CC2 (V) I CC1 (ma) V C1 (V) R CC1 (Ω) I CC2 (ma) V C2 (V) R CC2 (Ω) 10 10 28.75 190 2 2.98 170 $SSOLFDWLRQ1RWHV Die Attach The die attach process mechanically attaches the die to the circuit substrate. In addition, it electrically connects the ground to the trace on which the chip is mounted, and establishes the thermal path by which heat can leave the chip. Wire Bonding Electrical connections to the chip are made through wire bonds. Either wedge or ball bonding methods are acceptable practices for wire bonding. Assembly Procedure Epoxy or eutectic die attach are both acceptable attachment methods. Top and bottom metallization are gold. Conductive silver-filled epoxies are recommended. This procedure involves the use of epoxy to form a joint between the backside gold of the chip and the metallized area of the substrate. A 150 C cure for 1 hour is necessary. Recommended epoxy is Ablebond 8-1LMI from Ablestik. Bonding Temperature (Wedge or Ball) It is recommended that the heater block temperature be set to 160 C±10 C. -395

&KLS2XWOLQH'UDZLQJ1'$' Chip Dimensions: 27 x 22 x 0-396

Device Voltage versus Amplifier Current P1dB versus Frequency at 25 C.0 2 3.0 1 Device Voltage, V D (V) 2.0 1.0 2 3 5 6 7 Amplifier Current, I CC (ma) P1dB (dbm) 1 1.0 3.0 7.0 9.0 11.0 13.0 1 P OUT /Gain versus P IN at 6 GHz P OUT /Gain versus P IN at 1 GHz 2 1 1 1 POUT (dbm), Gain (db) 1 POUT (dbm), Gain (db) - Pout (dbm) Pout (dbm) Gain (db) Gain (db) - -1-1 - 1 P IN (dbm) -1-1 -1-1 P IN (dbm) Third Order Intercept versus Frequency at 25 C 3 3 Output IP3 (dbm) 2 2 1 1 1.0 3.0 7.0 9.0 11.0 13.0 1-397

Note: The s-parameter gain results shown below include device performance as well as evaluation board and connector loss variations. The insertion losses of the evaluation board and connectors are as follows: 1GHz to GHz=-6dB 5GHz to 9GHz=-0.22dB 10GHz to 1GHz=-0.50dB 15GHz to 20GHz=-1.08dB S11 (db) -2.0 -.0-6.0-8.0-1 S11 versus Frequency S12 (db) -2.0 -.0-6.0-8.0-1 -12.0 S12 versus Frequency -12.0-1.0-1.0-16.0-16.0-18.0-18.0 2.0.0 6.0 8.0 1 12.0 1.0 16.0 18.0-2 2.0.0 6.0 8.0 1 12.0 1.0 16.0 18.0 S21 versus Frequency S22 versus Frequency 1.0 12.0-1 -1-1 S21 (db) 8.0 6.0 S22 (db) -2-2.0-3 2.0-3 2.0.0 6.0 8.0 1 12.0 1.0 16.0 18.0-2.0.0 6.0 8.0 1 12.0 1.0 16.0 18.0-398