Power Management & Multimarket

Protection Device TVS (Transient Voltage Suppressor) Bi-directional, 5.5 V, 6.5 pf, 5, RoHS and Halogen Free compliant Data Sheet Revision.4, 26-4-7 Final Power Management & Multimarket

Edition 26-4-7 Published by Infineon Technologies AG 8726 Munich, Germany 26 Infineon Technologies AG All Rights Reserved. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Product Overview Product Overview. Features ESD / transient protection of high speed data lines according to: IEC6-4-2 (ESD): ±7 kv (air), ±5 kv (contact discharge) IEC6-4-4 (EFT): ±2 kv / ±4 A(5/5 ns) IEC6-4-5 (surge): ±3 A (8/2 µs) Bi-directional working voltage up to: V RWM =±5.5V Line capacitance: C L = 6.5 pf (typical) at f =MHz Clamping voltage: V CL =3V (typical) at I TLP =6A with R DYN =.2Ω (typical) Very low reverse current:. I R < na (typical) Minimized clamping overshoot due to extremely low parasitic inductance Small form factor SMD Size 5 and low profile (.43 mm x.23 mm x.5 mm) Bi-directional and symmetric I/V characteristics for optimized design and assembly Pb-free (RoHS compliant) and halogen free package Guidelines for optimized PCB design and assembly process available [2].2 Application Examples[3] ESD Protection of highly susceptible IC/ASICs in audio, headset, human digital interfaces Dedicated solution to boost space saving and high performance in miniaturized modern electronics.3 Product Description Figure - a) Pin configuration Pin Configuration and Schematic Diagram b) Schematic diagram Configutation_Schematic_Diagram.vsd Table - Part Information Type Package Configuration Marking code WLL-2-2 line, bi-directional A ) ) The device does not have any marking or date code on the device backside. The marking code is on pad side. Final Data Sheet 3 Revision.4, 26-4-7

Maximum Ratings 2 Maximum Ratings Table 2- Maximum Ratings at T A = 25 C, unless otherwise specified ) Parameter Symbol Values Unit Reverse working voltage V RWM ±5.5 V ESD discharge 2) contact air V ESD ±5 ±7 Peak pulse power 3) P PK 36 W Peak pulse current 3) I PP ±3 A Operating temperature range T OP -55 to 25 C Storage temperature T stg -65 to 5 C ) Device is electrically symmetrical 2) V ESD according to IEC6-4-2 (R =33Ω, C = 5 pf discharge network) 3) Stress pulse: 8/2μs current waveform according to IEC6-4-5 Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. kv 3 Electrical Characteristics Figure 3- Definitions of electrical characteristics Final Data Sheet 4 Revision.4, 26-4-7

Electrical Characteristics Table 3- DC Characteristics at T A = 25 C, unless otherwise specified ) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Breakdown voltage V BR 6 - V I BR =ma Reverse current I R - < na V R =5.5V ) Device is electrically symmetrical Table 3-2 AC Characteristics at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Line capacitance C L 6.5 pf V R =V, f =MHz 6.5 V R =V, f =GHz Table 3-3 ESD and Surge Characteristics at T A = 25 C, unless otherwise specified ) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Clamping voltage 2) V CL 3 V I TLP =6A, t p = ns 7 I TLP =3A, t p = ns Clamping voltage 3) 9.5 I PP =A, t p =8/2μs 2 I PP =3A, t p =8/2μs Dynamic resistance 2) R DYN.2 Ω t p =ns ) Device is electrically symmetrical 2) Please refer to Application Note AN2[]. TLP parameter: Z = 5 Ω, t p = ns, t r =.6 ns. 3) Stress pulse: 8/2μs current waveform according to IEC6-4-5 Final Data Sheet 5 Revision.4, 26-4-7

Typical Characteristics Diagrams 4 Typical Characteristics Diagrams Typical characteristics diagrams at T A = 25 C, unless otherwise specified I R [A] -3-4 -5-6 -7-8 -9 - - -2-3 -4-6 -4-2 2 4 6 V R [V] Figure 4- Reverse leakage current: I R = f(v R ) 9 8 7 C L [pf] 6 5 4 3 2 GHz MHz -3-2.5-2 -.5 - -.5.5.5 2 2.5 3 V R [V] Figure 4-2 Line capacitance: C L = f(v R ), f =MHz Final Data Sheet 6 Revision.4, 26-4-7

Typical Characteristics Diagrams 5 Scope: 6 GHz, 2 GS/s V CL [V] 25 V CL-max-peak = 28 V V CL-3ns-peak = 2 V -25-5 5 5 2 25 3 35 4 45 t p [ns] Figure 4-3 Clamping voltage (ESD): V CL = f(t), 8 kv positive pulse 25 Scope: 6 GHz, 2 GS/s V CL [V] -25 V CL-max-peak = -28 V V CL-3ns-peak = - V -5-5 5 5 2 25 3 35 4 45 t p [ns] Figure 4-4 Clamping voltage (ESD): V CL = f(t), 8 kv negative pulse Final Data Sheet 7 Revision.4, 26-4-7

Typical Characteristics Diagrams 5 Scope: 6 GHz, 2 GS/s V CL [V] 25 V CL-max-peak = 4 V V CL-3ns-peak = 5 V -25-5 5 5 2 25 3 35 4 45 t p [ns] Figure 4-5 Clamping voltage (ESD): V CL = f(t), 5 kv positive pulse 25 Scope: 6 GHz, 2 GS/s V CL [V] -25 V CL-max-peak = -4 V V CL-3ns-peak = -4 V -5-5 5 5 2 25 3 35 4 45 t p [ns] Figure 4-6 Clamping voltage (ESD): V CL = f(t), 5 kv negative pulse Final Data Sheet 8 Revision.4, 26-4-7

Typical Characteristics Diagrams 3 25 R DYN 5 2.5 2 5 R DYN =.2 Ω 7.5 5 I TLP [A] 5-5 2.5-2.5 Equivalent V IEC [kv] - -5-5 -7.5-2 R DYN =.2 Ω - -25-2.5-3 -5-2 -5 - -5 5 5 2 V TLP [V] Figure 4-7 Clamping voltage (TLP): I TLP = f(v TLP ) [] Final Data Sheet 9 Revision.4, 26-4-7

Typical Characteristics Diagrams 3.5 3 2.5 2.5.5 I PP [A] -.5 - -.5-2 -2.5-3 -3.5-2 - -8-6 -4-2 2 4 6 8 2 V CL [V] Figure 4-8 Clamping voltage (Surge): I PP = f(v CL )[] Final Data Sheet Revision.4, 26-4-7

Typical Characteristics Diagrams Insertion Loss ( S 2 ) [db] 2 3 4 5 6 7 8 9-2. Frequency [GHz] Figure 4-9 Insertion loss vs. frequency in a 5 Ω system Final Data Sheet Revision.4, 26-4-7

Package Information 5 Package Information 5. WLL-2-2 Top view Bottom view.5±..23±.3.28 (.5) 2.2 ±.2.3 ±.2.43 ±.3 SG-WLL-2-2-PO V Figure 5- WLL-2-2: Package (dimension in mm).23.23.5.3.5.3 Copper Solder mask Stencil apertures SG-WLL-2-2-FP V Figure 5-2 WLL-2-2 Footprint (dimension in mm) Recommendation for Printed Circuit Board Assembly[2].2.5 8 2.28.2 SG-WLL-2-2-TP V Figure 5-3 WLL-2-2: Packing (dimension in mm) Marking on pad-side Type code Type code SG-WLL-2-2-MK V2 Figure 5-4 WLL-2-2: Marking example Table - Part Information on Page 3 Final Data Sheet 2 Revision.4, 26-4-7

References References [] Infineon AG - Application Note AN2: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology [2] Infineon AG - Recommendation for Printed Circuit Board Assembly of Infineon WLL Packages http://www.infineon.com/dgdl/?fileid=db3a34344f7b4f9453db5427c [3] Infineon AG - Application Note AN392: TVS Diodes in ChipScalePackage reduce size and save cost Final Data Sheet 8 Revision.4, 26-4-7

Revision History: Rev..3, 26-2-5 Page or Item Subjects (major changes since previous revision) Revision.4, 26-4-7 6 Update of Figure 4-2 Trademarks of Infineon Technologies AG AURIX, BlueMoon, C66, CanPAK, CIPOS, CIPURSE, COMNEON, EconoPACK, CoolMOS, CoolSET, CORECONTROL, CROSSAVE, DAVE, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPIM, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, I²RF, ISOFACE, IsoPACK, MIPAQ, ModSTACK, my-d, NovalithIC, OmniTune, OptiMOS, ORIGA, PRIMARION, PrimePACK, PrimeSTACK, PRO-SIL, PROFET, RASIC, ReverSave, SatRIC, SIEGET, SINDRION, SIPMOS, SMARTi, SmartLEWIS, SOLID FLASH, TEMPFET, thinq!, TRENCHSTOP, TriCore, X-GOLD, X-PMU, XMM, XPOSYS. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. AUTOSAR is licensed by AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CAT-iq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. FlexRay is licensed by FlexRay Consortium. HYPERTERMINAL of Hilgraeve Incorporated. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. Mifare of NXP. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave Openwave Systems Inc. RED HAT Red Hat, Inc. RFMD RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex Limited. Last Trademarks Update 2--26 Final Data Sheet 9 Revision.4, 26-4-7

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