4V Drive Pch MOSFET Structure Silicon P-channel MOSFET Dimensions (Unit : mm) TSMT3 Features ) Low On-resistance. 2) High power package. 3) 4V drive. (3) () (2) pplication Switching Inner circuit bbreviated symbol : UJ Packaging specifications Package Type Code Basic ordering unit (pieces) Taping TL 3 () (3) 2 () Gate (2) Source (3) Drain (2) ESD PROTECTION DIODE 2 BODY DIODE bsolute maximum ratings (Ta = 25 C) Drain-source voltage Gate-source voltage Continuous Drain current Source current Continuous (Body Diode) Power dissipation Channel temperature Range of storage temperature Symbol V DSS V GSS I D I DP * I S I SP * P D *2 Tch Tstg Limits 3 2.5 6.8 6. 5 55 to +5 Unit V V W C C * Pw s, Duty cycle % *2 Mounted on a ceramic board. Thermal resistance Channel to mbient Symbol Rth (ch-a) * Limits 25 Unit C / W *Mounted on a ceramic board. 2 ROHM Co., Ltd. ll rights reserved. /5 2.7 - Rev.
Electrical characteristics (Ta = 25 C) Symbol Min. Typ. Max. Unit Gate-source leakage I GSS - - V GS = 2V, V DS =V Drain-source breakdown voltage V (BR)DSS 3 - - V I D = m, V GS =V Zero gate voltage drain current I DSS - - V DS = 3V, V GS =V Gate threshold voltage V GS (th). - 2.5 V V DS = V, I D = m Input capacitance C iss - 23 - pf V DS = V Output capacitance C oss - 4 - pf V GS =V Reverse transfer capacitance C rss - 33 - pf f=mhz Turn-on delay time t d(on) * - 2 - ns I D =.7, V DD 5V Rise time t r * - 8 - ns V GS = V Turn-off delay time t d(off) * - 4 - ns R L 2.4 Fall time t f * - 3 - ns R G = Total gate charge Q g * - 3.2 - nc I D =.5, V DD 5V Gate-source charge Q gs * -.2 - nc V GS = 5V R L Gate-drain charge Q gd * -.7 - nc R G = * Conditions - 5 6 I D =.5, V GS = V Static drain-source on-state R * - 7 24 m I D =.7, V GS = 4.5V resistance DS (on) - 9 27 I D =.7, V GS = 4.V Forward transfer admittance l Y fs l*.2 - - S V DS = V, I D =.5 Body diode characteristics (Source-Drain) (Ta = 25 C) Symbol Min. Typ. Max. Unit Conditions Forward Voltage V SD * - -.2 V I s =.5, V GS =V * 2 ROHM Co., Ltd. ll rights reserved. 2/5 2.7 - Rev.
Electrical characteristic curves 3 3 V DS = V DRIN CURRENT : I D [] 2 V GS = V V GS = 3.V V GS = 2.5V DRIN CURRENT : I D [] 2 V GS = V V GS = 2.5V V GS = 3.V DRIN CURRENT : I D []....2.4.6.8 2 4 6 8 2 3 4 DRIN-SOURCE VOLTGE : V DS [V] DRIN-SOURCE VOLTGE : V DS [V] GTE-SOURCE VOLTGE : V GS [V] Fig. Typical Output Characteristics( Ⅰ) Fig.2 Typical Output Characteristics( Ⅱ) Fig.3 Typical Transfer Characteristics STTIC DRIN-SOURCE ON-STTE RESISTNCE : R DS ( on )[mω] V GS = V. STTIC DRIN-SOURCE ON-STTE RESISTNCE : R DS ( on )[mω] V GS = V. STTIC DRIN-SOURCE ON-STTE RESISTNCE : R DS ( on )[mω]. DRIN-CURRENT : I D [] DRIN-CURRENT : I D [] DRIN-CURRENT : I D [] Fig.4 Static Drain-Source On-State Resistance vs. Drain Current(Ⅰ) Fig.5 Static Drain-Source On-State Resistance vs. Drain Current(Ⅱ) Fig.6 Static Drain-Source On-State Resistance vs. Drain Current(Ⅲ) STTIC DRIN-SOURCE ON-STTE RESISTNCE : R DS ( on )[mω]. FORWRD TRNSFER DMITTNCE : Yfs [S]. V DS = V T a = 25 C T a =75 C T a =25 C.. SOURCE CURRENT : I s [].. V GS =V.5.5 DRIN-CURRENT : I D [] DRIN-CURRENT : I D [] SOURCE-DRIN VOLTGE : V SD [V] Fig.7 Static Drain-Source On-State Resistance vs. Drain Current(Ⅳ) Fig.8 Forward Transfer dmittance vs. Drain Current Fig.9 Reverse Drain Current vs. Sourse-Drain Voltage 2 ROHM Co., Ltd. ll rights reserved. 3/5 2.7 - Rev.
STTIC DRIN-SOURCE ON-STTE RESISTNCE : R DS ( ON )[mω] 5 4 3 2 I D =.5 I D =.7 5 5 SWITCHING TIME : t [ns] t d(on) t d(off).. t f t r V DD = 5V V GS = V R G =Ω GTE-SOURCE VOLTGE : V GS [V] 8 6 4 2 V DD = 5V I D =.5 R G =Ω 2 3 4 5 6 7 GTE-SOURCE VOLTGE : V GS [V] DRIN-CURRENT : I D [] TOTL GTE CHRGE : Qg [nc] Fig. Static Drain-Source On-State Resistance vs. Gate Source Voltage Fig. Switching Characteristics Fig.2 Dynamic Input Characteristics CPCITNCE : C [pf] Crss Ciss Coss f=mhz V GS =V.. DRIN-SOURCE VOLTGE : V DS [V] Fig.3 Typical Capacitance vs. Drain-Source Voltage 2 ROHM Co., Ltd. ll rights reserved. 4/5 2.7 - Rev.
Measurement circuits ID RL VDS Pulse Width % 5% 9% 5% D.U.T. % % RG VDD VDS td(on) 9% 9% tr td(off) tf ton toff Fig.- Switching time measurement circuit Fig.-2 Switching Waveforms VG ID VDS Qg IG(Const.) D.U.T. RL Qgs Qgd RG VDD Charge Fig.2- Gate charge measurement circuit Fig.2-2 Gate Charge Waveform Notice This product might cause chip aging and breakdown under the large electrified environment. Please consider to design ESD protection circuit. 2 ROHM Co., Ltd. ll rights reserved. 5/5 2.7 - Rev.
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