Dual Precision, Low Cost, High Speed BiFET Op Amp AD712-EP

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Dual Precision, Low Cost, High Speed BiFET Op Amp FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range ( 55 C to +125 C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request Enhanced replacement for LF412 and TL82 AC performance Settles to ±.1% in 1. μs 16 V/μs minimum slew rate 3 MHz minimum unity-gain bandwidth DC performance 15 V/mV minimum open-loop gain Available in a SOIC_N package CONNECTION DIAGRAM AMPLIFIER NO. 1 AMPLIFIER NO. 2 OUTPUT 1 8 V+ INVERTING INPUT 2 7 OUTPUT NONINVERTING 3 6 INVERTING INPUT INPUT V 4 5 NONINVERTING INPUT Figure 1. 8-Lead SOIC_N (R-Suffix) 9285-1 GENERAL DESCRIPTION The is a high speed, precision, monolithic operational amplifier offering high performance over the military temperature range of 55 C to +125 C. Its low offset voltage and offset voltage drift are the results of advanced laser wafer trimming technology. These performance benefits allow the user to easily upgrade existing designs that use older precision BiFET or bipolar op amps. The superior ac and dc performance of this op amp makes it suitable for active filter applications. With a slew rate of 16 V/μs and a settling time of 1 μs to ±.1%, the is ideal as a buffer for 12-bit digital-to-analog converters (DACs) and 12-bit analog-to-digital converters (ADCs) and as a high speed integrator. The combination of excellent noise performance and low input current also make the useful for photodiode preamps. Common-mode rejection of 88 db and open-loop gain of 4 V/mV ensure 12-bit performance even in high speed unitygain buffer circuits. The is available in an 8-lead SOIC_N package. Additional applications information is available in the AD712 data sheet. Rev. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 62-96, U.S.A. Tel: 781.329.47 www.analog.com Fax: 781.461.3113 Analog Devices, Inc. All rights reserved.

TABLE OF CONTENTS Features... 1 Connection Diagram... 1 General Description... 1 Revision History... 2 Specifications... 3 Absolute Maximum Ratings...5 ESD Caution...5 Typical Performance Characteristics...6 Outline Dimensions... Ordering Guide... REVISION HISTORY 8/ Revision : Initial Version Rev. Page 2 of 12

SPECIFICATIONS VS = ±15 V @ TA = 25 C, unless otherwise noted. Table 1. Parameter Min Typ Max Unit INPUT OFFSET VOLTAGE 1 Initial Offset.3 3 mv TMIN to TMAX 4 mv vs. Temperature 7 μv/ C vs. Supply 76 95 db TMIN to TMAX 76 db Long-Term Offset Stability 15 μv/month INPUT BIAS CURRENT 2 VCM = V 25 75 pa VCM = V @ TMAX 26 77 na VCM = ± V pa INPUT OFFSET CURRENT VCM = V 25 pa VCM = V @ TMAX 11 26 na MATCHING CHARACTERISTICS Input Offset Voltage 3 mv TMIN to TMAX 4 mv Input Offset Voltage Drift μv/ C Input Bias Current 25 pa Crosstalk At f = 1 khz 1 db At f = khz 9 db FREQUENCY RESPONSE Small Signal Bandwidth 3. 4. MHz Full Power Response khz Slew Rate 16 V/μs Settling Time to.1% 1. 1.2 μs Total Harmonic Distortion.3 % INPUT IMPEDANCE Differential 3 12 5.5 Ω pf Common Mode 3 12 5.5 Ω pf INPUT VOLTAGE RANGE Differential 3 ± V Common-Mode Voltage 4 +14.5, 11.5 V TMIN to TMAX VS + 4 +VS 2 V Common-Mode Rejection Ratio VCM = ± V 76 88 db TMIN to TMAX 76 84 db VCM = ±11 V 7 84 db TMIN to TMAX 7 8 db INPUT VOLTAGE NOISE.1 Hz to Hz 2 μv p-p f = Hz 45 nv/ Hz f = Hz 22 nv/ Hz f = 1 khz 18 nv/ Hz f = khz 16 nv/ Hz INPUT CURRENT NOISE f = 1 khz.1 pa/ Hz Rev. Page 3 of 12

Parameter Min Typ Max Unit OPEN-LOOP GAIN 15 V/mV TMIN to TMAX V/mV OUTPUT CHARACTERISTICS Output Voltage Swing High 13.9 13. V TMIN to TMAX 12. V Output Voltage Swing Low 12.5 13.1 V TMIN to TMAX 12. V Current 25 ma POWER SUPPLY Rated Performance ±15 V Operating Range ±4.5 ±18 V Quiescent Current 5. 6.8 ma 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = 25 C. 2 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = 25 C. For higher temperatures, the current doubles every C. 3 Defined as voltage between inputs, such that neither exceeds ± V from ground. 4 Typically exceeding 14.1 V negative common-mode voltage on either input results in an output phase reversal. Rev. Page 4 of 12

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage ±18 V Internal Power Dissipation 1 Input Voltage 2 ±18 V Output Short-Circuit Duration Indefinite Differential Input Voltage +VS and VS Storage Temperature Range 65 C to +125 C Operating Temperature Range 55 C to +125 C Lead Temperature Range (Soldering 6 sec) 3 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 1 Thermal characteristics: 8-lead SOIC_N, θja = C. 2 For supply voltages less than ±18 V, the absolute maximum voltage is equal to the supply voltage. Rev. Page 5 of 12

TYPICAL PERFORMANCE CHARACTERISTICS 6 INPUT VOLTAGE SWING (V) 15 5 R L = 2kΩ 25 C QUIESCENT CURRENT (ma) 5 4 3 5 15 SUPPLY VOLTAGE ± V Figure 2. Input Voltage Swing vs. Supply Voltage 9285-2 2 5 15 SUPPLY VOLTAGE ± V Figure 5. Quiescent Current vs. Supply Voltage 9285-5 6 OUTPUT VOLTAGE SWING (V) 15 5 +V OUT V OUT R L = 2kΩ 25 C INPUT BIAS CURRENT (V CM = ) (Amps) 7 8 9 11 5 15 SUPPLY VOLTAGE ± V Figure 3. Output Voltage Swing vs. Supply Voltage 9285-3 12 6 4 4 6 8 1 14 TEMPERATURE ( C) Figure 6. Input Bias Current vs. Temperature 9285-6 3 OUTPUT VOLTAGE SWING (V p-p) 25 15 5 ±15V SUPPLIES OUTPUT IMPEDANCE (Ω) 1..1 1k k LOAD RESISTANCE (Ω) Figure 4. Output Voltage Swing vs. Load Resistance 9285-4.1 1k k k 1M M FREQUENCY (Hz) Figure 7. Output Impedance vs. Frequency 9285-7 Rev. Page 6 of 12

MAX T GRADE LIMIT 8 8 INPUT BIAS CURRENT (pa) 75 5 25 V S = 15V 25 C OPEN-LOOP GAIN (db) 6 4 GAIN PHASE 2kΩ pf LOAD 6 4 PHASE MARGIN (Degrees) 5 5 COMMON-MODE VOLTAGE (V) Figure 8. Input Bias Current vs. Common-Mode Voltage 9285-8 1k k k 1M M FREQUENCY (Hz) Figure 11. Open-Loop Gain and Phase Margin vs. Frequency 9285-11 26 125 SHORT-CIRCUIT CURRENT LIMIT (ma) 24 22 18 16 14 12 OUTPUT CURRENT + OUTPUT CURRENT OPEN-LOOP GAIN (db) 1 115 1 5 R L = 2kΩ 25 C 6 4 4 6 8 1 14 AMBIENT TEMPERATURE ( C) Figure 9. Short-Circuit Current Limit vs. Temperature 9285-9 95 5 15 SUPPLY VOLTAGE ± V Figure 12. Open-Loop Gain vs. Supply Voltage 9285-12 5. 1 UNITY-GAIN BANDWIDTH (MHz) 4.5 4. 3.5 3. 6 4 4 6 8 1 14 TEMPERATURE ( C) Figure. Unity-Gain Bandwidth vs. Temperature 9285- POWER SUPPLY REJECTION (db) 8 6 4 V S = ±15V SUPPLIES WITH 1V p-p SINEWAVE 25 C + SUPPLY SUPPLY 1k k k 1M SUPPLY MODULATION FREQUENCY (Hz) Figure 13. Power Supply Rejection vs. Frequency 9285-13 Rev. Page 7 of 12

7 CMR (db) 8 6 4 V S = ±15V V CM = 1V p-p 25 C THD (db) 8 9 1 3V rms R L = 2kΩ C L = pf 1 1k k k 1M FREQUENCY (Hz) Figure 14. Common-Mode Rejection (CMR) vs. Frequency 9285-14 13 1k k k FREQUENCY (Hz) Figure 17. Total Harmonic Distortion (THD) vs. Frequency 9285-17 OUTPUT VOLTAGE SWING (V p-p) 3 25 15 5 R L = 2kΩ 25 C V S = ±15V INPUT NOISE VOLTAGE (nv/ Hz) 1k k 1M M FREQUENCY (Hz) Figure 15. Large Signal Frequency Response 9285-15 1 1 1k k k FREQUENCY (Hz) Figure 18. Input Noise Voltage Spectral Density 9285-18 25 OUTPUT SWING FROM V TO ±VOLTS 8 6 4 2 2 4 6 8 1%.1%.1% ERROR 1%.1%.1% SLEW RATE (V/µs) 15 5.5.6.7.8.9 1. SETTLING TIME (µs) Figure 16. Output Swing and Error vs. Settling Time 9285-16 3 4 5 6 7 8 9 INPUT ERROR SIGNAL (mv) (AT SUMMING JUNCTION) Figure 19. Slew Rate vs. Input Error Signal 9285-19 Rev. Page 8 of 12

25 SLEW RATE (V/µs) 15 6 4 4 6 8 1 14 TEMPERATURE ( C) Figure. Slew Rate vs. Temperature 9285- Rev. Page 9 of 12

OUTLINE DIMENSIONS 5. (.1968) 4.8 (.189) 4. (.1574) 3.8 (.1497) 8 5 1 4 6. (.2441) 5.8 (.2284).25 (.98). (.4) COPLANARITY. SEATING PLANE 1.27 (.5) BSC 1.75 (.688) 1.35 (.532).51 (.1).31 (.122) 8.25 (.98).17 (.67).5 (.196).25 (.99) 1.27 (.5).4 (.157) 45 COMPLIANT TO JEDEC STANDARDS MS-12-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 21. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 1247-A ORDERING GUIDE Model 1 Temperature Range Package Description Package Option AD712TRZ-EP 55 C to +125 C 8-Lead SOIC_N R-8 AD712TRZ-EP-R7 55 C to +125 C 8-Lead SOIC_N R-8 1 Z = RoHS Compliant Part. Rev. Page of 12

NOTES Rev. Page 11 of 12

NOTES Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D9285--8/() Rev. Page 12 of 12