Ultrafast Rectifier, 15 A FRED Pt

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Ultrafast Rectifier, 5 FRED Pt TO-63 (D PK) ase cathode TO-6 FETURES State of the art low forward voltage drop Ultrafast recovery time 75 C operating junction temperature Low leakage current Designed and qualified according to JEDEC -JESD 47 Material categorization: for definitions of compliance please see /doc?999 3 3 N/C node N/C node VS-ETL506S-M3 VS-ETL506--M3 PRODUCT SUMMRY Package TO-63 (D PK), TO-6 I F(V) 5 V R 600 V V F at I F 0.85 V t rr (typ.) 60 ns T J max. 75 C Diode variation Single die DESCRIPTION State of the art, ultralow V F, soft-switching ultrafast rectifiers optimized for Discontinuous (Critical) Mode (DCM) Power Factor Correction (PFC). The minimized conduction loss, optimized stored charge and low recovery current minimized the switching losses and reduce over dissipation in the switching element and snubbers. The device is also intended for use as a freewheeling diode in power supplies and other power switching applications. PPLICTIONS C/DC SMPS 70 W to 400 W e.g. laptop and printer C adaptors, desktop PC, TV and monitor, games units, and DVD C/DC power supplies. SOLUTE MXIMUM RTINGS PRMETER SYMOL TEST CONDITIONS MX. UNITS Repetitive peak reverse voltage V RRM 600 V verage rectified forward current I F(V) T C = 5 C 5 Non-repetitive peak surge current I FSM T C = 5 C 00 Operating junction and storage temperatures T J, T Stg -65 to +75 C ELECTRICL SPECIFICTIONS (T J = 5 C unless otherwise specified) PRMETER SYMOL TEST CONDITIONS MIN. TYP. MX. UNITS reakdown voltage, blocking voltage V R, V R I R = 0 μ 600 - - I F = 5-0.99.07 V Forward voltage V F I F = 5, T J = 50 C - 0.85 0.9 V R = V R rated - 0.0 5 Reverse leakage current I R T J = 50 C, V R = V R rated - 6 0 μ Junction capacitance C T V R = 600 V - - pf Series inductance L S Measured lead to lead 5 mm from package body - 8.0 - nh Revision: 09-Jul-5 Document Number: 93579 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

DYNMIC RECOVERY CHRCTERISTICS (T J = 5 C unless otherwise specified) PRMETER SYMOL TEST CONDITIONS MIN. TYP. MX. UNITS I F =, di F /dt = 0 /μs, V R = 30 V - 60 Reverse recovery time t rr I F = 5, di F /dt = 0 /μs, V R = 30 V - 85 70 T J = 5 C - - ns T J = 5 C - 90 - Peak recovery current I RRM T J = 5 C I F = 5-0 - di F /dt = 00 /μs T J = 5 C V R = 390 V - 6 - T J = 5 C -. - Reverse recovery charge Q rr T J = 5 C - 4.0 - μc THERML - MECHNICL SPECIFICTIONS PRMETER SYMOL TEST CONDITIONS MIN. TYP. MX. UNITS Maximum junction and storage temperature range T J, T Stg -65-75 C Thermal resistance, junction to case R thjc -.3.5 C/W Thermal resistance, junction to ambient R thj Typical socket mount - - 70 Thermal resistance, case to heatsink R thcs Mounting surface, flat, smooth and greased - 0.5 - Weight Mounting torque Marking device Case style D PKp Case style TO-6 -.0 - g - 0.07 - oz. 6 (5) - () ETL506S ETL506- kgf cm (lbf in) Instantaneous Forward Current () I F - 0 T J = 75 C T J = 5 C T J = 50 C 0.4 0.6 0.8.0..4.6 V FM - Forward Voltage Drop (V) Fig. - Typical Forward Voltage Drop Characteristics I R - Reverse Current (μ) 0 0. 0.0 0.00 75 C 50 C 5 C 0 C 75 C 50 C 5 C 0.000 0 00 300 400 500 600 V R - Reverse Voltage (V) Fig. - Typical Values of Reverse Current vs. Reverse Voltage Revision: 09-Jul-5 Document Number: 93579 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

C T - Junction Capacitance (pf) 00 0 0 0 00 300 400 500 600 V R - Reverse Voltage (V) Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage Z thjc - Thermal Impedance ( C/W) 0. D = 0.5 D = 0. D = 0. D = 0.05 D = 0.0 D = 0.0 Single Pulse (Thermal Resistance) 0.0 E-05 E-04 E-03 E-0 E-0 E+00 t - Rectangular Pulse Duration (s) Fig. 4 - Max. Thermal Impedance Z thjc Characteristics llowable Case Temperature ( C) 80 70 60 50 40 30 DC 0 4 8 6 0 4 I F(V) - verage Forward Current () verage Power Loss (W) 0 5 5 0 RMS Limit D = 0.0 D = 0.0 D = 0.05 D = 0. D = 0. D = 0.5 DC 0 4 8 6 0 4 I F(V) - verage Forward Current () Fig. 5 - Maximum llowable Case Temperature vs. verage Forward Current Fig. 6 - Forward Power Loss Characteristics Revision: 09-Jul-5 3 Document Number: 93579 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

400 6 350 5 300 I F = 5, 5 C 4 I F = 5, 5 C t rr (ns) 50 Q rr (nc) 3 I F = 5, 5 C 00 I F = 5, 5 C 50 typical value 0 0 00 di F /dt (/μs) Fig. 7 - Typical Reverse Recovery Time vs. di F /dt typical value 0 0 00 di F /dt (/μs) Fig. 8 - Typical Stored Charge vs. di F /dt V R = 00 V L = 70 μh 0.0 Ω di F /dt adjust G D IRFP50 D.U.T. S Fig. 9 - Reverse Recovery Parameter Test Circuit (3) t rr 0 I F t a tb () I RRM (4) Q rr 0.5 I RRM di (rec)m /dt (5) 0.75 I RRM () di F /dt () di F /dt - rate of change of current through zero crossing () I RRM - peak reverse recovery current (3) t rr - reverse recovery time measured from zero crossing point of negative going I F to point where a line passing through 0.75 I RRM and 0.50 I RRM extrapolated to zero current. (4) Q rr - area under curve defined by t rr and I RRM t rr x I Q RRM rr = (5) di (rec)m /dt - peak rate of change of current during t b portion of t rr Fig. - Reverse Recovery Waveform and Definitions Revision: 09-Jul-5 4 Document Number: 93579 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

ORDERING INFORMTION TLE Device code VS- E T L 5 06 S TRL -M3 3 4 5 6 7 8 9 - product - Circuit configuration E = single diode 3 - T = TO-0 4 - L = ultrafast recovery time 5 - Current code (5 = 5 ) 6 - Voltage code (06 = 600 V) 7 - S = D PK - - = TO-6 8 - None = tube (50 pieces) - TRL = tape and reel (left oriented, for D PK package) - TRR = tape and reel (right oriented, for D PK package) 9 - -M3 = halogen-free, RoHS-compliant, and terminations lead (Pb)-free ORDERING INFORMTION (Example) PREFERRED P/N QUNTITY PER TUE MINIMUM ORDER QUNTITY PCKGING DESCRIPTION VS-ETL506S-M3 50 00 ntistatic plastic tube VS-ETL506--M3 50 00 ntistatic plastic tube VS-ETL506STRR-M3 800 800 3" diameter reel VS-ETL506STRL-M3 800 800 3" diameter reel LINKS TO RELTED DOCUMENTS Dimensions TO-63 (D PK) /doc?95046 TO-6 /doc?9549 Part marking information TO-63 (D PK) /doc?95444 TO-6 /doc?95443 Packaging information TO-63 (D PK) /doc?9503 Revision: 09-Jul-5 5 Document Number: 93579 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

DIMENSIONS in millimeters and inches D PK Outline Dimensions Conforms to JEDEC outline D PK (SMD-0) (3) L ()(3) E 4 c (E) (D) (3) Pad layout.00 MIN. (0.43) 9.65 MIN. (0.38) D L x e 3 H () x b x b C Detail 0.0 M M c ± 0.004 M E View - H (3) 7.90 (0.70) 5.00 (0.65).3 MIN. (0.08) Plating.64 (0.3).4 (0.096) (4) b, b3 3.8 MIN. (0.5) ase Metal Gauge plane Lead tip 0 to 8 L3 L L4 Detail Rotated 90 CW Scale: 8: Seating plane (c) (b, b) Section - and C - C Scale: None c (4) SYMOL MILLIMETERS INCHES MILLIMETERS INCHES NOTES SYMOL MIN. MX. MIN. MX. MIN. MX. MIN. MX. NOTES 4.06 4.83 0.60 0.90 D 6.86 8.00 0.70 0.35 3 0.00 0.54 0.000 0.0 E 9.65.67 0.380 0.40, 3 b 0.5 0.99 0.00 0.039 E 7.90 8.80 0.3 0.346 3 b 0.5 0.89 0.00 0.035 4 e.54 SC 0.0 SC b.4.78 0.045 0.070 H 4.6 5.88 0.575 0.65 b3.4.73 0.045 0.068 4 L.78.79 0.070 0. c 0.38 0.74 0.05 0.09 L -.65-0.066 3 c 0.38 0.58 0.05 0.03 4 L.7.78 0.050 0.070 c.4.65 0.045 0.065 L3 0.5 SC 0.0 SC D 8.5 9.65 0.335 0.380 L4 4.78 5.8 0.88 0.08 Notes () Dimensioning and tolerancing per SME Y4.5 M-994 () Dimension D and E do not include mold flash. Mold flash shall not exceed 0.7 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body (3) Thermal pad contour optional within dimension E, L, D and E (4) Dimension b and c apply to base metal only (5) Datum and to be determined at datum plane H (6) Controlling dimension: inch (7) Outline conforms to JEDEC outline TO-63 Revision: 08-Jul-5 Document Number: 95046 For technical questions within your region: Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUJECT TO CHNGE WITHOUT NOTICE. THE PRODUCTS DESCRIED HEREIN ND THIS DOCUMENT RE SUJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?900

Outline Dimensions TO-6 DIMENSIONS in millimeters and inches Modified JEDEC outline TO-6 (Datum ) () (3) E (3) L c E D Seating plane D(3) L C 3 C L () x e 0.0 M M Lead tip 3 x b 3 x b c Lead assignments Diodes. - node (two die)/open (one die)., 4. - Cathode 3. - node Plating c E Section - (4) ase b, b3 metal (b, b) (3) c (4) Section - and C - C Scale: None SYMOL MILLIMETERS INCHES MIN. MX. MIN. MX. NOTES 4.06 4.83 0.60 0.90.03 3.0 0.080 0.9 b 0.5 0.99 0.00 0.039 b 0.5 0.89 0.00 0.035 4 b.4.78 0.045 0.070 b3.4.73 0.045 0.068 4 c 0.38 0.74 0.05 0.09 c 0.38 0.58 0.05 0.03 4 c.4.65 0.045 0.065 D 8.5 9.65 0.335 0.380 D 6.86 8.00 0.70 0.35 3 E 9.65.67 0.380 0.40, 3 E 7.90 8.80 0.3 0.346 3 e.54 SC 0.0 SC L 3.46 4. 0.530 0.555 L -.65-0.065 3 L 3.56 3.7 0.40 0.46 Notes () Dimensioning and tolerancing as per SME Y4.5M-994 () Dimension D and E do not include mold flash. Mold flash shall not exceed 0.7 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body (3) Thermal pad contour optional within dimension E, L, D and E (4) Dimension b and c apply to base metal only (5) Controlling dimension: inches (6) Outline conform to JEDEC TO-6 except (maximum), b (minimum) and D (minimum) where dimensions derived the actual package outline Document Number: 9549 For technical questions within your region, please contact one of the following: Revision: 04-Oct- Diodesmericas@vishay.com, Diodessia@vishay.com, DiodesEurope@vishay.com

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