LINEAR IC APPLICATIONS

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1 B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14 1 (a) Why is R e in an emitter-coupled differential amplifier replaced by a constant current source? (b) Draw the circuit for the above. (c) Explain why the network replacing R e acts as an approximately constant current I O. (d) Explain how I O is made to be independent of temperature. 2 (a) Draw the equivalent circuit of an Op-amp, explain the operation. (b) Determine the emitter current in transistor Q3 of figure 1. If V BE = 0.7 V and β = 100. Figure: 1 3 (a) In an integrator circuit, R i C F = 1 sec, and the input is a step signal with V in = 2 V for 0 t 4 sec. Determine the output voltage and sketch it. (b) Draw and explain the operation of current to voltage converter. If 741 IC is used, what is the lowest value of current that can be measured? 4 (a) Draw the circuit of log amplifier with saturation current and temperature compensation and explain the operation. (b) List the conditions for oscillations for RC phase shift, Wien-bridge and quadrature oscillators. 5 (a) A low pass buffer worth filter is to be designed to have a 3 db band width of 200 Hz and an attenuation of 50 db at 400 Hz. Find the order of filter. (b) Discuss the disadvantages of passive filters. 6 (a) Give the block diagram of PLL and explain about each block in detail. (b) Define the following terms with reference to PLL: (i) Lock range. (ii) Capture range. (iii) Pull-in-time. 7 (a) Explain the operation of a successive approximation type analog to digital converter. (b) An 8-bit analog to digital converter has a supply voltage of +12 volts. Calculate: (i) The voltage step size for LSB. (ii) The value of analog input voltage for a digital output of 01001011. 8 (a) Explain different applications of multiplier circuits. (b) What is analog switch? Explain the different analog switches with suitable diagrams

2 B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14 1 Write short notes on: (a) Level translator. (b) DC coupling. (c) Cascaded differential amplifier stages. 2 In figure shown is a differential amplifier using ideal op-amp. (a) Find the output voltage Vo. (b) Show that the output corresponding common mode voltage VCM = (V 1 + V 2 )/2 is zero if R /R = R 2 /R 1. Find Vo in this case (c) Find the CMRR of the amplifier if R /R R 2 /R 1. 3 (a) Draw the circuit diagram of a three input inverting type summing amplifier and derive the expression for the output voltage. (b) Briefly explain why negative feedback is desirable in amplifier applications. (c) How does negative feedback affect the performance of an inverting amplifier? 4 (a) Write the operation of a monostable multivibrator using Op-amp and calculate the duty cycle of it. (b) Describe the principle of operation of a precision half wave rectifier with waveforms. 5 (a) What is band pass filter and what are the two types of band pass filters? (b) Design a notch filter to eliminate 50 Hz frequency signal. 6 (a) What are the important blocks of PLL? What is the role of each block? Explain in detail. (b) Give any two applications of PLL and explain about each application in detail. 7 (a) Draw a schematic diagram of a D/A converter. Use resistance values whose rations are multiples of 2. Explain the operation of the converter. (b) Draw the block diagram of a converting 4-bit A/D converter and explain its operation. Sketch the output waveform. 8 (a) List out the application of multiplier. (b) Derive the output voltage expression for squaring circuit and square root circuit.

3 B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14 1 (a) What are the merits and demerits of differential amplifier? (b) What type of signal can a differential amplifier amplify? (c) What are the four different configuration of differential amplifier? (d) Which one is not commonly used and why? 2 (a) What is thermal drift? How does it affect the performance of an Op-amp circuit? Explain with necessary examples. (b) Define slew rate and derive the expression for it. List the causes of slew rate. 3 (a) Given that the circuit of figure below yields i o = A( V 2 V 1 ) (1/R o ) V L, find expression for A and R o, as well as condition among the resistance that yields R o =. (b) Derive the expression for the output voltage of a non- inverting amplifier. 4 (a) What is clipper? Draw the schematic of positive clipper and explain its operation. (b) What is the necessity of log amplifier? Derive the expression for the output voltage. 5 (a) Design a wide band reject filter having f 1 = 200 Hz and f 2 = 1 KHz. (b) What is band elimination filter? Draw its frequency response. 6 Draw the functional block diagram of 555 IC timer. Explain the function of each block so also explain how it can be used as monostable multivibrator. Draw the circuit and explain its operation with neat relevant waveforms and derive the pulse width. 7 (a) Compare different A/D converters for their merits and demerits. (b) Give the schematic circuit diagram of a successive approximation type A/D converter and explain the operations of this system. 8 Briefly explain the balanced modulator using diodes with positive half cycle of carrier signal and negative half cycle of carrier signal.

B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14 1 (a) A differential amplifier has a common a common mode gain A C = 0.1 and difference mode gain A d = 200. Let the input signal be V 1 = 1050 μv and V 2 = 950 μv. Compute the output voltage and CMRR. (b) Discuss the properties of single ended input-balanced output differential amplifier configuration. 2 (a) Explain the parameters that are important for ac applications. (b) The CMRR of an op-amp is 10000. Two sets of signals are applied to it. First set is V 1 = +20 μv and V 2 = 20 μv and the second set is V 1 = 540 μv and V 2 = 500 μv. Calculate the percentage difference in output voltage for the two sets of signal. 3 (a) What is the voltage at point A and B for the circuit shown in figure below if V 1 = 5 V and V 2 = 5.1 V. 4 (b) Draw the circuit of non-inverting amplifier and derive the expression for output voltage. 4 (a) Explain the operation of sine wave generation circuit using Op-amps. (b) Design a Wein bridge oscillator using Op-amp that will oscillate at 2 KHz. 5 (a) Design a notch filter to eliminate 120 Hz hum. (b) What is the notch filter? Explain the operation of notch filter. 6 (a) Explain the operation of a free running astable multivibrator used as square wave generator. (b) Derive the expression for its frequency of oscillation. (c) If the values of components are given as positive feedback resistor R 2 = 13.92 K, negative feedback register R = 100 K, capacitor C = 0.01 μf input resistor at positive terminal R 1 = 12 K. What is the frequency of oscillation? 7 (a) Explain the operation of a successive approximation type analog to digital converter. (b) Calculate the number of bits required to represent a full scale voltage of 10 V with a resolution of 5 mv approximately. 8 (a) What is gyrator circuit? Explain its operation with a neat circuit diagram. (b) What is a sample and hold circuit? Why is it needed? With neat circuit diagram, describe the operation of an op-amp based sample and hold circuit.

R09 B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December 2014 1 (a) Determine the emitter current in transistor Q 3 of figure. If V BE = 0.7 V and β = 100. (b) Discuss the differences between the differential amplifiers used in the first two stages of op - amp. 2 (a) List out the ideal characteristics of an OP-AMP. (b) What is an OP-AMP? Why it is called so? (c) Why is it desirable for an op-amp to have a high CMRR? 3 (a) Using an Op-Amp powered from ± 15 V regulated supplies, design a photo detector amplifier such that as i 1 changes from 0 to 1 μa, V o changes form -5 V to +5 V. What is the minimum open-loop gain for a deviation of the transfer characteristics from the ideal of < 1%? (b) List out the advantages of instrumentation amplifier. 4 (a) What feedback is preferred for oscillators and why? What is the effect of negative feedback? (b) Derive the frequency of oscillation of a RC phase shift oscillator and explain the operation of the circuit. 5 (a) Explain the operation of first order high pass buffer worth filter. (b) Design a HPF at the cutoff frequency of 1 khz and a pass band gain of 2. 6 (a) Draw the block schematic of a PLL describing the function of each block briefly. (b) What is the purpose of law pass filter in a phase locked loop? Describe different types of law pass filters used in a PLL. 7 (a) Explain the operation of an op-amp based weighted resistor digital to analog converter through a neat circuit diagram. (b) Design a 4-bit weighted resistor DAC whose full-scale output voltage is 10 Volts. Assume R f = 10 k and logic 1 level as +5 volts. And logic 0 level as 0 volts. What is the output voltage when the input is 1011? 8 Derive the output voltage expression for: (a) Analog voltage multiplier circuit. (b) Analog voltage divider circuit.

1 B.Tech III Year I Semester (R09) Regular and Supplementary Examinations, November 2012 1 (a) List and compare the different configurations of differential amplifier. (b) Calculate the amplification factor for AC signal input in dual input balanced output differential amplifier. 2 (a) Draw and Explain the block diagram of Op-Amp. (b) Explain the term Slew Rate and how it affects the frequency response of an OP-AMP wit suitable examples? 3 (a) Draw a neat circuit diagram of an AC inverting amplifier. What are the major advantages and disadvantages of a single supply AC amplifier? (b) In an AC inverting amplifier circuit R in = 50 Ω, C i = 0.1μF, R 1 = 100 KΩ, R f = 1KΩ, R 2 = 10 KΩ and V CC = ±15V. Determine the bandwidth of the amplifier 4 (a) What is the difference between a basic comparator and the Schmitt trigger? Construct a Schmitt trigger circuit using OP-AMP and derive the threshold voltages. (b) Explain the operation of a free running astable multivibrator used as square wave generator. 5 (a) A Particular application requires that all frequency below 400 Hz should attenuate. The attenuation should be at least -22 db at 100 Hz. Design a filter to meet this requirement. (b) What do the characteristics of order and poles indicate. 6 (a) Explain the operation of astable multivibrator using 555 timers. (b) Design a square waveform generator of frequency 1 khz and duty cycle of 75%using 555 timers. 7 (a) What are the basic blocks preceding an Analog to Digital converter in a typical application like digital audio recording? (b) With the help of a neat circuit diagram and waveforms, explain the operation of a dual slope ADC. What are its special features? 8 What are all basic blocks of analog multiplexer? Explain how the data selections process is performed it.

2 B.Tech III Year I Semester (R09) Regular and Supplementary Examinations, November 2012 1 (a) Draw the schematic of emitter coupled differential amplifier, explain the operation. (b) What is level translator? What is the necessity of level translator stage in cascading of differential amplifiers? 2 (a) Calculate the exact closed loop gain of inverting amplifier shown in figure if AOL = 200 KΩ, Ri = 2 MΩ and R0 = 75Ω. (b) What are the three differential amplifier configurations? Compare and contrast these configurations. 3 (a) Derive the output voltage of an Op-Amp based differential amplifier. (b) Draw the circuit of a typical instrumentation amplifier. Why do we use two stage op-amp circuits as an instrumentation amplifier? Explain 4 (a) Draw the circuit diagram and sketch the input, output waveforms of an astable multivibrator using op-amp. (b) Derive the expressions for T1 and T2 of an astable multivibrator. 5 (a) Define pass band and stop band of filter. (b) Design a band pass filter so that f 0 = 2KHz,Q = 20 and A 0 = 10 Choose c = 1µF 6 (a) Draw the circuit of PLL as frequency multiplier and explain its working. (b) Explain block schematic of PLL. List the application of PLL. 7 (a) Explain the operation of a dual slope type Analog to Digital converter. (b) A dual slope Analog to Digital converter uses a 16-bit counter and operates at 4 MHz clock rate. The maximum input voltage is + 8volts. Find the value of integrator resistor R if the maximum output voltage of the integrator is - 6 volts after 2n counts for an integrator capacitor of 0.1μF. 8 Explain the use IC 1496 as AM modulator with necessary circuit diagram.

3 B.Tech III Year I Semester (R09) Regular and Supplementary Examinations, November 2012 1 (a) Draw the transfer characteristics of differential amplifier. Mention the advantages and limitations. (b) Draw the equivalent circuit of emitter coupled differential amplifier from which calculate A C. 2 (a) Explain the procedure for measuring offset voltage and bias currents of general purpose Op-Amp. (b) With neat block diagram explain the function of various building blocks of an OP-AMP. 3 (a) Draw the circuit diagram of inverting amplifier and explain the operation. (b) For the circuit shown in figure below calculate I 1, I L and V O with R 1 = 10 KΩ, R f =100 KΩ, Vi = 1V, R L = 25 KΩ. 4 (a) With suitable circuit diagram explain the operation of a triangular wave generator using a comparator and a integrator. (b) Draw a sample and hold circuit and explain its operation with necessary input and output waveforms and indicate its uses. 5 (a) What are the two conditions to have satisfactory operation of wide band reject filter? (b) Design a wide band reject filter having F H = 400 Hz and F L = 2 KHz with a pass band gain of 2. 6 (a) Draw the block schematic of a 566 voltage controlled oscillator IC. (b) Derive an expression for the voltage to frequency conversion factor of 566 VCO. 7 (a) Explain the operation of a counter type of Analog to Digital converter. (b) Specify the modifications necessary in the circuit for a time varying analog input voltage. (c) Calculate the conversion time for a full scale input in case of a 12-bit counter type Analog to Digital converter driven by 2 MHz clock. 8 Derive the output voltage expression for: (a) Frequency doublers. (b) Phase angle detection.

4 B.Tech III Year I Semester (R09) Regular and Supplementary Examinations, November 2012 1 (a) List out different configurations of differential amplifier. Explain any one of them in detail. (b) Explain the use of constant bias circuit in operation of differential amplifier. 2 (a) Draw the internal block diagram of an operation amplifier. Explain the operation of each block. (b) Define Drift. Explain how drift can be compensated in Op-Amps with proper example. 3 (a) Explain how the operational amplifier can be used as a Differentiator and Integrator. (b) What is a voltage follower? What are its features and applications? 4 (a) Distinguish between astable, bistable and monostable multivibrators. (b) With the help of a neat circuit diagram explain the working of a logarithmic amplifier. 5 (a) Design a Twin T notch filter? (b) Draw & explain the frequency response of Twin-T notch filter. 6 (a) Draw the schematic circuit diagram of the following and explain their working. (i) Analog phase detector (ii) VCO. Derive necessary expressions. (b) What is their role is in PLL? Explain. 7 (a) With a neat circuit diagram explain the functioning of an inverted R-2R ladder type Digital to Analog converter (b) The LSB of a 10-bit DAC is 20 m volts. (i) What is its percentage resolution? (ii) What is its full-scale range? (iii) What is the output voltage for an input, 10110 01101? 8 (a) Draw the circuit diagram of sample and hold circuit and explain its working. (b) Draw the circuit diagram IC 1496 balanced modulator circuit and explain its Operations. Sketch the output waveform for the square wave inputs with a Phase difference φ.

Code: 13A04503 R13 B.Tech III Year I Semester (R13) Regular Examinations December 2015 Time: 3 hours Max. Marks: 70 PART A (Compulsory Question) 1 Answer the following: (10 X 02 = 20 Marks) (a) Draw the ideal voltage transfer curve of Op amp. (b) Determine the output voltage for the inverting amplifier if the gain and the input voltage of the Op amp is 1000 and 20 mv dc respectively. (c) List out the properties of practical Op amp. (d) Draw the frequency responses (Gain Vs frequency) of open loop and closed loop operational amplifier. (e) Design a first order low pass filter at a higher cut off frequency of 1 khz with a pass band gain of 2? (f) Draw the circuit diagram of non-inverting Summing amplifier. (g) Draw the circuit diagram and waveforms of zero crossing detector. (h) List out the applications of MPY634. (i) Define resolution and settling time. (j) What are the main advantages of integrated type ADC? PART B (Answer all five units, 5 X 10 = 50 Marks) UNIT I 2 (a) Compare different configurations of differential amplifier. (b) Draw the circuit of basic current mirror and explain its operation. OR 3 (a) Draw the various functional blocks of an operational amplifier IC. Explain each block. (b) Draw the equivalent circuit diagram of Op amp and derive the expression for gain of non-inverting amplifier. UNIT II 4 Explain in detail about external frequency compensation techniques with neat sketches. OR 5 (a) Define slew rate and derive the expression for it. (b) Derive the input resistance and output resistance for a voltage shunt feedback amplifier. UNIT III 6 (a) Design a differentiator to differentiate an input signal that varies in frequency from 10 Hz to about 1 khz. (b) Write short notes on V-I and I-V converters using op-amps. OR 7 Draw the circuit diagram of Instrumentation Amplifier and derive the expression for gain. UNIT IV 8 (a) Design a 555 Astable Multivibrator to operate at 10 khz with 40% duty cycle. (b) Draw the block diagram of PLL and explain its operation. OR 9 Draw the circuit diagram of RC phase shift oscillator and derive the expression for its frequency of oscillations. UNIT V 10 Draw the circuit diagram of Dual Slope ADC and explain its working with neat sketches. OR 11 (a) Explain the operation of Weighted Resistor DAC with the help of circuit diagram. (b) The basic step of a 9 bit DAC is 10.3 mv. If 000000000 represents 0 V. What output is produced if the input is 101101111?