Bidirectional Symmetrical (BiSy) Single Line ESD-Protection Diode in Silicon Package 22543 22544 MRKING (example only) 1.3 XY 1 = year code Open circle = month code and pin 1 XY = type code DESIGN SUPPORT TOOLS Models vailable 22454.6 click logo to get started.27 FETURES Ultra compact CLP63-2L package Low package height <.3 mm 1-line ESD-protection EC-Q11 qualified available Working range ± 1 V Low leakage current <.1 μ Low load capacitance C D = 7.7 pf (typ.) ESD-protection acc. IEC 6-4-2 ± 24 kv contact discharge ± 24 kv air discharge Lead plating: u (e4) Lead material: Ni Topside coating e4 - precious metal (e.g. g, u, NiPd, NiPdu) (no Sn) Material categorization: for definitions of compliance please see /doc?99912 ORDERING INFORMTION PRT NUMBER (EXMPLE) EC-Q11 QULIFIED ENVIRONMENTL ND QULITY CODE RoHS-COMPLINT + LED (Pb)-FREE TERMINTIONS GOLD PLTED PCKGING CODE 15K PER 7" REEL (8 mm TPE) 15K/BOX = MOQ ORDERING CODE (EXMPLE) GREEN - G 4-8 -G4-8 H G 4-8 HG4-8 PCKGE DT DEVICE NME PCKGE NME TYPE CODE WEIGHT SOLDERING CONDITIONS CLP63-2L 1.12 mg Peak temperature max. 26 C Reflow soldering according JEDEC STD- BSOLUTE MXIMUM RTINGS PRMETER TEST CONDITIONS SYMBOL VLUE UNIT Peak pulse current acc. IEC 6-4-5, 8/ μs/single shot I PPM 4 Peak pulse power Pin 1 to pin 2 acc. IEC 6-4-5; t p = 8/ μs; single shot P PP 72 W ESD immunity Contact discharge acc. IEC 6-4-2; 1 pulses ± 24 V ESD ir discharge acc. IEC 6-4-2; 1 pulses ± 24 kv Operating temperature Junction temperature T J -55 to +15 C Storage temperature T stg -55 to +15 C Rev. 1.4, 3-Jan-19 1 Document Number: 85937 RE SUBJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?9
CUT THE SPIKES WITH The is a Bidirectional and Symmetrical (BiSy) ESD-protection device which clamps positive and negative overvoltage transients to ground. Connected between the signal or data line and the ground the offers a high isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package size of the tiny CLP63-2L package the line inductance is very low, so that fast transients like and ESD-strike can be clamped with minimal over- or undershoots. ELECTRICL CHRCTERISTICS (T amb = 25 C, unless otherwise specified) PRMETER TEST CONDITIONS/REMRKS SYMBOL MIN. TYP. MX. UNIT Protection paths Number of lines which can be protected N channel - - 1 lines Reverse stand-off voltage Max. reverse working voltage V RWM - - 1 V Reverse voltage at I R =.1 μ V R 1 - - V Reverse current at V RWM = 1 V I R - - 5 n Reverse breakdown voltage at I R = 1 m V BR 11 12 13 V Reverse clamping voltage Capacitance Clamping voltage at I PP = 1 ; t p = 8/ μs V C - 13 15 V at I PP = I PPM = 4 ; t p = 8/ μs V C - 16 18 V at V R = V; f = 1 MHz C D - 7.7 9 pf at V R = 5 V; f = 1 MHz C D - 5.4 - pf Transmission Line Pulse (TLP); t p = ns I TLP = 8 V C-TLP - 15.3 - V Clamping voltage Transmission Line Pulse (TLP); t p = ns I TLP = 16 V C-TLP - 17.4 - V Dynamic resistance Transmission Line Pulse (TLP); t p = ns R DYN -.29 - Rev. 1.4, 3-Jan-19 2 Document Number: 85937 RE SUBJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?9
TYPICL CHRCTERISTICS (T amb = 25 C, unless otherwise specified) 1 8 xis Title Rise time =.7 ns to 1 ns 8 6 f = 1 MHz xis Title I ESD (%) 6 53 1st line C D (pf) 4 1st line 4 27 2 557 1-1 1 3 4 5 6 7 8 9 t (ns) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 6-4-2 (33 /15 pf) 22974 5 1 V R (V) Fig. 4 - Typical Capacitance vs. Reverse Voltage 1 xis Title 8 µs to % 3 25 Transmission line pulse (TLP): t p = ns 8 I PPM (%) 6 4 µs to 5 % 1st line V C-TLP (V) 15 1 5 548 1 1 3 4 t (µs) Fig. 2-8/ μs Peak Pulse Current Wave Form acc. IEC 6-4-5 22975 1 3 4 I TLP () Fig. 5 - Typical Clamping Voltage vs. Peak Pulse Current 15 1 15 V R (V) V C (V) 1 5 5.1.1 1 1 1 I R (µ) 22973 Fig. 3 - Typical Reverse Voltage vs. Reverse Current 22976 Measured according IEC 6-4-5 (8/ µs - wave form) 1 2 3 4 5 I PP () Fig. 6 - Typical Peak Clamping Voltage vs. Peak Pulse Current Rev. 1.4, 3-Jan-19 3 Document Number: 85937 RE SUBJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?9
PCKGE DIMENSIONS in millimeters (mils): CLP63-2L L e1 2 Package = chip dimensions in mm [mils] b D e 1 Millimeters mils min. nom. max. min. nom. max..25.28.3 9.84 11.2 11.81 1.1.1.2.39.39.79 2.24.27.28 9.45 1.63 11.2 C b D E.22.25.28 8.66 9.84 11.2.27.3.33 1.62 11.81 12.99.57.6.63 22.44 23.62 24.8 e.4 15.75 E e1 L.25 9.84.12.15.18 4.72 5.91 7.9 22941 2 terminal leadless package (CLP) Document no.: S8-V-396.4-23 (4) Created - Date: 22. Nov. 1 Rev.8 - Date: 11. Nov. 16 Footprint and soldering recommendation: please see pplication Note: /doc?85917 Rev. 1.4, 3-Jan-19 4 Document Number: 85937 RE SUBJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?9
CRRIER TPE in millimeters: CLP63-2L 2 ±.5 - Section Ø 1.55 ±.5 4 ±.1 1.75 ±.1.2 ±.2 Ø.2 ±.5 3.5 ±.5 8 + -.1.3.67±.3 max. 2 B B.33 ±.3 B-B Section 5.37 ±.3 Cummulative tolerances of 1 sprocket holes is +/-.2mm 22591 Document no. S8-V-396.4-25 (4) Created - Date: 22. Nov. 1 ORIENTTION IN CRRIER CLP63-2L Unreeling direction DETIL 5:1 Pin 1 CLP63 Top view 22936 Orientation in Carrier Tape (CLP63) S8-V-396.4-26 (4) 22.1.1 Rev. 1.4, 3-Jan-19 5 Document Number: 85937 RE SUBJECT TO SPECIFIC DISCLIMERS, SET FORTH T /doc?9
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