ADVANCES in NATURAL and APPLIED SCIENCES

ADVANCES in NATURAL and APPLIED SCIENCES ISSN: 1995-0772 Published BYAENSI Publication EISSN: 1998-1090 http://www.aensiweb.com/anas 2017 May 11(7): pages 288-295 Open Access Journal Three Level Boosting Power Factor Correction For Bldc Motor Using Field Programmable Gate Array 1 Velmurugan Ramakrishnan, 2 Mahadevan Krishnan, 3 Gerald Christopher Raj Iruthayaraj 1 Department of EEE, Christian college of engineering &tech, Oddanchatram, Dindigul, Tamilnadu, India. 2 Department of EEE, P.S.N.A college of engineering and technology Dindigul, Tamilnadu, India. 3 Department of EEE, P.S.N.A college of engineering and technology Dindigul, Tamilnadu, India. Received 28 January 2017; Accepted 12 May 2017; Available online 18 May 2017 Address For Correspondence: Velmurugan Ramakrishnan, Department of EEE, Christian college of engineering &tech, Oddanchatram, Dindigul, Tamilnadu, India. E-mail: velsvictor@gmail.com Copyright 2017 by authors and American-Eurasian Network for ScientificInformation (AENSI Publication). This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/ ABSTRACT Increasing energy efficiency is the goal of almost everyone these days. We know power factor is a measure of power quality and it is defined as the ratio between active and apparent power. Lagging power factor occurs in inductive loads like motor, switch mode power supplies (etc) and bad power factor will lead to power loss in the load and it causes unwanted money wastages. Nowadays, BLDC motor drives are becoming more popular in industrial and traction applications and we know FPGA is very advantageous over controllers. So in this project we explain how to do Power factor correction for a brushless dc motor using field programmable gate array (FPGA). The conventional boosting PFC converter, compare with the three-level boosting PFC converter has two cascaded switches and two cascaded capacitors across the dc-side voltage. A three level boost converter is adopted for single phase power factor correction(pfc),which uses a much smaller inductor and lower voltage devices than the conventional boost PFC converter does yielding high power density, high efficiency, and low cost. In this paper, without sensing the capacitor voltages is proposed with interleaved ac-dc and the total number of the feedback signals is saved and it is implemented in a Field Programmable Gate Array (FPGA). KEYWORDS: INTRODUCTION In recent year due to the power factor correction (PFC) requirement the boost converter has been widely used as the front end single phase PFC converter due to its step-up voltage conversion ratio continuous input current simple topology and high efficiency. To reduce the power transmission loss and increase the system stability, more and more power-electronics products are forced to include the power factor correction (PFC) function. Generally speaking, the PFC function includes shaping the ac-side current waveform and regulating the dc-side Voltage. Due to the characteristics of the continuous current, the boost-derived PFC converters have been widely used to achieve the desired PFC function. The brushless dc (BLDC) motors are widely used in a Aerospace, Automotive, Consumer, Medical, Industrial automation equipment and Instrumentation, because of their high efficiency, high starting torque, reliability, lower maintenance compared to its brushed dc motor. The ac-dc conversion of electric power is usually required for BLDC motor drive; nevertheless, it causes many current harmonics and results in the poor power factor at input ac mains. This paper deals with a three level boosting power factor correction (PFC) converter for a permanent magnet brushless dc Motor (PMBLDCM) implemented in a Field Programmable Gate Array (FPGA). ToCite ThisArticle: Velmurugan Ramakrishnan, Mahadevan Krishnan, Gerald Christopher Raj Iruthayaraj., Three Level Boosting Power Factor Correction For Bldc Motor Using Field Programmable Gate Array. Advances in Natural and Applied Sciences. 11(7); Pages: 288-295

289 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 1.1 Circuit diagram: Fig. 1: Circuit diagram of Existing System II. DC - DC converter: DC-DC converters are power electronic circuits commonly used as an interface between the voltage source and load served. There are several topologies, including Buck, Boost, Buck-Boost, SEPIC, Cuk, Fly back, etc. Buck and Boost topologies allow decreasing and increasing of the output voltage respectively, while the other ones can do both functions. The inductor allocation in a Buck-Boost converter is prone to float in switching operation, and create possible sparks. Fly back converter adds complexity and weight. Due to simplicity, maximum efficiency, low loss and safe operation mode of inductors, BOOST Converter was implemented in this project. DC-DC Converter is electronic devices used whenever we want to change dc electrical power efficiently from one voltage level to another. They are needed because unlike AC-DC can t simply be stepped up or down using a transformer. In many ways, a DC-DC Converter is the DC equivalent of a transformer. Boost converter is a type of DC-DC converter allowing the electrical potential (voltage) at its output to be greater than, the input; the output of the Boost is controlled by the duty cycle. 2.1 Principle of operation of existing system: The conventional boost dc/dc converter, the single switch needs to withstand the dc output voltage when the single switch blocks. As shown in the figure two cascaded switches and two cascaded capacitors are connected together in the three-level boosting dc/dc converter. When one of the switches conducts and the other blocks, the blocking switch needs to withstand only half dc output voltage if both capacitor voltages are balanced. If not balanced, one of the capacitor voltages may be larger than the breakdown voltage of the switch, which would contribute to make damage to the switch. It is noted that the inductor voltage in the three-level boost dc/dc converter has three levels, which makes the three-level boosting dc/dc converter to have smaller inductor current ripple than the boost converter under the same switching frequency. Therefore, the three-level boost converters are often used in the high-voltageratio applications, such as the fuel cell applications and the grid-connected applications. Thus, the three-level boost converter has the additional advantages of the low switching loss and the high efficiency. In the multi loop interleaved control combining the multi loop control and the interleaved PWM scheme was first proposed to control the three-level boosting PFC converter. As shown in Figure the multi loop control includes the feed forward loop, the inner current loop, and the outer voltage loop. However, the balance between two capacitor voltages should be noted. In practice, this matched capacitances and the mismatched equivalent series resistance (ESR) would result in the voltage imbalance. Therefore, the control of the three-level boosting converter needs to balance both capacitor voltages. 2.2 Modes of operation for three level boosting PFC converters: In figure 1, two triangular signals v tri1 and v tri2 are interleaved by 180. The conventional multi loop control generates the control signal vcont1, and then, the gate signalgt1 is generated from the comparison of the control signal v cont1 and the triangular signal v tri1.after sensing both capacitor voltages, the voltage imbalance is detected and the conventional CVBC generates the compensation signal Δ vcont. Then, the other control signal v cont2 is obtained by adding the compensation signal Δ vcont to the control signal v cont1. The gate signal GT2 is obtained from the comparison of the control signal v cont2 and the triangular signals v tri2. Due to the input inductor L and two diodes D1 and D2 in the three-level boosting PFC converter, both switches can be conducting at the same time without the concern of the short circuit damage. As plotted in Figure. 2, there are four switching states in the three-level boosting PFC converter.

290 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 Fig. 2: Possible switching states in the three-level boosting PFC converter: (a)state 1, (b) state 2, (c) state 3, and (d) state 4. Mode 1 Operation: In figure 2.(a), both switches turn ON in the switching state 1. Thus, the inductor voltage v L in the threelevel boosting PFC converter equals the rectified input voltage v L = v s and both capacitors supply energy to the load i C1 = i C2 = ( i d) < 0. Mode 2 Operation: In the switching state 2 in Figure 2.(b), the top switch turns ON and the bottom switch turns OFF. The resulting inductor voltage v L equals the rectified input voltage v s minus the bottom capacitor voltage v L = v s v C2. Additionally, the capacitor C 1 supplies energy to the load i C1 = ( i d ) < 0, but the capacitor C 2 stores the energy from the input voltage i C2 = (i L id ) > 0. Mode 3 Operation: Similarly, the resulting inductor voltage in Figure 2.(c) equals the rectified input voltage minus the top capacitor voltage v L = v s v C1. In the switching state 3, the top capacitor C 1 is charged i C1 = (i L i d ) > 0, but the bottom capacitor C 2 is discharged i C2 = ( i d ) < 0. Mode 4 Operation: When both switches turn OFF in Figure 2(d), the resulting inductor voltage equals the rectified input voltage minus the output voltage v L = v s v d = v s v C1 v C2. The rectified input voltage v s supplies the load current and charges both capacitors simultaneously i C1 = i C2 = (i L i d ) > 0. Fig. 3: Block Diagram of Proposed System Fig. 4: Circuit diagram for proposed system

291 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 III. Simulation diagram: Fig. 5: Three Level Boosting Converters with Voltage Balancing Circuit 3.1 Input voltage waveform of existing system: 100 Input Voltage,Current 80 60 Voltage,Current 40 20 0-20 -40-60 -80-100 9.75 9.8 9.85 9.9 9.95 10 Fig. 6: Input Voltage and Current Waveforms of Existing System The simulation results for the three-level boosting PFC converter at 300W are plotted in Fig. 6, respectively. The yielded input currents is are sinusoidal in phase with the input voltage v s. Both capacitor voltages have the average values equal to the half average value of the dc voltage v d even though the capacitances are mismatched. The obtained value ΔI vc approximates to zero in the steady state. The results show that the proposed SCVBC is able to achieve PFC function in the three-level boost converter without directly sensing capacitor voltages. 3.2 Output voltage and current waveforms of existing system: The output power changes from 300 W due to the change of the load resistance from 300 to 150 Ω. During the operation, the sinusoidal input current is i s always in phase with the input voltage v s and the output voltage v d is well regulated to the command 300 V, given figure.

292 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 output voltage 301.3 301.2 Voltage 301.1 301 300.9 Fig. 7: Output Voltage Waveforms of Existing System 300.8 9.75 9.8 9.85 9.9 9.95 10 In addition, the bottom capacitor voltage v C2 possesses larger voltage dip than the top capacitor voltage v C1, because that the capacitance C 2 is smaller than the other capacitance C 1. The significant dip in the difference ΔI vc can also be found during the transient operation. 3.3 Power Factor Measurement Block: Fig. 8: Sub system for Power factor measurement block 3.4 Input voltage and current waveforms of proposed system: Voltage,Current 2 1 0-1 Input Voltage VAC/50-2 9.75 9.8 9.85 9.9 9.95 10 Fig. 9: Input Current and Voltage Waveforms of Proposed System Figure 9. shows the waveform of V AC and I AC. From these waveforms, it is observed that the input line current is in phase with the input voltage. 3.5 Simulation waveform for power factor correction in proposed system:

293 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 Power factor 1.2 1 Power 0.8 0.6 0.4 0.2 Fig. 10: Power Factor Corrections in Proposed System 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 3.6 Output voltage and current waveforms of proposed system: 450 DC voltage output 400 350 Voltage 300 250 200 150 100 50 Fig. 11: Output Voltage Waveforms of Proposed System 0 0 1 2 3 4 5 6 7 8 9 10 For an input rms voltage of 100V, it produces an output DC voltage of 397V; the respective obtained results are displayed in Figure 11. IV. Hardware setup: Fig. 12: FPGA kit

294 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 4.1 Three-level boosting PFC converter kit: Fig. 13: Three-level boosting PFC converter kit 4.2 Hardware output: Fig. 14: Power factor reading at low speed Fig. 15: Power factor reading at rated speed (a) (b)

295 Velmurugan Ramakrishnan et al., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: 288-295 Fig. 16: Gate pulse for the BLDC Drives (c) Conclusion: In this project the SCVBC method for the three-level boosting PFC converter has been proposed. The proposed method shows that the voltage imbalance can be detected from sensing the inductor current by the proposed sampling and hold strategy. That is, it eliminates the need for extra sensors, reduces control complexity, reduces the cost, and the results of simulation shows that the power factor for a BLDC motor drive is improved near unity with the help of three-level boosting PFC converter and this control method is implemented in a FPGA-based system, and all the provided results demonstrate the proposed method. REFERENCES 1. Hung-Chi Chen, Member, IEEE and Jhen-Yu Liao, 2014. Design and Implementation of Sensor less Capacitor Voltage Balancing Control for Three-Level Boosting PFC IEEE TRANSACTIONS ON POWER ELECTRONICS, 29: 7. 2. Chen, H.C. and Wen-Jan Lin, 2014. MPPT and voltage balancing control with sensing only inductor current for PV-fed three-level boost-type converters, IEEE Trans. Power Electron., 29(1): 29-35. 3. Yang, L.S., T.J. Liang, H.C. Lee and J.F. Chen, 2011. Novel high step-up DC DC converter with coupledinductor and voltage-doubler circuits, IEEE Trans. Ind. Electron., 58(9): 4196-4206. 4. Shahin, M., J.P. Hinaje, S. Martin, S. Pierfederici, Rael and B. Davat, 2010. High voltage ratio DC DC converter for fuel-cell applications, IEEE Trans. Ind. Electron., 57(12): 3944-3955. 5. Kong, P., S. Wang and F.C. Lee, 2008. Common mode EMI noise suppression for bridgeless PFC.converters, IEEE Trans. Power Electron, 23(1): 291-297. 6. Jang, Y., M.M. Jovanovic and D.L. Dillman, 2008. Bridgeless PFC boost rectifier with optimized magnetic utilization, in Proc. IEEE Appl. Power Electron. Conf. Expo., pp: 1017-1021. 7. Todorovic, M.H., L. Palma and P.N. Enjeti, 2008. Design of a wide input range DC DC converter with a robust power control scheme suitable for fuel cell power conversion, IEEE Trans. Ind. Electron., 55(3): 1247 1255. 8. Tsai, H.-Y., T.-H. Hsia and D. Chen, 2007. A novel soft-switching bridgeless power factor correction circuit, in Proc. Eur. Conf. Power Electron. Appl., pp: 1-10. 9. Crebier, J.C., B. Revol and J.P. Ferrieux, 2005. Boost-chopper-derived PFC rectifiers: Interest and reality, IEEE Trans. Ind. Electron., 52(1): 36-45. 10. Singh, B., B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D.P. Kothari, 2003. A review of singlephase improved power quality AC-DC converters, IEEE Trans. Ind. Electron., 50(5): 962-981. 11. Simonetti, D.S.L., J. Sebastian and J. Uceda, 1997. The discontinuous conduction mode Sepic and Cuk power factor preregulators: Analysis and design, IEEE Trans. Ind. Electron., 44(5): 630-637. 12. Zhang, M.T., Y. Jiang, F.C. Lee and M.M. Jovanovic, 1995. Single-phase three-level boost power factor correction converter, in IEEE App. Power Electron. Conf., pp: 434-439. 13. Skinner, J., T.A. Lipo, 1991. Input current shaping in brushless DC motordrives utilizing inverter current control, Fifth International Conference on Electrical Machines and Drives, pp: 121-125.