a FEATURES High DC Precision 75 V Max Offset Voltage V/ C Max Offset Voltage Drift 5 pa Max Input Bias Current.2 pa/ C Typical I B Drift Low Noise.5 V p-p Typical Noise,. Hz to Hz Low Power 6 A Max Supply Current per Amplifier MIL-STD-883B Processing Available Available in Tape and Reel in Accordance with EIA-48A Standard Dual Version: AD76 APPLICATIONS Industrial/Process Controls Weigh Scales ECG/EKG Instrumentation Low Frequency Active Filters PRODUCT DESCRIPTION The is a quad, low power bipolar op amp that has the low input bias current of a BiFET amplifier but which offers a significantly lower I B drift over temperature. It utilizes super-beta bipolar input transistors to achieve picoampere input bias current levels (similar to FET input amplifiers at room temperature), while its I B typically only increases by 5 at 25 C (unlike a BiFET amp, for which I B doubles every C resulting in a increase at 25 C). Furthermore, the achieves 75 µv offset voltage and low noise characteristics of a precision bipolar input op amp. Since it has only / the input bias current of an AD OP7, the does not require the commonly used balancing resistor. Furthermore, the current noise is /5 that of the AD OP7 which makes the usable with much higher source impedances. At /6 the supply current (per amplifier) of the AD OP7, the is better suited for today s higher density circuit boards and battery-powered applications. The is an excellent choice for use in low frequency active filters in 2- and 4-bit data acquisition systems, in precision instrumentation, and as a high quality integrator. The is internally compensated for unity gain and is available in five performance grades. The J and K are rated over the commercial temperature range of C to 7 C. The A is rated over the industrial temperature of C to +85 C. The T is rated over the military temperature range of 55 C to +25 C and is available processed to MIL-STD-883B, Rev. C. Quad Picoampere Input Current Bipolar Op Amp 4-Lead Plastic DIP (N) 4-Lead CerDIP (Q) Packages CONNECTION DIAGRAMS 6-Lead SOIC (R) Package OUTPUT 2 3 4 4 3 2 OUTPUT OUTPUT 2 3 4 6 5 4 OUTPUT 4 V S 4 (TOP VIEW) (TOP VIEW) 3 V S 5 6 2 3 9 5 6 2 3 2 OUTPUT 7 8 OUTPUT OUTPUT 7 OUTPUT NC 8 9 NC NC = NO CONNECT TYPICAL I B na. 4 NC 5 6 NC 7 2 8 -Terminal LCC (E) Package OUT 3 2 9 AMP AMP 2 NC OUT4 4 AMP 4 AMP 3 9 2 3 2 OUT2 NC OUT3 3 8 4 7 NC 6 V S 5 NC 4 3 NC = NO CONNECT TYPICAL JFET AMP T. 55 +25 +25 TEMPERATURE C Figure. Input Bias Current Over Temperature Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 96, Norwood, MA 62-96, U.S.A. Tel: 78/329-47 www.analog.com Fax: 78/326-873 Analog Devices, Inc., 2
SPECIFICATIONS (@ T A = 25 C, V CM = V, and 5 V dc, unless otherwise noted.) J/A K T Parameters Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE Initial Offset 5 5 3 75 3 µv Offset T MIN T MAX 25 5 5 8 5 µv vs. Temp, Average TC.2.5.2.. µv/ C vs. Supply (PSRR) V S = ± 2 to ± 8 V 32 2 32 2 32 db T MIN T MAX V S = ± 2.5 to ± 8 V 26 8 26 8 26 db Long-Term Stability.3.3.3 µv/month INPUT BIAS CURRENT V CM = V 27 8 5 8 pa V CM = ± 3.5 V 3 25 pa vs. Temp, Average TC.3.2. pa/ C T MIN T MAX V CM = V 3 6 pa V CM = ± 3.5 V 3 7 pa INPUT OFFSET CURRENT V CM = V 8 25 3 5 5 pa V CM = ± 3.5 V 3 5 pa vs. Temp, Average TC.6.4.4 pa/ C T MIN T MAX V CM = V 3 8 8 pa V CM = ± 3.5 V 8 3 5 pa MATCHING CHARACTERISTICS Offset Voltage 25 3 5 µv T MIN T MAX 25 µv Input Bias Current 2 5 3 pa T MIN T MAX 6 6 pa Common-Mode Rejection 3 94 4 db T MIN T MAX 94 4 4 db Power Supply Rejection 4 94 db T MIN T MAX 94 6 6 db Crosstalk 5 f = Hz R LOAD = 2 kω 5 5 5 db FREQUENCY RESPONSE UNITY GAIN Crossover Frequency.8.8.8 MHz Slew Rate, Unity Gain G =.5.5.5 V/µs Slew Rate T MIN T MAX... V/µs INPUT IMPEDANCE Differential 2 2 2 MΩ pf Common-Mode 3 2 3 2 3 2 GΩ pf INPUT VOLTAGE RANGE Common-Mode Voltage ± 3.5 ± 4 ± 3.5 ± 4 ± 3.5 ± 4 V Common-Mode Rejection Ratio V CM = ± 3.5 V 32 4 32 32 db T MIN T MAX 98 28 8 28 8 28 db INPUT CURRENT NOISE. to Hz 3 3 3 pa p-p f = Hz 5 5 5 fa/ Hz INPUT VOLTAGE NOISE. to Hz.5.5 2..5 2. µv p-p f = Hz 7 7 7 nv/ Hz f = khz 5 22 5 22 5 22 nv/ Hz OPEN-LOOP GAIN V O = ± 2 V R LOAD = kω V/mV T MIN T MAX 5 5 3 5 3 5 V/mV V O = ± V R LOAD = 2 kω 3 V/mV T MIN T MAX 5 V/mV 2
J/A K T Parameters Conditions Min Typ Max Min Typ Max Min Typ Max Unit OUTPUT CHARACTERISTICS Voltage Swing R LOAD = kω T MIN T MAX ± 3 ± 4 ± 3 ± 4 ± 3 ± 4 V Current Short Circuit ± 5 ± 5 ± 5 ma CAPACITIVE LOAD Drive Capability Gain =,,, pf POWER SUPPLY Rated Performance ± 5 ± 5 ± 5 V Operating Range ± 2. ± 8 ± 2. ± 8 ± 2. ± 8 V Quiescent Current.5 2.4.5 2.4.5 2.4 ma T MIN T MAX.6 2.6.6 2.6.6 2.6 ma TRANSISTOR COUNT # of Transistors 8 8 8 NOTES Bias current specifications are guaranteed maximum at either input. 2 Input bias current match is the maximum difference between corresponding inputs of all four amplifiers. 3 CMRR match is the difference of V OS / V CM between any two amplifiers, expressed in db. 4 PSRR match is the difference between V OS / V SUPPLY for any two amplifiers, expressed in db. 5 See Figure 2a for test circuit. All min and max specifications are guaranteed. Specifications subject to change without notice. 3
ABSOLUTE MAXIMUM RATINGS Supply Voltage................................ ± 8 V Internal Power Dissipation (25 C)............ See Note 2 Input Voltage................................... ± V S Differential Input Voltage 3....................... ±.7 V Output Short-Circuit Duration (Single Input)..... Indefinite Storage Temperature Range Q............................... 65 C to +5 C N, R............................. 65 C to +25 C Operating Temperature Range J/K............................ C to 7 C A........................... C to +85 C T......................... 55 C to +25 C Lead Temperature Range (Soldering seconds)..... 3 C NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 4-Lead Plastic Package: θ JA = 5 C/W 4-Lead Cerdip Package: θ JA = C/W 6-Lead SOIC Package: θ JA = C/W -Terminal LCC Package: θ JA = 5 C/W 3 The input pins of this amplifier are protected by back-to-back diodes. If the differential voltage exceeds ±.7 volts, external series protection resistors should be added to limit the input current to less than 25 ma. INPUT* SIGNAL k CROSSTALK db k 9k /4 + OUTPUT 2.5k. F COM. F V S F PIN 4 PIN ALL 4 AMPLIFIERS ARE CONNECTED AS SHOWN *THE SIGNAL INPUT (SUCH THAT THE AMPLIFIER S OUTPUT IS AT MAX AMPLITUDE WITHOUT CLIPPING OR SLEW LIMITING) IS APPLIED TO ONE AMPLIFIER AT A TIME. THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE THEN MEASURED FOR CROSSTALK. 8 Figure 2a. Crosstalk Test Circuit AMP2 AMP4 AMP3 F 6 k k k FREQUENCY Hz Figure 2b. Crosstalk vs. Frequency ORDERING GUIDE Model Temperature Range Package Description Package Option JN C to 7 C Plastic N-4 JR C to 7 C Small Outline (SOIC) R-6 JR-/REEL C to 7 C Tape and Reel KN* C to 7 C Plastic N-4 AN* C to +85 C Plastic N-4 AR C to +85 C Small Outline (SOIC) R-6 AR-REEL C to +85 C Tape and Reel SE/883B 55 C to +25 C Leadless Ceramic Chip Carrier E-A TQ/883B* 55 C to +25 C Cerdip Q-4 Chips are also available. *Not for new designs; obsolete April 2. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE 4
Typical Performance Characteristics (@ 25 C, V S = 5 V dc, unless otherwise noted.) 5 5 5 PERCENTAGE OF UNITS 3 PERCENTAGE OF UNITS 3 PERCENTAGE OF UNITS 3 8 + +8 INPUT OFFSET VOLTAGE V TPC. Typical Distribution of Input Offset Voltage 6 8 +8 +6 INPUT BIAS CURRENT pa TPC 2. Typical Distribution of Input Bias Current 6 +6 + INPUT OFFSET CURRENT pa TPC 3. Typical Distribution of Input Offset Current INPUT COMMON-MODE VOLTAGE LIMIT V (REFERRED TO SUPPLY VOLTAGES).5..5 +.5 +. +.5 V S 5 5 SUPPLY VOLTAGE V TPC 4. Input Common-Mode Voltage Range vs. Supply Voltage OUTPUT VOLTAGE V p-p 35 3 25 5 5 k k k FREQUENCY Hz TPC 5. Large Signal Frequency Response M OFFSET VOLTAGE DRIFT V/ C. SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED. k k k M M M SOURCE RESISTANCE TPC 6. Offset Voltage Drift vs. Source Resistance 5 4 PERCENTAGE OF UNITS 3 CHANGE IN OFFSET VOLTAGE V 3 2 INPUT BIAS CURRENT pa 8 6 POSITIVE I B NEGATIVE I B.8.4 +.4 +.8 INPUT OFFSET VOLTAGE DRIFT V/ C TPC 7. Typical Distribution of Offset Voltage Drift 2 3 4 5 WARM-UP TIME Minutes TPC 8. Change in Input Offset Voltage vs. Warm-Up Time 5 5 5 5 COMMON-MODE VOLTAGE V TPC 9. Input Bias Current vs. Common-Mode Voltage 5
VOLTAGE NOISE nv/ Hz CURRENT NOISE fa/ Hz M k V OUT.5 V FREQUENCY Hz TPC. Input Noise Voltage Spectral Density FREQUENCY Hz TPC. Input Noise Current Spectral Density 5 TIME Seconds TPC 2.. Hz to Hz Noise Voltage 5 6 8 QUIESCENT CURRENT A 45 35 +25 C +25 C 55 C CMR db 8 6 V S = 5V PSR db 6 8 6 V S = 5V T A = 25 C +PSR PSR 3 5 5 SUPPLY VOLTAGE V TPC 3. Quiescent Supply Current vs. Supply Voltage (per Amplifier). k k k M FREQUENCY Hz TPC 4. Common-Mode Rejection vs. Frequency. k k k M FREQUENCY Hz TPC 5. Power Supply Rejection vs. Frequency OPEN-LOOP VOLTAGE GAIN M M 55 C +25 C +25 C OPEN-LOOP VOLTAGE GAIN db 8 6 GAIN PHASE 3 6 9 5 8 PHASE SHIFT Degrees OUTPUT VOLTAGE SWING V (REFERRED TO SUPPLY VOLTAGES).5..5 +.5 +. +.5 R L = k k LOAD RESISTANCE k TPC 6. Open-Loop Gain vs. Load Resistance Over Temperature.. k k k M M FREQUENCY Hz TPC 7. Open-Loop Gain and Phase vs. Frequency V S 5 5 SUPPLY VOLTAGE V TPC 8. Output Voltage Swing vs. Supply Voltage 6
CLOSED-LOOP OUTPUT IMPEDANCE.. A = V A = + V I OUT = ma V IN SQUARE WAVE INPUT /4 + R F. F V S. F R L 2k C L V OUT 9 % 2V 5 s. k k k FREQUENCY Hz TPC 9. Closed-Loop Output Impedance vs. Frequency TPC a. Unity Gain Follower (For Large Signal Applications, Resistor R F Limits the Current through the Input Protection Diodes) TPC b. Unity Gain Follower Large Signal Pulse Response R F = kω, C L =, pf 9 5 s 9 5 s k. F % % V IN k SQUARE WAVE INPUT /4 +. F R L 2.5k C L V OUT mv mv V S TPC c. Unity Gain Follower Small Signal Pulse Response R F = Ω, C L = pf TPC d. Unity Gain Follower Small Signal Pulse Response R F = Ω, C L =, pf TPC 2a. Unity Gain Inverter Connection 2V 5 s 5 s 5 s 9 9 9 % % mv % mv TPC 2b. Unity Gain Inverter Large Signal Pulse Response, C L =, pf TPC 2c. Unity Gain Inverter Small Signal Pulse Response, C L = pf TPC 2d. Unity Gain Inverter Small Signal Pulse Response, C L =, pf 7
OPTIONAL AC CMRR TRIM R5 2.4k R4 47.5k R3 6.34k GAIN TRIM (5k POT) R G R 6.34k R2 49.9k Q = R6 = R7 C 4C2 ω = R6 CC2 Q2 = C3 4C4 ω = R8 C3C4 DC CMRR TRIM (5k POT) V IN C t C R8 = R9 C3. F R7 R6 /4 M M + R8 R9 /4 + /4 M M C2 +. F /4 + C4 OUTPUT V S +V IN R2 2R2 INSTRUMENTATION AMPLIFIER GAIN = + + (FOR R = R3, R2 = R4 + R5) R RG ALL RESISTORS METAL FILM, % R, 2M C5,. F OPTIONAL BALANCE RESISTOR NETWORKS CAN BE REPLACED WITH A SHORT R, 2M C6,. F CAPACITORS C2 AND C4 ARE SOUTHERN ELECTRONICS MPCC, POLYCARBONATE, 5%, 5 VOLT Figure 3. Gain of Instrumentation Amplifier with Post Filtering The instrumentation amplifier with post filtering (Figure 3) combines two applications which benefit greatly from the. This circuit achieves low power and dc precision over temperature with a minimum of components. The instrumentation amplifier circuit offers many performance benefits including BiFET level input bias currents, low input offset voltage drift and only.2 ma quiescent current. It will operate for gains G 2, and at lower gains it will benefit from the fact that there is no output amplifier offset and noise contribution as encountered in a 3 op amp design. Good low frequency CMRR is achieved even without the optional ac CMRR trim (Figure 4). Table I provides resistance values for 3 common circuit gains. For other gains, use the following equations: R2 = R4 + R5 = 49.9 kω R = R3 = Max Value of R C t 49.9 kω.9 G G = 99. 8 kω 6. G 2 π (R3) 5 5 Table I. Resistance Values for Various Gains Circuit Gain R G (Max Value Bandwidth (G) R and R3 of Trim Potentiometer) (3 db), Hz 6.34 kω 66 kω 5k 526 Ω 6.6 kω 5k, 56.2 Ω.66 kω.5k COMMON-MODE REJECTION db 6 8 6 GAIN =,.2V p-p COMMON-MODE INPUT TYPICAL MONOLITHIC IN AMP CIRCUIT TRIMMED USING CAPACITOR C t WITHOUT CAPACITOR C t k k FREQUENCY Hz Figure 4. Common-Mode Rejection vs. Frequency with and without Capacitor C t 8
The Hz, 4-pole active filter offers dc precision with a minimum of components and cost. The low current noise, I OS, and I B allow the use of MΩ resistors without sacrificing the µv/ C drift of the. This means lower capacitor values may be used, reducing cost and space. Furthermore, since the s I B is as low as its I OS, over most of the MIL temperature range, most applications do not require the use of the normal balancing resistor (with its stability capacitor). Adding the optional balancing resistor enhances performance at high temperatures, as shown in Figure 5. Table II gives capacitor values for several common low pass responses. OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) V 8 6 6 WITHOUT OPTIONAL BALANCE RESISTOR, R3 WITH OPTIONAL BALANCE RESISTOR, R3 8 + +8 + TEMPERATURE C Figure 5. V OS vs. Temperature Performance of the Hz Filter Circuit Table II. Hz, 4-Pole Low-Pass Filter Recommended Component Values Section Section 2 Desired Low Frequency Frequency C C2 C3 C4 Pass Response (Hz) Q (Hz) Q ( F) ( F) ( F) ( F) Bessel.43.522.6.86.6.7.6.66 Butterworth..54..3.72.47.46.69. db Chebychev.648.69.948 2.8.34.98.733.385.2 db Chebychev.63.646.94 2.44.34.4.823.347.5 db Chebychev.5.75.932 2.94.46.9..29. db Chebychev.492.785.925 3.56.58.6.23.242 Specified values are for a 3 db point of. Hz. For other frequencies, simply scale capacitors C through C4 directly; i.e., for 3 Hz Bessel response, C =.387 µf, C2 =.357 µf, C3 =.533 µf, C4 =.5 µf. 9
4-Lead Cerdip (Q) Package OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 4-Lead Plastic DIP (N) Package 6-Lead Plastic SO (R) Package -Terminal LCC (E) Package. (2.54).64 (.63).358 (9.9).342 (8.69). (.2) x 45 REF 3 PLCS.5 (.27) BSC NO. PIN INDEX.28 (.7).22 (.56). (.5) x 45 REF Revision History Location Page / Data Sheet changed from REV. B to. Edits to FEATURES..................................................................................... Edits to PRODUCT DESCRIPTION........................................................................ Edits to ABSOLUTE MAXIMUM RATINGS................................................................. 3 Deleted METALIZATION PHOTOGRAPH.................................................................. 3 Edits to ORDERING GUIDE.............................................................................. 4
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