Features. Description. AM01475v1_Tab. Table 1: Device summary Order code Marking Package Packing STW240N10F7 240N10F7 TO-247 Tube

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Transcription:

N-channel 100 V, 2.6 mω typ., 180 A, STripFET F7 Power MOSFET in a TO-247 package Datasheet - production data Features Order code VDS RDS(on) max. ID 100 V 3.0 mω 180 A 1 2 3 Among the lowest RDS(on) on the market Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness TO-247 Applications Switching applications Figure 1: Internal schematic diagram D(2, TAB) Description This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. G(1) S(3) AM01475v1_Tab Table 1: Device summary Order code Marking Package Packing 240N10F7 TO-247 Tube July 2016 DocID029396 Rev 2 1/12 This is information on a product in full production. www.st.com

Contents Contents 1 Electrical ratings... 3 2 Electrical characteristics... 4 2.1 Electrical characteristics (curves)... 6 3 Test circuits... 8 4 Package information... 9 4.1 TO-247 package information... 9 5 Revision history... 11 2/12 DocID029396 Rev 2

Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V ID (1) Drain current (continuous) at TC = 25 C 180 A Drain current (continuous) at TC = 100 C 160 A ID (2) Drain current (pulsed) 720 A PTOT Total dissipation at TC = 25 C 300 W EAS (3) Single pulse avalanche energy 500 mj TJ Operating junction temperature range C -55 to 175 Tstg Storage temperature range C Notes: (1) Current limited by package (2) Pulse width limited by safe operating area (3) Starting TJ = 25 C, ID = 45 A, VDD = 50 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 0.5 C/W Rthj-amb Thermal resistance junction-ambient 50 C/W DocID029396 Rev 2 3/12

Electrical characteristics 2 Electrical characteristics (TCASE = 25 C unless otherwise specified) Table 4: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS= 0, ID = 250 µa 100 V IDSS Zero gate voltage drain current VGS = 0, VDS = 100 V 1 µa VGS = 0, VDS = 100 V; TC = 125 C (1) 100 µa IGSS Gate body leakage current VDS = 0, VGS = 20 V 100 na VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µa 2.5 4.5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 90 A 2.6 3.0 mω Notes: (1) Defined by design, not subject to production test. Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance 11550 Coss Output capacitance VGS = 0, VDS = 25 V, f = 1 MHz 2950 pf Crss Reverse transfer 217 capacitance - - pf Qg Total gate charge VDD = 50 V, ID = 180 A 160 nc Qgs Gate-source charge VGS = 10 V (see Figure 14: "Test circuit for 48 nc Qgd Gate-drain charge gate charge behavior") 38 nc pf Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 50 V, ID = 90 A, 49 ns tr Rise time RG = 4.7 Ω, VGS= 10 V 139 ns - - td(off) Turn-off delay time (see Figure 13: "Test circuit for 110 ns tf Fall time resistive load switching times") 112 ns 4/12 DocID029396 Rev 2

Electrical characteristics Table 7: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit VSD (1) Forward on voltage ISD = 180 A, VGS = 0 1.2 V trr Reverse recovery time ISD = 180 A, Reverse recovery di/dt = 100 A/µs, charge Qrr IRRM Reverse recovery current VDD = 80 V, Tj = 150 C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") 108 ns 315 nc 5.8 A Notes: (1) Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID029396 Rev 2 5/12

Electrical characteristics 2.1 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance GIPG070720141233SA K δ 0.2 0.1 10 0.05 0.02 0.01 10 10 10 10 10 10 tp(s) Figure 4: Output characteristics GIPG080720141111SA ID(A) VGS=8, 9, 10V 350 7V 6V 300 250 200 150 Figure 5: Transfer characteristics GIPG070720141124SA ID (A) 350 VDS=1V 300 250 200 150 100 50 5V 100 50 0 0 1 2 3 VDS(V) 0 2 3 4 5 6 7 VGS(V) Figure 6: Gate charge vs gate-source voltage VGS (V) 12 VDD=50V ID=180A GIPG070720141405SA Figure 7: Static drain-source on-resistance 10 8 6 4 2 0 0 40 80 120 160 Qg(nC) 6/12 DocID029396 Rev 2

Figure 8: Normalized V(BR)DSS vs temperature GIPG070720141500SA V(BR)DSS (V) Electrical characteristics Figure 9: Capacitance variations GIPG040620141429SA C (pf) 116 10000 Ciss 112 ID=1mA 1000 Coss 108 104 100-75 -25 25 75 125 TJ( C) 100 Crss 10 0 20 40 60 80 VDS(V) Figure 10: Source-drain diode forward characteristics GIPG080720141141SA VSD(V) TJ=-55 C 1.1 1 Figure 11: Normalized gate threshold voltage vs temperature GIPG070720141441SA VGS(th) (norm) ID=250µA 1 0.9 0.8 TJ=25 C 0.8 0.7 TJ=175 C 0.6 0.6 0.5 0 40 80 120 160 ISD(A) 0.4-75 -25 25 75 125 TJ( C) Figure 12: Normalized on-resistance vs temperature RDS(on) (norm) 1.8 VGS=10V ID=60A GIPG070720141455SA 1.4 1 0.6-75 -25 25 75 125 TJ( C) DocID029396 Rev 2 7/12

Test circuits 3 Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform 8/12 DocID029396 Rev 2

Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 TO-247 package information Figure 19: TO-247 package outline DocID029396 Rev 2 9/12

Package information Table 8: TO-247 package mechanical data mm Dim. Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 5.45 5.60 L 14.20 14.80 L1 3.70 4.30 L2 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 10/12 DocID029396 Rev 2

Revision history 5 Revision history Table 9: Document revision history Date Revision Changes 06-Jun-2016 1 Initial release. 08-Jul-2016 2 Document status promoted from preliminary to production data. DocID029396 Rev 2 11/12

IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 2016 STMicroelectronics All rights reserved 12/12 DocID029396 Rev 2