New model multilevel inverter using Nearest Level Control Technique

Similar documents
Symmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network

CHAPTER 3 SINGLE SOURCE MULTILEVEL INVERTER

SINGLE PHASE THIRTEEN LEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES USING DIFFERENT MODULATION TECHNIQUES

A Novel Cascaded Multilevel Inverter Using A Single DC Source

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches

New Approaches for Harmonic Reduction Using Cascaded H- Bridge and Level Modules

International Journal of Advance Engineering and Research Development

Performance of Sinusoidal Pulse Width Modulation based Three Phase Inverter

Speed Control of Induction Motor using Multilevel Inverter

Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI

Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded Multilevel Inverter

INTERNATIONAL JOURNAL OF PURE AND APPLIED RESEARCH IN ENGINEERING AND TECHNOLOGY

A Single-Phase Cascaded Multilevel Inverter Based on a New Basic Unit with Reduced Number of Power Switches

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive

Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive

CAPACITOR VOLTAGE BALANCING IN SINGLE PHASE SEVEN-LEVEL PWM INVERTER

Analysis of Current Source PWM Inverter for Different Levels with No-Insulating Switching Device

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION

SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs.

Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor

Simulation and Experimental Results of 7-Level Inverter System

Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor

Nine-Level Cascaded H-Bridge Multilevel Inverter Divya Subramanian, Rebiya Rasheed

SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION

A STUDY OF CARRIER BASED PULSE WIDTH MODULATION (CBPWM) BASED THREE PHASE INVERTER

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor

DESIGN 3-PHASE 5-LEVELS DIODE CLAMPED MULTILEVEL INVERTER USING MATLAB SIMULINK

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr

International Journal Of Engineering And Computer Science ISSN: Volume 2 Issue 12 December, 2013 Page No Abstract

CHAPTER 4 MODIFIED H- BRIDGE MULTILEVEL INVERTER USING MPD-SPWM TECHNIQUE

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive

Performance Study of Multiphase Multilevel Inverter Rajshree Bansod*, Prof. S. C. Rangari**

International Journal of Emerging Researches in Engineering Science and Technology, Volume 1, Issue 2, December 14

A NOVEL SWITCHING PATTERN OF CASCADED MULTILEVEL INVERTERS FED BLDC DRIVE USING DIFFERENT MODULATION SCHEMES

Reduction in Total Harmonic Distortion Using Multilevel Inverters

Single Phase Multi- Level Inverter using Single DC Source and Reduced Switches

COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS

Modeling and Simulation of Matrix Converter Using Space Vector PWM Technique

A Novel Multilevel Inverter Employing Additive and Subtractive Topology

COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER

Hybrid 5-level inverter fed induction motor drive

International Journal of Advance Engineering and Research Development

Ch.8 INVERTER. 8.1 Introduction. 8.2 The Full-Bridge Converter. 8.3 The Square-Wave Inverter. 8.4 Fourier Series Analysis

Study of five level inverter for harmonic elimination

Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods

Lecture Note. DC-AC PWM Inverters. Prepared by Dr. Oday A Ahmed Website:

COMPENSATION OF VOLTAGE SAG USING LEVEL SHIFTED CARRIER PULSE WIDTH MODULATED ASYMMETRIC CASCADED MLI BASED DVR SYSTEM G.Boobalan 1 and N.

A New Approach for Transistor-Clamped H-Bridge Multilevel Inverter with voltage Boosting Capacity Suparna Buchke, Prof. Kaushal Pratap Sengar

Simulation of Single Phase Multilevel Inverters with Simple Control Strategy Using MATLAB

ADVANCES in NATURAL and APPLIED SCIENCES

Multi-Level Inverters

Multi-Level Inverters

IMPLEMENTATION OF MULTILEVEL INVERTER WITH MINIMUM NUMBER OF SWITCHES FOR DIFFERENT PWM TECHNIQUES

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System

A Comparative Analysis of Multi Carrier SPWM Control Strategies using Fifteen Level Cascaded H bridge Multilevel Inverter

Modular Grid Connected Photovoltaic System with New Multilevel Inverter

Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM

Harmonic elimination control of a five-level DC- AC cascaded H-bridge hybrid inverter

Minimization Of Total Harmonic Distortion Using Pulse Width Modulation Technique

Multilevel Inverters : Comparison of Various Topologies and its Simulation

ISSN: International Journal of Science, Engineering and Technology Research (IJSETR) Volume 1, Issue 5, November 2012

A Single-Phase Carrier Phase-shifted PWM Multilevel Inverter for 9-level with Reduced Switching Devices

An Efficient Cascade H-Bridge Multilevel Inverter for Power Applications

Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink

PF and THD Measurement for Power Electronic Converter

Reduction of Power Electronic Devices with a New Basic Unit for a Cascaded Multilevel Inverter fed Induction Motor

COMPARISON STUDY OF THREE PHASE CASCADED H-BRIDGE MULTI LEVEL INVERTER BY USING DTC INDUCTION MOTOR DRIVES

New Multi Level Inverter with LSPWM Technique G. Sai Baba 1 G. Durga Prasad 2. P. Ram Prasad 3

Selective Harmonic Elimination (SHE) for 3-Phase Voltage Source Inverter (VSI)

Cascaded H-Bridge Multilevel Inverter

A Modified Apod Pulse Width Modulation Technique of Multilevel Cascaded Inverter Design

Effective Algorithm for Reducing DC Link Neutral Point Voltage and Total Harmonic Distortion for Five Level Inverter

CHAPTER 3 CASCADED H-BRIDGE MULTILEVEL INVERTER

Low Order Harmonic Reduction of Three Phase Multilevel Inverter

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.

A Comparative Analysis of Modified Cascaded Multilevel Inverter Having Reduced Number of Switches and DC Sources

SVPWM Rectifier-Inverter Nine Switch Topology for Three Phase UPS Applications

Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques

A SOLUTION TO BALANCE THE VOLTAGE OF DC-LINK CAPACITOR USING BOOST CONVERTER IN DIODE CLAMPED MULTILEVEL INVERTER

Diode Clamped Multilevel Inverter for Induction Motor Drive

Design and Development of Multi Level Inverter

CHAPTER 4 MULTI-LEVEL INVERTER BASED DVR SYSTEM

Harmonic Analysis & Filter Design for a Novel Multilevel Inverter

A Fifteen Level Cascade H-Bridge Multilevel Inverter Fed Induction Motor Drive with Open End Stator Winding

INVESTIGATION ON SINGLE PHASE ASYMMETRIC REDUCED SWITCH INVERTER WITH HYBRID PWM TECHNIQUES

A Single Dc Source Based Cascaded H-Bridge 5- Level Inverter P. Iraianbu 1, M. Sivakumar 2,

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online):

Simulation of Multilevel Inverter Using PSIM

DC Link Capacitor Voltage Balance and Neutral Point Stabilization in Diode Clamped Multi Level Inverter

A Comparative Study of SPWM on A 5-Level H-NPC Inverter

DESIGN OF MULTILEVEL INVERTER WITH REDUCED SWITCH TOPOLOGY

COMPARATIVE STUDY ON MCPWM STRATEGIES FOR 15 LEVEL ASYMMETRIC INVERTER

SPECIFIC HARMONIC ELIMINATION SCHEME FOR NINELEVEL CASCADED H- BRIDGE INVERTER FED THREE PHASE INDUCTION MOTOR DRIVE

ECEN 613. Rectifier & Inverter Circuits

Cascaded Connection of Single-Phase & Three-Phase Multilevel Bridge Type Inverter

Keywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion.

Total Harmonics Distortion Investigation in Multilevel Inverters

Transcription:

New model multilevel inverter using Nearest Level Control Technique P. Thirumurugan 1, D. Vinothin 2 and S.Arockia Edwin Xavier 3 1,2 Department of Electronics and Instrumentation Engineering,J.J. College of Engineering and Technology, Trichy-09 3 Department of Electrical and Electronics Engineering,Thiagarajar College of Engineering, Madurai Abstract: In this paper a new 11 level multi inverter topology introduced by the NearestLevel Control method. By this topology we are reducing the switches for the reduction of switching losses and harmonic distortions. The reduction of power switches in the topology leads to the minimization of size and cost of the system. The new topology is compared to the different techniques present and this model is controlled by Pulse Width Modulation. The performance of this 11 level multi inverter topology is higher in the power applications where it is simulated in the MATLAB. The results are verified and compared to the various techniques. Keywords: Multilevel Inverter, MATLAB, THD, Fundamental Switching Scheme and Nearest Level Control I. Introduction In the modern era, the multilevel inverters are used for the medium and high power applications. A multilevel inverter is a device which synthesize the desired output voltage from the several levels of dc voltage as input. Multilevel inverters are currently used in industries for their high power performance and covering a wide range of power. In the existing technology it may not suit the high power application which may increase the voltage stress on switch. So the switches are reduced in the existing technology for the high performance. It is the combination of IGBT and power diodes where it reduces the size. The multilevel inverter has three categories. They are i) Neutral Point Clamped (NPC) ii) Flying capacitor iii) Cascaded H-Bridge. These inverters have power quality which reduce the switches and higher the voltage levels. They are capable of generating the stepped voltage level. In this topology when the voltage level increases, the number switches also increases which leads to the high installation size and the cost of the system. So we are going to the new multilevel inverter which reduce the switches and increase the voltage levels. The signals are generated by the Pulse Width Modulation. The PWM strategies are most operative to control the multilevel inverter. Since the Sine Pulse Width Modulation is complex, it is ideal to reduce the frequency switching losses. In this the pulse width modulation is limited by the power electronic switches which the losses are reduced. Alternative approach is which that the target is set to reduce the losses by using the minimum switches is used or minimum dc voltages and further it requires the different voltage levels. The approach consists of a basic units and connected in series where the switching frequency should endure the maximum overall voltage. II. Multilevel inverter A multilevel inverter is which is mostly used in industrial applications for their advantages. The neutral clamped diode use diodes and they afford multiple voltage levels which are in series connected through the different phases of the capacitor banks. A diode transfers a limited amount of voltage, therefore the voltage stress is reduced. They provide a high efficiency by the fundamental frequency. @IJMTER-2016 All rights reserved 581

The use of the diodes in this approach is to get the preferred voltage levels at the same voltage ratings. More number of voltage levels decrease the step level and waveform is similar to the sinusoidal. In this neutral clamped diode they have a lots of diodes and switches for the increase in levels but it is increase in size. For the reduction of size and the switches, thus we designed a new multilevel inverter. Fig1 A five level Neutral clamped diode Table1 Switching states of a five level neutral clamped diode From the above table1 we can see the voltage of all the upper switches are turned ON.For the voltages ±Vdc/2 the current, when both voltage and current are positive goes over the four top or bottom switches. For the other states positive current, while voltage is positive, goes through the D 1 diodes and negative current through the D 1 diodes and also through the switches in between the clamping diodes and the load. Table shows that some switches are on more frequently than others,as a sinusoidal output wave that involves the use of all voltage levels is produced. When the inverter is transferring active power this leads to unbalanced capacitors voltages since the capacitors are charged and discharged unequally, comparatively due to different workloads. The flying capacitor is a series connection of capacitor clamped. These transfers the voltage to thedevices. Here the output is half of the input dc voltage. Due to high switching frequency, the switching loss will take place. The cascaded multilevel inverter is to use the capacitors and switches and require less number of switching components. The combination of capacitor and switches is called H-Bridge, which has a @IJMTER-2016 All rights reserved 582

separate voltage input to each H-bridge. Each cell has a separate dc voltage and can provide three different voltages Zero, positive and Negative DC voltages. Fig.2 Conventional Cascaded multilevel inverter The single-phase structure for11-level conventional cascaded inverter is illustrated in Fig above. Each separate dc source is connected to a single-phase full-bridge.each inverter level can generate three different voltage outputs, +, 0 and by connecting the dc source to the ac output with different switching combinations of the four semiconductor switches T1,T2,T3 and T4. To obtain +, switches T1 and T2 are tuned on, while can be obtained by tuning on switches T3 and T4. By turning on T1 and T3 or T2 and T4, the output voltage is 0. The ac outputs of each of the full-bridge inverter levels are connected in series such that the synthesized voltage waveform is the sum of the inverter outputs. m= 2n +1 (1) N= 2(m-1) (2) where m is the number of levels, n is the number of dc sources, and N is the number of switching devicesin each phase. The most recognized SPWM which can be realistic to a conventional cascaded multilevel inverteris the Phase-Shifted SPWM. This modulation technique is virtually the same as the conventional SPWM technique which is applied to a conventional single phase full-bridge inverter. The only difference between them is that the Phase-Shifted SPWM utilizes more than one carrier. The number of carriers used per phase is equal to twice the number of dc sources per phase. Fig.3 Circuit diagram of a new multilevel inverter @IJMTER-2016 All rights reserved 583

The Figure 3 shows the general representation of Novel cascaded multilevel inverter topology using modified nearest level control strategy.this system is used to convert DC to AC source using nearest level control. First half represents the level generator which is used to convert DC into stepped DC output waveform. This level generator has high switching frequency. The power source is mostly present in level generator. Only 6V of DC supply is given to each power source. Second half represent the polarity generator which converts stepped DC into AC. It will works under low switching frequency mostly RL load is connected with polarity generator the circuit represented will be in H model. It consists of five input power sources to which power is given to the circuit & is present in level generator side. III. PWM TECHNIQUES FOR MULTILEVEL INVERTER The switches in the multilevel inverter circuit are generated according to the switching tables. PWM technique is nothing but the pulses, which is active to turn on and turn off the switches used in inverter. The two main advantages of PWM are the control of the output voltage amplitude and fundamental frequency in addition to decreasing the filter requirements for reducing the harmonics. To create a sinusoidal output voltage in a single phase inverter the switches must be controlled in a definite sequence. To do that a reference sinusoidal waveform is required. The reference waveform is also called the modulation or control signal and it is compared to a carrier signal. Carrier signal is usually a triangular signal which controls the switching frequency while the reference signal controls the output voltage amplitude and its fundamental frequency. In PWM technique, the carrier and reference waves are mixed in a comparator. When reference signal has magnitude higher than the carrier signal (triangular wave), the comparator output is high, else low. The comparator output is processed in a trigger pulse generator in such a way that the output voltage wave of the inverter has a pulse width in arrangement with the comparator output pulse width. IV. MATLAB/Simulation The name MATLAB stands for MATrix LABoratory. MATLAB was written originally to provide easy access to matrix software developed by the LINPACK (linear system package) and EISPACK (Eigen system package) projects. MATLAB is a high-performance language for technical computing. It integrates computation, visualization, and programmingenvironment. It is a modern programming language environment, it has sophisticated data structures, contains built-in editing and debugging tools, and supports object-oriented programming. These factors make MATLAB an excellent tool for teaching and research. Fig.4 Overall circuit diagram in MATLAB @IJMTER-2016 All rights reserved 584

International Journal of Modern Trends in Engineering and Research (IJMTER) Volume 03, Issue 02, [February 2016] ISSN (Online):2349 9745; IS SSN (Print):2393-8161 The above figure shows overall block diagram new model multilevel inverter. The block comprises of power guide comparator, signal inverter, multilevel inverter voltage measurement, and current measurement & RMS value with RL load. Each block has sub system.for in comparator block two signals are associated in sine wave is compared with repeated signal. It helps to gain output during half cycle. The signal inverter input is acquire from the comparator output. They are to switches concluded input is given from 10 switches. Six switches are given as input for level generator switches. Remaining four switches are given as input to polarity generator and DC supply is taken as output from this multilevel inverter. One is phase and other is neutral and these output is connected across the RL load. Current measurement is connected parallel to the RL load to measure voltage value is taken as output from the current measurement, is taken as output from the voltage measurement. Fig.5 Multilevel inverter in MATLAB V. Results and discussions Fig.6 THD waveform for a new model multilevel inverter using nearest level control technique THD rate is about 6.12% for new-model multilevel inverter in NLC technique. Fig.7 Current waveform of a new multilevel inverter using the nearest level control technique @IJMTER-2016 All rights reserved 585

Fig.8 Voltage waveform of a new multilevel inverter using the nearest level control technique The voltage of phase & neutral of the multi-level inverter circuit, X-axis indicates the time and the Y- axis indicate the voltage.x-axis is varied depend upon time. V. Conclusion In this paper a Nearest Level Control for multilevel inerter is discussed. It is determined that the nearest control is functionally equivalent to 1) proper common mode voltage 2) opt for the switching frequency form first to last switch the duty cycles are terminated. The PWM method is much more difficult to handle the tasks when particular switching patterns are preferred, switching sequence and duty cycles are chosen so we go for nearest level method. The simulations results are shown above that the THD waveform in a bar format for the rate to be distinguished and surveyed by the current and voltage waveform of a new model multilevel inverter using a nearest level control. In this project it also defines that, by reducing the switches and sources in inverter structure using nearest level control, it does not affect the RMS value and THD. The Total harmonic distortion (THD) is also reduced. When number of levels in inverter increases, we can use nearest level control with reduced switches and sources. References [1]. Amit Kumar Gupta. (2006). A Space Vector PWM Scheme for Multilevel Inverters Based on Two-Level Space Vector PWM IEEE transactions on industrial electronics, Vol. 53, no. 5, pp.4-9. [2]. Andreas Nordvall. (2011). Multilevel Inverter Topology Survey Master of Science.journal, pp.5-12. [3]. G. Sudhakar and S. Prabhakaran. (2014). Design of Nine Level Inverter Topology for Three Phase Induction Motor Drives Bonfring International Journal of Power Systems and Integrated Circuits, Vol. 4, No. 1, pp.3-7. [4]. G. Franquelo. (2008). A New modified Cascaded H-Bridge Multilevel Inverter Topology with Reduced Switches IEEE Industrial electrons Magazine.pp.3. [5]. Leon.M.Tolbert. (1999) Novel Multilevel Inverter Carrier-Based PWM Method, IEEE Transactions on industry applications, Vol.35, NO.5. [6]. PengfeiHu,andDaozhuo Jiang. (2014). A Level-Increased Nearest Level Modulation Method for Modular Multilevel Converters IEEE Transactions on Power Electronics vol.12, no.3, pp.1-4. [7]. Vassilios G. Agelidis. (2008). A Five-Level Symmetrically Defined Selective Harmonic Elimination PWM Strategy Analysis and Experimental Validation.Vol. 23, NO. 1, pp.12-23. @IJMTER-2016 All rights reserved 586