Logic Level Gate Drive dvanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully valanche Rated Lead-Free HEXFET Power MOSFET V DSS R DS(on) I D 55V 0.0 52 Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Full Pak eliminates the need for additional insulating hardware in commercial-industrial applications. The molding compound used provides a high isolation capability and a low thermal resistance between the tab and external heat sink. This isolation is equivalent to using a micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heat sink using a single clip or by a single screw fixing. G D S TO-220 Full-Pak G D S Gate Drain Source Standard Pack Base Part Number Package Type Orderable Part Number Form Quantity TO-220 Full-Pak Tube 50 bsolute Maximum Ratings Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 52 I D @ T C = C Continuous Drain Current, V GS @ V 37 I DM Pulsed Drain Current 3 P D @T C = 25 C Maximum Power Dissipation 58 W Linear Derating Factor 0.39 W/ C V GS Gate-to-Source Voltage ± 6 V E S Single Pulse valanche Energy (Thermally Limited) 340 mj I R valanche Current 46 E R Repetitive valanche Energy 5.8 mj dv/dt Peak Diode Recovery dv/dt 5.0 V/ns T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds (.6mm from case) 300 Mounting torque, 6-32 or M3 screw lbf in (.N m) Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 2.6 R J Junction-to-mbient 65 C/W 207-04-27
Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 55 V V GS = 0V, I D = 250µ V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.056 V/ C Reference to 25 C, I D = m 0.0 V GS = V, I D = 28 R DS(on) Static Drain-to-Source On-Resistance 0.02 V GS = 5.0V, I D = 28 0.08 V GS = 4.0V, I D = 24 V GS(th) Gate Threshold Voltage.0 2.0 V V DS = V GS, I D = 250µ gfs Forward Trans conductance 50 S V DS = 25V, I D = 46 I DSS Drain-to-Source Leakage Current 25 V µ DS = 55V, V GS = 0V 250 V DS = 44V,V GS = 0V,T J =50 C Gate-to-Source Forward Leakage V I GSS n GS = 6V Gate-to-Source Reverse Leakage - V GS = -6V Q g Total Gate Charge 98 I D = 46 Q gs Gate-to-Source Charge 9 nc V DS = 44V Q gd Gate-to-Drain Charge 49 V GS = 5.0V, See Fig. 6 and 3 t d(on) Turn-On Delay Time 2 V DD = 28V t r Rise Time 40 I D = 46 ns t d(off) Turn-Off Delay Time 37 R G =.8 V GS = 5.0V t f Fall Time 78 R D = 0.59 See Fig. Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 3600 V GS = 0V C oss Output Capacitance 870 V pf DS = 25V C rss Reverse Transfer Capacitance 320 ƒ =.0MHz, See Fig. 5 C Drain to Sink Capacitance 2 ƒ =.0MHz Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 52 (Body Diode) showing the Pulsed Source Current integral reverse I SM 3 (Body Diode) p-n junction diode. V SD Diode Forward Voltage.3 V T J = 25 C,I S = 28,V GS = 0V t rr Reverse Recovery Time 94 40 ns T J = 25 C,I F = 46 Q rr Reverse Recovery Charge 290 440 nc di/dt = /µs Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. ) V DD = 25V, starting T J = 25 C, L = 320 H, R G = 25, I S = 46 (See fig. 2) I SD 46, di/dt 250/µs, V DD V (BR)DSS, T J 75 C. Pulse width 300µs; duty cycle 2%. t=60s, ƒ=60hz Uses IRL3705N data and test conditions. 2 207-04-27
I D, Drain-to-Source Current () VGS TOP 5V 2V V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 20µs PULSE WIDTH T J = 25 C 0. V DS 2.5V, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics I D, Drain-to-Source Current () VGS TOP 5V 2V V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 20µs PULSE WIDTH T J = 75 C 0. V DS 2.5V, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics I D, Drain-to-Source Current () T = 25 C J T = 75 C J V DS= 25V 20µs PULSE WIDTH 2.0 3.0 4.0 5.0 6.0 7.0 8.0 V GS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics R DS(on), Drain-to-Source On Resistance (Normalized) 3.0 2.5 2.0.5.0 0.5 I D = 77 V GS = V 0.0-60 -40-20 0 20 40 60 80 20 40 60 80 T J, Junction Temperature ( C) Fig. 4 Normalized On-Resistance vs. Temperature 3 207-04-27
C, Capacitance (pf) 6000 5000 4000 3000 2000 C iss C oss C rss V GS = 0V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = Cgd C oss = C ds + Cgd 0 V DS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage V, Gate-to-Source Voltage (V) GS 5 2 9 6 3 I D = 46 V DS = 44V V DS = 28V FOR TEST CIRCUIT 0 SEE FIGURE 3 0 20 40 60 80 20 40 Q, Total Gate Charge (nc) G Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage I SD, Reverse Drain Current () T = 75 C J T = 25 C J I D, Drain Current () OPERTION IN THIS RE LIMITED BY RDS(on) µs µs ms ms V GS = 0V 0.4 0.8.2.6 2.0 2.4 2.8 V SD, Source-to-Drain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage T C = 25 C T J = 75 C Single Pulse V DS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating rea 4 207-04-27
60 50 I D, Drain Current () 40 30 20 Fig a. Switching Time Test Circuit 0 25 50 75 25 50 75 T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig b. Switching Time Waveforms Thermal Response (Z thjc ) 0. D = 0.50 0.20 0. 0.05 0.02 0.0 t2 SINGLE PULSE (THERML RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J= P DM x Z thjc + TC 0.0 0.0000 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) PDM t Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 207-04-27
5V V L DS R G D.U.T I S 20V tp 0.0 DRIVER + - V DD Fig 2a. Unclamped Inductive Test Circuit V (BR)DSS tp E S, Single Pulse valanche Energy (mj) 800 ID TOP 9 33 BOTTOM 46 600 400 200 0 V DD = 25V 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 2c. Maximum valanche Energy I S Fig 2b. Unclamped Inductive Waveforms Fig 3a. Gate Charge Waveform Fig 3b. Gate Charge Test Circuit 6 207-04-27
Fig 4. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 7 207-04-27
TO-220 Full-Pak Package Outline (Dimensions are shown in millimeters (inches)) TO-220 Full-Pak Part Marking Information TO-220B Full-Pak packages are not recommended for Surface Mount pplication. Note: For the most current drawing please refer to website at http://www.irf.com/package/ 8 207-04-27
Qualification Information Qualification Level Moisture Sensitivity Level RoHS Compliant TO-220 Full-Pak Industrial (per JEDEC JESD47F) Yes N/ pplicable version of JEDEC standard at the time of product release. Revision History Date 04/27/207 Changed datasheet with Infineon logo - all pages. Corrected Package Outline on page 8. dded disclaimer on last page. Comments Trademarks of Infineon Technologies G µhvic, µipm, µpfc, U-ConvertIR, URIX, C66, CanPK, CIPOS, CIPURSE, CoolDP, CoolGaN, COOLiR, CoolMOS, CoolSET, CoolSiC, DVE, DI-POL, DirectFET, DrBlade, EasyPIM, EconoBRIDGE, EconoDUL, EconoPCK, EconoPIM, EiceDRIVER, eupec, FCOS, GaNpowIR, HEXFET, HITFET, HybridPCK, imotion, IRM, ISOFCE, IsoPCK, LEDrivIR, LITIX, MIPQ, ModSTCK, my-d, NovalithIC, OPTIG, OptiMOS, ORIG, PowIRaudio, PowIRStage, PrimePCK, PrimeSTCK, PROFET, PRO-SIL, RSIC, REL3, SmartLEWIS, SOLID FLSH, SPOC, StrongIRFET, SupIRBuck, TEMPFET, TRENCHSTOP, TriCore, UHVIC, XHP, XMC Trademarks updated November 205 Other Trademarks ll referenced product or service names and trademarks are the property of their respective owners. Edition 206-04-9 Published by Infineon Technologies G 8726 Munich, Germany 206 Infineon Technologies G. ll Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference ifx IMPORTNT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). Please note that this product is not qualified according to the EC Q or EC Q documents of the utomotive Electronics Council. WRNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 9 207-04-27