V NChannel MOSFET General Description Low R DS(ON) Optimized for Load Switch High Current Capability ESD Protected RoHS and HalogenFree Compliant Product Summary V DS I D (at V GS =V) R DS(ON) (at V GS =V) R DS(ON) (at V GS =4.5V) V 3A < 4.mΩ < 7.mΩ Typical ESD protection HBM Class Applications Battery Charging & Discharging for NB Battery Pack % UIS Tested % Rg Tested Top View DFN 3x3 EP Bottom View Top View D 3 4 8 7 5 G Pin S Orderable Part Number Package Type Form Minimum Order Quantity DFN 3x3 EP Tape & Reel 5 Absolute Maximum Ratings T A =5 C unless otherwise noted Parameter DrainSource Voltage GateSource Voltage Avalanche energy V DS Spike L=.mH µs C Symbol V DS V GS I DM I AS E AS V SPIKE Power Dissipation B T C = C Junction and Storage Temperature Range T J, T STG 55 to 5 P D Maximum Continuous Drain T C =5 C 3 I Current G D T C = C 3 Pulsed Drain Current C 8 Continuous Drain Current Avalanche Current C Power Dissipation A T A =5 C T A =7 C T C =5 C ± 5 I DSM T A =5 C 5 P DSM T A =7 C 3. 45 3 8 Units V V A A A mj V W W C Thermal Characteristics Parameter Symbol Typ Maximum JunctiontoAmbient A t s Maximum JunctiontoAmbient A D R θja SteadyState 45 Maximum JunctiontoCase SteadyState 3.7 R θjc Max 5 55 4.5 Units C/W C/W C/W Rev..: April www.aosmd.com Page of
Electrical Characteristics (T J =5 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS DrainSource Breakdown Voltage I D =5µA, V GS =V 33 V I DSS Zero Gate Voltage Drain Current V DS =V, V GS =V T J =55 C 5 µa I GSS GateBody leakage current V DS =V, V GS =±V ± µa V GS(th) Gate Threshold Voltage V DS =V GS, I D =5µA.3.85.4 V R DS(ON) V GS =V, I D =A 3.8 4. mω Static DrainSource OnResistance T J =5 C 5..8 V GS =4.5V, I D =A 5. 7. mω g FS Forward Transconductance V DS =5V, I D =A S V SD Diode Forward Voltage I S =A, V GS =V.7 V I S Maximum BodyDiode Continuous Current A DYNAMIC PARAMETERS C iss Input Capacitance pf C oss Output Capacitance V GS =V, V DS =5V, f=mhz pf C rss Reverse Transfer Capacitance pf R g Gate resistance f=mhz..5 4 Ω SWITCHING PARAMETERS Q g (V) Total Gate Charge 38 nc Q g (4.5V) Total Gate Charge nc V GS =V, V DS =5V, I D =A Q gs Gate Source Charge nc Q gd Gate Drain Charge nc t D(on) TurnOn DelayTime 7 ns t r TurnOn Rise Time V GS =V, V DS =5V, R L =.75Ω, 9 ns t D(off) TurnOff DelayTime R GEN =3Ω ns t f TurnOff Fall Time ns t rr Body Diode Reverse Recovery Time I F =A, di/dt=5a/µs ns Q rr Body Diode Reverse Recovery Charge I F =A, di/dt=5a/µs 5 nc A. The value of R θja is measured with the device mounted on in FR4 board with oz. Copper, in a still air environment with T A =5 C. The Power dissipation P DSM is based on R θja t s and the maximum allowed junction temperature of 5 C. The value in any given application depends on the user's specific board design. B. The power dissipation P D is based on T J(MAX) =5 C, using junctiontocase thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Single pulse width limited by junction temperature T J(MAX) =5 C. D. The R θja is the sum of the thermal impedance from junction to case R θjc and case to ambient. E. The static characteristics in Figures to are obtained using <µs pulses, duty cycle.5% max. F. These curves are based on the junctiontocase thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) =5 C. The SOA curve provides a single pulse rating. G. The maximum current rating is package limited. H. These tests are performed with the device mounted on in FR4 board with oz. Copper, in a still air environment with T A =5 C. APPLICATIONS OR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev..: April www.aosmd.com Page of
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 4V V DS =5V 8 4.5V 8 I D (A) V 3.5V I D (A) 5 C 5 C 8 V GS =3V 3 4 5 V DS (Volts) Figure : OnRegion Characteristics (Note E) 3 4 5.8 V GS (Volts) Figure : Transfer Characteristics (Note E) R DS(ON) (mω) 4 V GS =4.5V V GS =V Normalized OnResistance..4. V GS =V I D =A V GS =4.5V I D =A 5 5 5 I D (A) Figure 3: OnResistance vs. Drain Current and Gate Voltage (Note E).8 5 5 75 5 5 75 Temperature ( C) Figure 4: OnResistance vs. Junction Temperature (Note E) 5 I D =A.E.E R DS(ON) (mω) 9 5 C I S (A).E.E.E3 5 C 5 C 3 5 C.E4 4 8 V GS (Volts) Figure 5: OnResistance vs. GateSource Voltage (Note E).E5...4..8. V SD (Volts) Figure : BodyDiode Characteristics (Note E) Rev..: April www.aosmd.com Page 3 of
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS V GS (Volts) 8 4 V DS =5V I D =A Capacitance (pf) 35 5 5 5 C oss C iss 5 Q g (nc) Figure 7: GateCharge Characteristics C rss 5 5 5 V DS (Volts) Figure 8: Capacitance Characteristics I D (Amps)..... R DS(ON) limited T J(Max) =5 C T C =5 C DC µs µs µs ms ms Power (W) 5 5 5 T J(Max) =5 C T C =5 C... V DS (Volts) V GS > or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) E5.... Figure : Single Pulse Power Rating Junctionto Case (Note F) Z θjc Normalized Transient Thermal Resistance. D=T on /T T J,PK =T C P DM.Z θjc.r θjc R θjc =4.5 C/W Single Pulse In descending order D=.5,.3,.,.5,.,., single pulse T. E5.... Figure : Normalized Maximum Transient Thermal Impedance (Note F) P DM T on Rev..: April www.aosmd.com Page 4 of
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS Power Dissipation (W) Current rating I D (A) 5 5 75 5 5 5 5 75 5 5 T CASE ( C) Figure : Power Derating (Note F) T CASE ( C) Figure 3: Current Derating (Note F) T A =5 C Power (W) E5.. Figure 4: Single Pulse Power Rating JunctiontoAmbient (Note H) Z θja Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T A P DM.Z θja.r θja R θja =55 C/W Single Pulse In descending order D=.5,.3,.,.5,.,., single pulse..... Figure 5: Normalized Maximum Transient Thermal Impedance (Note H) P DM T on T Rev..: April www.aosmd.com Page 5 of
Figure Gate A: Charge Gate Charge Test Circuit Test Circuit & Waveform & Waveforms Qg V Qgs Qgd Ig Figure B: Resistive Resistive Switching Switching Test Test Circuit Circuit & Waveforms Waveforms RL Charge Rg 9% % td(on) t r t d(off) t f t on t off Figure C: Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L E = / LI AR AR BV DSS Rg Id Id I AR Figure Diode D: Recovery Diode Recovery Test Circuit Test Circuit & Waveforms & Waveforms Q = Idt rr Ig Isd L Isd I F di/dt I RM t rr Rev..: April www.aosmd.com Page of