A erie arc fault location algorithm baed on an imedance method for a dometic AC ytem E. Calderon, P. Schweitzer, S. Weber To cite thi verion: E. Calderon, P. Schweitzer, S. Weber. A erie arc fault location algorithm baed on an imedance method for a dometic AC ytem. 07 IEEE Holm Conference on Electrical Contact, Se 07, Denver, France. IEEE, 07 IEEE Holm Conference on Electrical Contact.3-36, <0.09/HOL.07.808805>. <hal-006566> HAL Id: hal-006566 htt://hal.univ-lorraine.fr/hal-006566 Submitted on ar 09 HAL i a multi-dicilinary oen acce archive for the deoit and diemination of cientific reearch document, whether they are ublihed or not. The document may come from teaching and reearch intitution in France or abroad, or from ublic or rivate reearch center. L archive ouverte luridicilinaire HAL, et detinée au déôt et à la diffuion de document cientifique de niveau recherche, ublié ou non, émanant de établiement d eneignement et de recherche françai ou étranger, de laboratoire ublic ou rivé.
A erial arc fault location algorithm baed on imedance method for a dometic AC ytem E.. Calderon, P. Schweitzer, S. Weber Univerity of Lorraine, Intitut Jean Lamour (IJL), UR798, ancy F-54000, France Abtract Thi article decribe a fault location method develoed within our laboratory. The method i baed on the electric line hyical arameter to etimate a erial arc fault ditance in an exerimental hort tranmiion line. Uing recorded data at two end of the tranmiion line, the method etimate current in many hyothetic fault oint of the line, looking for a current difference minimization. The tet bench ued for our uroe i comoed of a 49 m tranmiion line ued in dometic network (0V 50Hz) and a 47 ohm ower reitor load. Acro the line, an arc fault (carbonized ath) can be inerted at many different oint (40 oint of inertion are available). S Keyword Serial arc fault, tranmiion line, fault location. I. ITRODUCTIO erial arc fault frequently aear in low voltage ditribution ytem in unredictable way [] when degraded aged wire are in contact each other. any work have been develoed to detect thi tye of fault. It include commercial rotection ytem that are been uccefully ued in home electrical network. However, a fault location methodology in low voltage ytem wa not roerly develoed. In thi context, to know the ditance at which a fault haened could avoid damage and alo catatrohic incident like fire []. In thi work, we are focued on develoing an algorithm able to etimate the fault ditance in an exerimental hort tranmiion line. For locating arc fault, many work have been develoed algorithm uing the imedance method [3, 4, 5, 6], traveling wave method [7, 8, 9, 0] and intelligent method [,, 3]. However, thee method mainly locate arallel fault on high ower ditribution ytem. Some work baed on reflectometry method (TDR, STDR) [4, 5, 6] develoed algorithm to locate intermittent electric fault mainly in electrical aircraft ytem. Few work [, 7] are dedicated to locating arallel fault in hort tranmiion line uing the imedance method. The work develoed by Yang Cao et al. [8] imlemented an algorithm to locate a erial arc fault in an exerimental DC electrical ytem contituted by hyical module that emulate a tranmiion line of 00m. Uing a imilar aroach, we develoed an algorithm to etimate the location of a erial arc fault in a dometic AC exerimental tranmiion line uing the imedance method. In art II, the aer reent the electrical line model under E.. Calderon, Jean Lamour Intitute, team 406, Univerity of Lorraine ancy, France, edwin-milton.calderon-mendoza@univ-lorraine.fr P. Schweitzer, Jean Lamour Intitute, team 406, Univerity of Lorraine ancy, France, atrick.chweitzer@univ-lorraine.fr S. Weber, Jean Lamour Intitute, team 406, Univerity of Lorraine ancy, France, erge.weber@univ-lorraine.fr normal and fault condition oeration. Then, a rereentation of the line baed in quadriole during a erial arc fault i develoed In art III, a fundamental fault ditance equation i reented. Alo, the algorithm for fault ditance etimation i decribed. In art IV, the tet bench ued for exerimentation i decribed, alo the R, L, C, G exerimental arameter etimation and a frequency band election wa made. Then, in art V the reult and erformance evaluation of the algorithm imlemented on ATLAB for many fault ditance teted exerimentally are dilayed. Finally, the concluion and future work are reented in VI. II. ELECTRIC LIE ODELIATIO A. Arc fault overview and claification An electric arc fault i generated when a gaeou lama cloud i reent between olid conductor [9]. It can be rereented by a variable random imedance acro the time. It due to the evaoration roce, the electrode material combution and the magnetic field generated by the arc current itelf [0]. The arc fault can be claified into two tye: erial and arallel (ee figure a and b). Figure a. Serial arc fault. B. Electric line modelization Figure b. Parallel arc fault. A tranmiion line length d in the ermanent inuoidal regime under a normal oeration i rereented by a ditributed arameter model [] rereented in figure. d : total ditance length Figure. Tranmiion line model (normal oeration). The arameter R, L, C and G correond to: the reitance, inductance, caacitance and conductance er meter. When a erial arc fault event haen to ome ditance x from the ource. The arc fault rereented by a random imedance, lit the tranmiion line into two art. In thi way, the line i modeled by uing unknown imedance arameter ( and
) that deend on the fault ditance (ee figure 3). x : fault ditance d - x I I V * I * V * * I (5) Figure 3. Tranmiion line model (fault oeration). Likewie, the circuital model of the tranmiion line under a erial arc fault can be exreed by three quadriole connected in cacade []. It allow decribing the dynamic of the ytem in a imle way (figure 4). Figure 4. Quadriole rereentation of a line under a erial arc fault. The matrix equation for each block are howed in matrix equation (), (), (3) and alo (4): V V () I I V V (3) I I where: F 0 arc * x * V V F () I I V V (4) I I * x * ( d x) d x F deend on unknown fault imedance allow u to etimate V and I. Equation (3) arc value at any oint of the line uing recorded ignal V and I. We can obtain a imilar aroximation for V and I by inverting matrix reented in () to obtain (4). III. FAULT LOCATIO ALGORITH The inut and outut value of F are etimated by uing equation (3) and (4). Then, we can etablih the following rule: I I 0 and V V 0. For convenience, we chooe the firt rule, becaue current mut have very imilar value at the fault oint. The current difference can be exreed by the equation (5). F Thi equation i the fundamental illar of our algorithm. aking a rogreive variation of x (embedded in and ), it i oible to find a minimum value I I 0 which correond the fault ditance etimation. In thi context, the fault location algorithm i decribed by the following te:. Data regiter ( V, V, I, I ),when a erial arc fault i being generated,. Alying dicrete fat Fourier tranform (DFFT) DFFT, (frequency domain tranformation): V DFFT, DFFT and DFFT, V I 3. Selection of x value and relacing value from te into equation (5), 4. Signal grahic rereentation in ower unit (db) of: S 0*log I I i i 5. Reetition of te 3 and 4 (number of reetition determined by the uer), 6. A frequency band election to viualize the minimum trend trace of S, 7. Finding the minimum trend of S, 8. Fault ditance etimation i done uing an x value that correond to a minimum S. IV. EXPERIETAL TEST BECH AD PARAETERS SELECTIO The tet bench (figure 5) i comoed of two 49 m arallel cable, a 47ohm ower load reitor and a ower uly (0V-50Hz). There are 40 oint ditributed acro the line ued for arc fault inertion (carbonized ath). Figure 5. Exerimental tet bench. eaurement are done uing Lecroy AP05 current robe and TESTEC voltage robe at two oint located at the beginning and at the end of the tranmiion line ( figure 5). The ignal value are recorded by the ocillocoe (Lecroy HDO 604) at Hz amle rate. In each exerimental tet, the recorded data wa for aroximately ec. Arc fault generation follow the UL 999 and IEC 6606 tandard. Each amle i reared uing a ingle cut in the inulating material of two chunk arallel joined cable (figure 7a and 7b). The carbonized ath wa obtained uing a erial configuration: generator-amle-load. I Tranmiion line (49 m) Ocillocoe Voltage uly (30V-50Hz) Reitive load
and C = 0.0574nF/m. The comlex behavior of the line under an arc fault event (figure 3), make difficult the imedance determination. Hyothetically due to a magnetic field generated by the arc, become a arallel inductance becaue of the mutual effect between the two line. In thi context, after ome reviou tet, the value: R jl and ( j)7 *0 0 were elected. Carbonized ath ultile lahe Few lahe Figure 6. Tet of 0 different arc fault oition. The RLCG arameter etimation er unit meter during a normal oeration of the tranmiion line wa made uing the LCR HP 463A meter. In thi way, the value are: L 0.0006959 mh/m, R 5.9643 m /m, G = 0.007S /m Figure 7a. Carbonized ath. Intertion oint Figure 7b. Samle rearation. V. EXPERIETAL TEST BECH AD PARAETERS SELECTIO Fault ditance etimation for 3m Fault ditance etimation for 4m Fault ditance etimation for 0m Fault ditance etimation for 5m Fault ditance etimation for 0m Fault ditance etimation for m Fault ditance etimation for 3m Fault ditance etimation for 4m Fault ditance etimation for 47m Figure 8. Grahic obtained from the frequency band (fault location algorithm tet).
The fault location algorithm wa validated by uing recorded data from 0 different oint following the order: F0, F, F6, F5, F3, F7, F9, F4, F, F8 (figure 6). Only one carbonized ath wa inerted acro the line. For DFFT decomoition a frequency range between 0 to 500kHz wa elected. Alo, thi frequency range wa ued to obtain vector and that are ubtituted in equation (5). Likewie, a frequency band (around.khz) wa elected in order to identify viually fault ditance (figure 8). From figure 8, the fault ditance etimated are ointed by intermittent black border. The erformance of the fault location algorithm develoed in thi work how good etimation in oint located between 5 m to 3 m. However, oint located cloe to the ource or load cannot be etimated in a good way. Figure 9, reent a trut zone in which it i oible to etimate a erial arc fault. Fault zone Wrong etimation Trut zone Figure 9. Grahic rereentation of the trut zone. VI. COCLUSIO Thi work ue an aroach model to decribe the dynamic of the exerimental tranmiion line under a erial arc fault condition. The model generate a fundamental equation ued in an algorithm for the fault ditance etimation. The fault ditance etimation i achieved making a good frequency band election of S in order to ee it minimum trend. It allow u to find the fault ditance ( x ditance value ued for minimum S ). The reult howed the erformance of a fault location algorithm during exerimental tet. In thi context, we etablihed a trut zone in which it i oible to etimate fault ditance with a good erformance. Future work will focu to imrove the model of the line under a erial arc fault. It will allow exanding the truted zone and conequently to imrove the algorithm erformance. REFERECES Wrong etimation [] A. Yaramau, Y. Cao, G. Liu, and B. Wu. Aircraft Electric Sytem Intermittent Arc Fault Detection and Location. In: IEEE Tranaction on aeroace and electronic ytem, 05, 5.,. 40-5. [] FEA 008, Toycal Fire reort erie: Reidential building electrical Fire. United State Fire Adminitration, 8(), march 008. [3] S. Da, S. Santoo, A. Gaikwad, and. Patel. Imedance-baed fault location in tranmiion netwok: Theory and alication. In: IEEE Acce, (04),. 537-557. [4].. Radojevic and V.V. Terzija. Fault Ditance Calculation and Arcing Fault Detection on Overhead Line Uing Single End Data. In: 008 IET 9 th International Conference on Develoment in Power Sytem Protection. ar. 008,. 638-643. [5] A.T. John and S. Jamali. Accurate fault location technique for ower tranmiion line. In: IEE Proceeding C-Generation, Tranmiion and Ditribution, 37.6, 990,. 395-40. [6]. Putulka, J. Izykowki, and. Lukowicz. Comarion of different aroache to arc fault location on ower tranmiion line. In: 03 th International Conference on Environment and Electrical Engineering. ay 03, 45-49. [7] A. G. Shaik and R. R. V. Puliaka. A new wavelet baed fault detection, claification and location in tranmiion line. In: International Journal of Electrical Power and energy ytem, 64 (05). 35-40. [8] F. H. agnano and A. Abur. Fault location uing wavelet. In: IEEE Tranaction on Power Delivery, 3.4 (Oct. 998),. 475-480. [9] A. Borghetti, S. Cori, C. A. ucci,. Paolone, L. Peretto, and R. Tinarelli. On the ue of continuou- wavelet tranform for fault location in ditribution ower network. In: 005 5 th Power Sytem Comutation Conference (PSCC), 005,. -7. [0]. A. Baeer. Traveling wave for finding the fault location in tranmiion line. In: Journal Electrical and Electronic Engineering,. (03),. -9. [] A. arehkumar. Serie (oen conductor) fault ditance location in three hae tranmiion line uing artificial neural network. In: International Journal of Scientific Reearch Engineering and Technology, 3.7 (04),. 067-07. [] S. Barakat,. B. Eteiba, and W. I. Wahba. Fault location in underground cable uing AFIS net and dicrete wavelet tranform. In: Journal of Electrical Sytem and Information Technology,.3 (04),. 98-. [3] K.. El-aggar. A Genetic baed fault location algorithm for tranmiion line. In: 00 IEEE 6th International Conference on Electricity Ditribution, 3(00),. -6 age. [4] S. Wu, C. Fure and C. Lo. oncontact robe for wire fault location with reflectometry. In: IEEE Senor Journal, 6.6 (006),. 76-7. [5] P. Smith, C. Fure, and J. Gunther. Analyi of read ectrum time domain reflectometry for wire fault location. In: IEEE Senor Journal, 5.6 (005),. 469-478. [6] Y. J. Shin, E. J. Power, T. S. Choe, C. Y. Hong, E. S. Song, J. G Yook, and J. B. Park. Alication of time-frequency domain reflectometry for detection and localization of a fault on a coaxial cable. In: IEEE Tranaction on intrumentation and meaurement, 54.6 (005),. 493-500. [7] P. Arauz, R. oreno, and I. Kao. Location and diagnoi of electrical fault for a low-voltage ytem. In: 03 5th Recent advance in telecommunication ignal and ytem Conference (PSCC). 03,. 57-6. [8] Y. Cao, J. Li,. Sumner, E. Chritoher, and D.W.P. Thoma. A new double-ended aroach to the erie arc fault location. In: th IET International Conference on Develoment in Power Sytem Protection (DPSP 04). ar. 04,. -5. [9] R.F. Ammerman, T. Gammon, J.P. elon. DC-Arc odel, and Incident-Energy Calculation. In: IEEE Tranaction On Indutry Alication, 46.5 (0),. 80-89. [0] X. Yao, L. Herrera, Y. Huang, and J. Wang. The detection of DC arc fault: Exerimental tudy and fault recognition. In: 0 Twenty- Seventh Annual IEEE Alied Power Electronic Conference and Exoition (APEC). Feb. 0,. 70-77. [] J.. Roldan-Fernandez, F.. Gonzalez-Longatt, J.L. Rueda, and H. Verdejo. odelling of Tranmiion Sytem Under Unymmetrical Condition and Contingency Analyi Uing DIgSILET PowerFactory. In: PowerFactory Alication for Power Sytem Analyi. Ed. By Francico. Gonzale-Longatt and Joé Lui Rueda. Cham: Sringer International Publihing, 04,. 7-59. [] A. Camoccia,.L. Di Silvetre, I. Incontrera, and E. Riva Saneverino. A Generalized ethodology for Ditribution Sytem Fault Identification, Location and Characterization, In: 005 IEEE Ruia Power Tech. June 005,.-7.